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2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-29ARM: dts: socfpga: align LED node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern: socfpga_arria5_socdk.dtb: leds: 'hps0', 'hps1', 'hps2', 'hps3' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-05-12ARM: dts: socfpga: align SPI NOR node name with dtschemaKrzysztof Kozlowski
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09ARM: dts: socfpga: cyclone5: align regulator node with dtschemaDinh Nguyen
Fixes dtbs_check warnings like: '3-3-v-regulator' does not match any of the regexes: '.*-names$' Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>:wq Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-12-03ARM: socfpga: dts: fix qspi node compatibleDinh Nguyen
The QSPI flash node needs to have the required "jedec,spi-nor" in the compatible string. Fixes: 1df99da8953 ("ARM: dts: socfpga: Enable QSPI in Arria10 devkit") Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2018-11-28arm: dts: socfpga*.dts*: use SPDX-License-IdentifierSimon Goldschmidt
Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-03-06ARM: dts: socfpga: Add unit name to memory nodesFlorian Vaussard
Memory nodes in Arria5, Cyclone5 and Arria10 do not have a unit name. This will trigger several warnings like this one (when compiled with W=1): Node /memory has a reg or ranges property, but no unit name Add the corresponding unit name to each node. Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04ARM: dts: socfpga: enable CAN on Cyclone5 devkitDinh Nguyen
Enable the CAN node on the Cyclone5 devkit. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04ARM: dts: socfpga: Add Rohm DH2228FV DACDinh Nguyen
Enable the SPI node and add the Rohm DH2228FV DAC. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkitsDinh Nguyen
The I2C LCD display on the Cyclone5 and Arria5 devkits is only capable of the standard 100 kHz clock. Set the "clock-frequency" of the I2C node to be 100000. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkitsDinh Nguyen
Enable all the GPIO ports and define the GPIO-based leds on the Cyclone5 and Arria5 devkits. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2016-11-08ARM: dts: socfpga: enable qspi on the Cyclone5 devkitDinh Nguyen
Enable the qspi controller on the devkit and add the flash chip. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-11-08ARM: dts: socfpga: add specific compatible strings for boardsDinh Nguyen
Add a more specific board compatible entry for all of the SOCFPGA Cyclone 5 based boards. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v3: Be a bit more specific with the c5 dk and sockit, use "altr,socfpga-cyclone5-socdk" and "terasic,socfpga-cyclone5-sockit" v2: remove extra space and add a comma between compatible entries
2015-12-21ARM: socfpga: dts: Enable MMC support at correct place in the DTMarek Vasut
The socfpga.dtsi explicitly enabled MMC support, but not all boards are equiped with an MMC card. There are setups which only have QSPI NOR. Therefore, disable the MMC support on socfpga.dtsi level and enable it on per-board basis. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alan Tull <atull@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Olof Johansson <olof@lixom.net> Cc: Thor Thayer <tthayer@altera.com> Cc: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-20ARM: dts: socfpga: use stdout-path for chosen nodeDinh Nguyen
Use stdout-path dts property for kernel console. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-22ARM: dts: socfpga: Add a 3.3V fixed regulator nodeDinh Nguyen
Without the 3.3V regulator node, the SDMMC driver will give these warnings: dw_mmc ff704000.dwmmc0: No vmmc regulator found dw_mmc ff704000.dwmmc0: No vqmmc regulator found This patch adds the regulator node, and points the SD/MMC to the regulator. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Doug Anderson <dianders@chromium.org> --- v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and "always-on" v2: Move the regulator nodes to their respective board dts file and correctly rename them to match the schematic
2014-10-22ARM: dts: socfpga: Fix SD card detectDinh Nguyen
Without this patch, the booting the SOCFPGA platform would hang at the SDMMC driver loading. The issue, debugged by Doug Anderson, turned out to be that the GPIO bank used by the SD card-detect was not set to status="okay". Also update the cd-gpios to point to portb of the &gpio1 GPIO IP. Suggested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> --- v4: Use &gpio1 to set status="okay" and update cd-gpio=&portb v3: Correctly degugged the issue to be a gpio node not having status="okay"
2014-09-04ARM: dts: socfpga: Add SD card detectDinh Nguyen
Revision D of the SOCFGPA devkit has a GPIO line used for SD/MMC card detect. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
2014-05-05ARM: socfpga: dts: Add DTS entries for USBDinh Nguyen
Update all the SOCFPGA DTS files with USB entries. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-05ARM: socfpga: dts: add eeprom and rtc on i2c0Dinh Nguyen
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the board. This patch adds support for them. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> --- v2: Remove LCD as the driver has not been upstreamed.
2014-05-05ARM: socfpga: dts: convert to preprocessor includesSteffen Trumtrar
Convert all socfpga DT files to the dtc preprocessor include syntax. This allows to include header files in the devicetrees like other SoC-types already do. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-03-29dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.Dinh Nguyen
This patch adds the dts bindings documenation for the Altera SOCFPGA glue layer for the Synopsys STMMAC ethernet driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-10-09ARM: socfpga: dts: Move common nodes to cyclone5 dtsiSteffen Trumtrar
The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other SoC+FPGA combinations. Instead of having to describe all Cyclone5 common nodes in every board specific dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the Development Kit. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>