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2021-11-04Merge tag 'usb-5.16-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the big set of USB and Thunderbolt driver updates for 5.16-rc1. Nothing major in here, just lots of little cleanups and additions for new hardware, all of which have been in linux-next for a while with no reported problems. Included in here are: - tiny Thunderbolt driver updates - USB typec driver updates - USB serial driver updates - USB gadget driver updates - dwc2 and dwc3 controller driver updates - tiny USB host driver updates - minor USB driver fixes and updates - USB dts updates for various platforms" * tag 'usb-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (123 commits) usb: gadget: Mark USB_FSL_QE broken on 64-bit usb: gadget: f_mass_storage: Disable eps during disconnect usb: gadget: udc: core: Revise comments for USB ep enable/disable USB: serial: keyspan: fix memleak on probe errors USB: serial: cp210x: use usb_control_msg_recv() and usb_control_msg_send() USB: serial: ch314: use usb_control_msg_recv() USB: iowarrior: fix control-message timeouts Documentation: USB: fix example bulk-message timeout usb: dwc2: stm32mp15: set otg_rev usb: dwc2: add otg_rev and otg_caps information for gadget driver dt-bindings: usb: dwc2: adopt otg properties defined in usb-drd.yaml dt-bindings: usb: dwc2: Add reference to usb-drd.yaml usb: gadget: uvc: implement dwPresentationTime and scrSourceClock usb: gadget: uvc: use on returned header len in video_encode_isoc_sg usb:gadget: f_uac1: fixed sync playback Docs: usb: remove :c:func: for usb_register and usb_deregister Docs: usb: update struct usb_driver usb: gadget: configfs: change config attributes file operation usb: gadget: configfs: add cfg_to_gadget_info() helper usb: dwc3: Align DWC3_EP_* flag macros ...
2021-10-15ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151Amelie Delaunay
Referring to the note under USBH reset and clocks chapter of RM0436, "In order to access USBH_OHCI registers it is necessary to activate the USB clocks by enabling the PLL controlled by USBPHYC" (ck_usbo_48m). The point is, when USBPHYC PLL is not enabled, OHCI register access freezes the resume from STANDBY. It is the case when dual USBH is enabled, instead of OTG + single USBH. When OTG is probed, as ck_usbo_48m is USBO clock parent, then USBPHYC PLL is enabled and OHCI register access is OK. This patch adds ck_usbo_48m (provided by USBPHYC PLL) as clock of USBH OHCI, thus USBPHYC PLL will be enabled and OHCI register access will be OK. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-15ARM: dts: stm32: fix SAI sub nodes register rangeOlivier Moysan
The STM32 SAI subblocks registers offsets are in the range 0x0004 (SAIx_CR1) to 0x0020 (SAIx_DR). The corresponding range length is 0x20 instead of 0x1c. Change reg property accordingly. Fixes: 5afd65c3a060 ("ARM: dts: stm32: add sai support on stm32mp157c") Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-10-06ARM: dts: stm32: set otg-rev on stm32mp151Fabrice Gasnier
STM32MP151 complies with the OTG 2.0. Set it with otg-rev dt property. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/1631692473-8732-4-git-send-email-fabrice.gasnier@foss.st.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-06-10ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15Alexandre Torgue
It fixes the following warning seen running "make dtbs_check W=1" Warning (simple_bus_reg): /soc/stmmac-axi-config: missing or empty reg/ranges property Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-06-01ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151Patrice Chotard
Configure qspi's mdma from buffer transfer (max 128 bytes) to block transfer (max 64K bytes). mtd_speedtest shows that write throughtput increases : - from 734 to 782 KiB/s (~6.5%) with s25fl512s SPI-NOR. - from 4848 to 5319 KiB/s (~9.72%) with Micron SPI-NAND. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-26Merge tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM devicetree updates from Arnd Bergmann: "There are six new SoCs added this time. Apple M1 and Nuvoton WPCM450 have separate branches because they are new SoC families that require changes outside of device tree files. The other four are variations of already supported chips and get merged through this branch: - STMicroelectronics STM32H750 is one of many variants of STM32 microcontrollers based on the Cortex-M7 core. This is particularly notable since we rarely add support for new MMU-less chips these days. In this case, the board that gets added along with the platform is not a SoC reference platform but the "Art Pi" (https://art-pi.gitee.io/website/) machine that was originally design for the RT-Thread RTOS. - NXP i.MX8QuadMax is a variant of the growing i.MX8 embedded/industrial SoC family, using two Cortex-A72 and four Cortex-A53 cores. It gets added along with its reference board, the "NXP i.MX8QuadMax Multisensory Enablement Kit". - Qualcomm SC7280 is a Laptop SoC following the SC7180 (Snapdragon 7c) that is used in some Chromebooks and Windows laptops. Only a reference board is added for the moment. - TI AM64x Sita4ra is a new version of the K3 SoC family for industrial control, motor control, remote IO, IoT gateway etc., similar to the older AM65x family. Two reference machines are added alongside. Among the newly added machines, there is a very clear skew towards 64-bit machines now, with 12 32-bit machines compared to 23 64-bit machines. The full list sorted by SoC is: - ASpeed AST2500 BMC: ASRock E3C246D4I Xeon server board - Allwinner A10: Topwise A721 Tablet - Amlogic GXL: MeCool KII TV box - Amlogic GXM: Mecool KIII, Minix Neo U9-H TV boxes - Broadcom BCM4908: TP-Link Archer C2300 V1 router - MStar SSD202D: M5Stack UnitV2 camera - Marvell Armada 38x: ATL-x530 ethernet switch - Mediatek MT8183 Chromebooks: Lenovo 10e, Acer Spin 311, Asus Flip CM3, Asus Detachable CM3 - Mediatek MT8516/MT8183: OLogic Pumpkin Board - NXP i.MX7: reMarkable Tablet - NXP i.MX8M: Kontron pitx-imx8m, Engicam i.Core MX8M Mini - Nuvoton NPCM730: Quanta GBS BMC - Qualcomm X55: Telit FN980 TLB SoM, Thundercomm TurboX T55 SoM - Qualcomm MSM8998: OnePlus 5/5T phones - Qualcomm SM8350: Snapdragon 888 Mobile Hardware Development Kit - Rockchip RK3399: NanoPi R4S board - STM32MP1: Engicam MicroGEA STM32MP1 MicroDev 2.0 and SOM, EDIMM2.2 Starter Kit, Carrier, SOM - TI AM65: Siemens SIMATIC IOT2050 gateway There is notable work going into extending already supported machines and SoCs: - ASpeed AST2500 - Allwinner A23, A83t, A31, A64, H6 - Amlogic G12B - Broadcom BCM4908 - Marvell Armada 7K/8K/CN91xx - Mediatek MT6589, MT7622, MT8173, MT8183, MT8195 - NXP i.MX8Q, i.MX8MM, i.MX8MP - Qualcomm MSM8916, SC7180, SDM845, SDX55, SM8350 - Renesas R-Car M3, V3U - Rockchip RK3328, RK3399 - STEricsson U8500 - STMicroelectronics STM32MP141 - Samsung Exynos 4412 - TI K3-AM65, K3-J7200 - TI OMAP3 Among the treewide cleanups and bug fixes, two parts stand out: - There are a number of cleanups for issues pointed out by 'make dtbs_check' this time, and I expect more to come in the future as we increasingly check for regressions. - After a change to the MMC subsystem that can lead to unpredictable device numbers, several platforms add 'aliases' properties for these to give each MMC controller a fixed number" * tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (516 commits) dt-bindings: mali-bifrost: add dma-coherent arm64: dts: amlogic: misc DT schema fixups arm64: dts: qcom: sc7180: Update iommu property for simultaneous playback arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en" ARM: dts: mstar: Add a dts for M5Stack UnitV2 dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2 dt-bindings: vendor-prefixes: Add vendor prefix for M5Stack arm64: dts: mt8183: fix dtbs_check warning arm64: dts: mt8183-pumpkin: fix dtbs_check warning ARM: dts: aspeed: tiogapass: add hotplug controller ARM: dts: aspeed: amd-ethanolx: Enable all used I2C busses ARM: dts: aspeed: Rainier: Update to pass 2 hardware ARM: dts: aspeed: Rainier 1S4U: Fix fan nodes ARM: dts: aspeed: Rainier: Fix humidity sensor bus address ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8 ARM: dts: qcom: sdx55: add IPA information ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55 dt-bindings: arm: qcom: Add binding for Thundercomm T55 kit ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLB ...
2021-04-01ARM: dts: stm32: Add PTP clock to Ethernet controllerKurt Kanzenbach
Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the main clock to derive the PTP frequency which is not necessarily the correct one. Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-29ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151Alain Volmat
Enable the analog filter for all I2C nodes of the stm32mp151. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-23ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodesErwan Le Ray
Add EXTI lines to the following UART nodes which are used for wakeup from CStop. - EXTI line 26 to USART1 - EXTI line 27 to USART2 - EXTI line 28 to USART3 - EXTI line 29 to USART6 - EXTI line 30 to UART4 - EXTI line 31 to UART5 - EXTI line 32 to UART7 - EXTI line 33 to UART8 Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com> Link: https://lore.kernel.org/r/20210319184253.5841-6-erwan.leray@foss.st.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-01-29ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151Amelie Delaunay
usbphyc is a 48Mhz clock provider: the clock can be used as clock source for USB OTG. Add #clock-cells property to usbphyc node to reflect this capability. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-29ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151Amelie Delaunay
vdda1v1 and vdda1v8 supplies are required by USB PLL. Add them in usbphyc node. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25ARM: dts: stm32: Rename mmc controller nodes to mmc@Marek Vasut
Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" , so adjust the node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: devicetree@vger.kernel.org Acked-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2020-11-26ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP sysconAhmad Fatoum
The stm32mp1 TAMP peripheral has 32 backup registers that survive a warm reset. This makes them suitable for storing a reboot mode, which the vendor's kernel tree is already doing[0]. The actual syscon-reboot-mode child node can be added by a board.dts or fixed up by the bootloader. For the child node to be probed, the compatible needs to include simple-mfd. The binding now specifies this, so have the SoC dtsi adhere to it. [0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: update stm32mp151 for remote proc synchronization supportArnaud Pouliquen
Two backup registers are used to store the Cortex-M4 state and the resource table address. Declare the tamp node and add associated properties in m4_rproc node to allow Linux to attach to a firmware loaded by the first boot stages. Associated driver implementation is available in commit 9276536f455b3 ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation"). Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151Amelie Delaunay
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes). This patch optimizes USB OTG FIFO sizes accordingly. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: fix dmamux reg property on stm32mp151Amelie Delaunay
Reg property length should cover all DMAMUX_CxCR registers. DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest offset is at 0x3c, so length should be 0x40. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151Amelie Delaunay
Update mdma1 clients channel priority level following stm32-mdma bindings. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151Fabrice Gasnier
LP timer can be used to wakeup from stop mode on stm32mp151. Add wakeup-source properties to all LP timer instances. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: Add LP timer irqs on stm32mp151Fabrice Gasnier
Add all LP timer irqs on stm32mp151. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: update sdmmc IP version for STM32MP15Yann Gautier
Update the IP version to v2.0, which supports linked lists in internal DMA, and is present in STM32MP1 SoCs. The mmci driver supports the v2.0 periph id since 7a2a98be672b ("mmc: mmci: Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into the SoC device tree to benefit from the improved DMA support. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15Serge Semin
In accordance with the Generic EHCI/OHCI bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Amelie Delaunay <amelie.delaunay@st.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17ARM: dts: stm32: fix DCMI DMA features on stm32mp15 familyHugues Fruchet
Enable FIFO mode with half-full threshold. Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: add arm-pmu node on stm32mp15Alexandre Torgue
Add arm-pmu node on stm32mp15. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: Marek Vasut <marex@denx.de> # update to linux-next Tested-by: Marek Vasut <marex@denx.de> # on DH PDK2 and Avenger96 Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23ARM: dts: stm32: add FMC2 EBI support for stm32mp157cChristophe Kerello
This patch adds FMC2 External Bus Interface support on stm32mp157c. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32mp151Benjamin Gaignard
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15ARM: dts: stm32: Add missing #address and #size cells on spi node for stm32mp151Benjamin Gaignard
Add the missing #address-cells and #size-cells to spi node. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-07ARM: dts: stm32: bump PSCI to version 1.0 on stm32mp15xEtienne Carriere
Declare PSCI v1.0 support instead of v0.1 as the former is supported by the PSCI firmware stacks stm32mp15x relies on. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28ARM: dts: stm32: add Fast Mode Plus info in I2C nodes of stm32mp151Alain Volmat
Add the syscfg-fmp property in each i2c node in order to allow Fast Mode Plus speed if clock-frequency >= 1MHz is indicated. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28ARM: dts: stm32: use st,stm32mp15-i2c compatible for stm32mp151Alain Volmat
Replace previous st,stm32f7-i2c compatible with st,stm32mp15-i2c for the platform stm32mp151. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28ARM: dts: stm32: add cortex-M4 pdds management in Cortex-M4 nodeArnaud Pouliquen
Add declarations related to the syscon pdds for deep sleep management. Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: preset stm32mp15x video #address- and #size-cellsAhmad Fatoum
The cell count for address and size is defined by the binding and not something a board would change. Avoid each board adding this boilerplate by having the cell size specification in the SoC DTSI. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20ARM: dts: stm32: fix a typo for DAC io-channel-cells on stm32mp15Fabrice Gasnier
Fix a typo on STM32MP15 DAC, e.g. s/channels/channel Fixes: da6cddc7e8a4 ("ARM: dts: stm32: Add DAC support to stm32mp157c") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add cpu clock-frequency property on stm32mp15xAhmad Fatoum
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their Cortex-A7 cores running at 650 MHz. Add the clock-frequency property to CPU nodes to avoid warnings about them missing. [1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html [2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html [3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157cAlain Volmat
Add the wakeup-source property in all i2c nodes of the SoC stm32mp157c so that those I2C controllers can become wakeup-source. Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151Amelie Delaunay
resets property is well-managed in DMA drivers. In previous products, there were no reset lines, that's why they are missing here in dma1, dma2, dmamux and mdma nodes. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10ARM: dts: stm32: add USB OTG full support on stm32mp151Amelie Delaunay
Using the st,stm32mp15-hsotg compatible allows to use USB OTG with Dual Role mode support. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10ARM: dts: stm32: Add missing ETHCK clock to ethernet node on stm32mp1Marek Vasut
Add missing 'eth-ck' clock to the ethernet node on stm32mp1. These clock are used to generate external clock signal for the PHY in case 'st,eth_ref_clk_sel' is specified. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Christophe ROULLIER <christophe.roullier@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09ARM: dts: stm32: change nvmem node name on stm32mp1Benjamin Gaignard
Change non volatile node name from nvmem to efuse to be compliant with yaml schema. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15Arnaud Pouliquen
Update of the mlahb node according to to DT bindings using json-schema Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09ARM: dts: stm32: fix dma controller node name on stm32mp157cBenjamin Gaignard
Modify dma controller nodes name to fit with the standard naming. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on ↵Christophe Roullier
stm32mp15 When there is no activity on ethernet phy link, the ETH_GTX_CLK is cut. Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernetChristophe Roullier
Syscfg is now activated automatically when syscfg registers are used. Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09ARM: dts: stm32: Manage security diversity for STM32M15x SOCsAlexandre Torgue
This commit creates a new file to manage security diversity on STM32MP15x SOCs. On STM32MP15xY, "Y" gives information: -Y = A means no cryp IP and no secure boot. -Y = C means cryp IP + secure boot. Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09ARM: dts: stm32: Introduce new STM32MP15 SOCs: STM32MP151 and STM32MP153Alexandre Torgue
STM32MP151 and STM32MP153 were not explicitly supported through stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15 SOCs family. The differences between those SOCs are: -STM32MP151 [1]: common file. -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU. -STM32MP157 [3]: STM32MP153 + DSI + GPU. [1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf [2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf [3] https://www.st.com/resource/en/reference_manual/dm00327659.pdf Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
generated by cgit (git 2.34.1) at 2024-06-09 09:31:01 +0000