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2019-08-23ARM: dts: sunxi: Add mdio bus sub-node to GMACChen-Yu Tsai
The DWMAC binding never supported having the Ethernet PHY node as a direct child to the controller, nor did it support the "phy" property as a way to specify which Ethernet PHY to use. What seemed to work was simply the implementation ignoring the "phy" property and instead probing all addresses on the MDIO bus and using the first available one. The recent switch from "phy" to "phy-handle" breaks the assumptions of the implementation, and does not match what the binding requires. The binding requires that if an MDIO bus is described, it shall be a sub-node with the "snps,dwmac-mdio" compatible string. Add a device node for the MDIO bus, and move the Ethernet PHY node under it. Also fix up the #address-cells and #size-cells properties where needed. Fixes: de332de26d19 ("ARM: dts: sunxi: Switch from phy to phy-handle") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-07-22ARM: dts: sunxi: Switch from phy to phy-handleMaxime Ripard
The phy device tree property has been deprecated in favor of phy-handle, let's replace it. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-25ARM: dts: sun9i: optimus: Fix fixed-regulatorsMaxime Ripard
Commit 1848f3f44444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") was wrong on the optimus, and instead of droping the pinctrl-names property, it dropped the regulator-name one. Obviously, that wasn't what was intended. Reinstate regulator-name and drop pinctrl-names. Fixes: 1848f3f44444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings") Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-02-07ARM: dts: sun9i: a80-optimus: Enable GMACChen-Yu Tsai
The A80 Optimus has a Realtek RTL8211E ethernet PHY which uses RGMII to talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's core logic and gpio1-ldo for I/O. The latter also powers the SoC side pins. As there is no binding to model a second regulator supply for the PHY, it is omitted. It is however properly modeled for the PIO. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-02-07ARM: dts: sun9i: a80-optimus: Add GPIO pin-bank regulator suppliesChen-Yu Tsai
The A80 Optimus has the PMIC providing voltage to all the pin-bank supply rails from its various regulator outputs. All pin-banks that have supply rails are accounted for. PN pin-bank does not have a supply rail. Also remove any "regulator-always-on" properties from regulators that were only marked to provide pin-bank power. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-02-07ARM: dts: sun9i: a80-optimus: Add node for AXP809's unused dc1sw regulatorChen-Yu Tsai
The DC1SW output from the AXP809 is unused. Unused regulators should still be listed so as to be considered to be fully constrained. Fixes: aa4a27bc819e ("ARM: dts: sun9i: a80-optimus: Add AXP809 PMIC device node and regulators") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-13ARM: dts: sunxi: Switch MMC nodes away from cd-inverted propertyTuomas Tynkkynen
Using the cd-inverted property is not useful when GPIOs are used as card detects since the polarity can be specified with the usual GPIO_ACTIVE_(HIGH|LOW) GPIO flags. It has also caused confusion for U-Boot developers, so migrate all sunxi boards away from cd-inverted. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2017-10-13ARM: dts: sun9i: Change node names to remove underscoresMaxime Ripard
Some boards have had node names with underscores. Remove them in favour of hyphens in order to reduce the DTC warnings. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06ARM: dts: sun9i: optimus: Remove card detect pull-upMaxime Ripard
The board has an external pull-up on the card-detect signal, so there's no need to add another one. This also removes a DTC warning. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06ARM: dts: sun9i: Rename pinctrl nodes to avoid warningsMaxime Ripard
Our pinctrl node names were containing unit-adresses without a reg property, resulting in a warning. Change the names for our new convention. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-06ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warningsMaxime Ripard
The A80 boards still define some GPIO pinctrl nodes that are not really useful, and redundant with the muxing already happening on gpio_request. Let's remove those nodes. This will also remove DTC warnings. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h headerChen-Yu Tsai
All dts files for the sunxi platform have been switched to the generic pinconf bindings. As a result, the sunxi specific pinctrl macros are no longer used. Remove the #include entry with the following command: sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \ arch/arm/boot/dts/sun?i*.* arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra empty line. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-12-26ARM: sunxi: Convert pinctrl nodes to generic bindingsMaxime Ripard
Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26ARM: sunxi: Remove useless allwinner,pull propertyMaxime Ripard
The allwinner,pull property set to NO_PULL was really considered our default (and wasn't even changing the default value in the code). Remove these properties to make it obvious that we do not set anything in such a case. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26ARM: sunxi: Remove useless allwinner,drive propertyMaxime Ripard
The allwinner,drive property set to 10mA was really considered as our default. Remove all those properties entirely to make that obvious. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-22ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFiChen-Yu Tsai
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-21ARM: dts: sun9i: a80-optimus: Disable EHCI1Chen-Yu Tsai
EHCI1 provides an HSIC interface. This interface is exposed on the board through two pins among the GPIO header. With the PHY now powered up and responding, enabling the interface when nothing is connected results in a lot of error messages: usb 2-1: device descriptor read/64, error -71 usb 2-1: device descriptor read/64, error -71 usb 2-1: new high-speed USB device number 3 using ehci-platform usb 2-1: device descriptor read/64, error -71 usb 2-1: device descriptor read/64, error -71 usb 2-1: new high-speed USB device number 4 using ehci-platform usb 2-1: device not accepting address 4, error -71 usb 2-1: new high-speed USB device number 5 using ehci-platform usb 2-1: device not accepting address 5, error -71 usb usb2-port1: unable to enumerate USB device Disable it by default, but leave the entries in the board DTS. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-21ARM: dts: sun9i: a80-optimus: Add AXP806 PMIC device node and regulatorsChen-Yu Tsai
The AXP806 PMIC is the secondary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-09-21ARM: dts: sun9i: a80-optimus: Declare AXP809 SW regulator as unusedChen-Yu Tsai
The AXP809's SW (switch) regulator is unused on the A80 Optimus. Add an empty node for it so that the OS can generate constraints. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-22ARM: dts: sun9i: Switch to the AC100 RTC clock outputs for osc32kChen-Yu Tsai
The 32.768 kHz clock inside the A80 SoC is fed from an external source, typically the AC100 RTC module. Make the osc32k placeholder a fixed-factor clock so board dts files can specify its source. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-22ARM: dts: sun9i: a80-optimus: Add device node for AC100Chen-Yu Tsai
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-04ARM: dts: sun9i: a80-optimus: Order nodes by alphabetical orderChen-Yu Tsai
Move the mmc nodes above the ohci nodes for proper ordering by name. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-04ARM: dts: sun9i: a80-optimus: Drop sunxi-common-regulators.dtsiChen-Yu Tsai
sunxi-common-regulators.dtsi provided dummy regulators vcc3v0, vcc3v3, vcc5v0. 3.0V/3.3V and 5.0V are commonly used voltages in Allwinner devices. These dummy regulators provide a stand-in when bindings that require one, but the real regulator is not supported yet. Since these are no longer needed, we can drop the include file by copying over reg_usb1_vbus. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-07-04ARM: dts: sun9i: a80-optimus: Add AXP809 PMIC device node and regulatorsChen-Yu Tsai
The AXP809 PMIC is the primary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-02-02ARM: dts: sun9i: a80-optimus: Remove i2c3 and uart4Chen-Yu Tsai
i2c3 and uart4 are available on the GPIO header. Though these pins only have this one special function, the user may choose to use them as GPIOs instead. Since our policy is not to choose what function to present on the GPIO headers of development boards, remove them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMCChen-Yu Tsai
mmc2 has a special pin for eMMC hardware reset, which is controllable from the controller. Add the "mmc-cap-hw-reset" property to denote that this controller supports this function, and the pins are actually used. Also increase the signal drive strength for mmc2 pins, for HS-DDR mode support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-12-01ARM: dts: sun9i: optimus: Enable Reduced Serial Bus controllerChen-Yu Tsai
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-12-01ARM: dts: sun9i: optimus: Enable consumer IR receiverChen-Yu Tsai
The A80 Optimus board has a consumer IR receiver. Enable it in the DT. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-12-01ARM: dts: sun9i: optimus: Enable LED3Chen-Yu Tsai
LED3 is connected to pin PM15 on R_PIO. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10ARM: sunxi: dt: Remove the FSF addressMaxime Ripard
The FSF address triggers a warning on checkpatch, saying that the FSF license is already present in the Linux source code, and that it has already changed in the past. Remove it from our DT, as suggested. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27ARM: sunxi: DT: Add stdout-path propertyMaxime Ripard
Add UART aliases and stdout-path property for all the Allwinner boards so that we won't have to rely on the bootargs' console= value, while working with legacy bootloaders. While we're at it, also remove the mentions of earlyprintk in the bootargs, that will remove our default bootargs entirely, and allow the kernel to boot on a system even if DEBUG_LL is configured for another system. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27ARM: dts: sun9i: optimus: Switch to phy core regulator bindings for usb physChen-Yu Tsai
Since the phy core already supports specifying a regulator to handle during power up/down, it was decided to drop the regulator support in the sun9i usb phy driver. This patch switches the DT to the core bindings. This and the phy driver would be in the same release and should not be a problem as far as DT stability goes. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27ARM: dts: sun9i: Enable USB support on A80 Optimus boardChen-Yu Tsai
On the Optimus board, all three USB hosts can be used. HCI0 and HCI2 are available through the USB connector. HCI1 is available with HSIC through 2 pins on the GPIO expansion header. This patch also adds a regulator for HCI2/USB3's VBUS. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-02-17Merge tag 'dt-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Olof Johansson: "DT changes continue to be the bulk of our merge window contents. We continue to have a large set of changes across the board as new platforms and drivers are added. Some of the new platforms are: - Alphascale ASM9260 - Marvell Armada 388 - CSR Atlas7 - TI Davinci DM816x - Hisilicon HiP01 - ST STiH418 There have also been some sweeping changes, including relicensing of DTS contents from GPL to GPLv2+/X11 so that the same files can be reused in other non-GPL projects more easily. There's also been changes to the DT Makefile to make it a little less conflict-ridden and churny down the road" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits) ARM: dts: Add PPMU node for exynos4412-trats2 ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato ARM: dts: Add PPMU dt node for exynos4 and exynos4210 ARM: dts: Add PPMU dt node for exynos3250 ARM: dts: add mipi dsi device node for exynos4415 ARM: dts: add fimd device node for exynos4415 ARM: dts: Add syscon phandle to the video-phy node for Exynos4 ARM: dts: Add sound nodes for exynos4412-trats2 ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi ARM: dts: Add max77693 charger node for exynos4412-trats2 ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 ARM: dts: am57xx-beagle-x15: Fix USB2 mode ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB ARM: dts: dra72-evm: Add extcon nodes for USB ARM: dts: dra7-evm: Add extcon nodes for USB ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb ...
2015-01-25ARM: sunxi: dt: Fix aliasesMaxime Ripard
Commit f77d55a3b56a ("serial: 8250_dw: get index of serial line from DT aliases") made the serial driver now use the serial aliases to get the tty number, pointing out that our aliases have been wrong all along. Remove them from the DTSI and add custom ones in the relevant boards. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun9i: Enable mmc2 on A80 Optimus BoardChen-Yu Tsai
The A80 Optimus Board has a 16GB eMMC connected to mmc2, with 8 bit wide data bus. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun9i: Enable mmc0 on A80 Optimus BoardChen-Yu Tsai
Enable the micro-sd slot on the A80 Optimus Board, which is connected to mmc0. This adds the card-detect gpio and enables mmc0. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun9i: Convert a80 optimus board dts to label referencingChen-Yu Tsai
The preferred method of referencing nodes from the dtsi is to use labels, instead of copying the complete tree. This patch converts sun9i-a80-optimus.dts to use label references. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodesMaxime Ripard
The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: convert DTs to use common GPIOs includesMaxime Ripard
Replace the various raw GPIO flags by their definition in the common dt-bindings header. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert to device tree includesMaxime Ripard
Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Enable uart4 for A80 Optimus boardChen-Yu Tsai
The A80 Optimus board exposes uart4 on the GPIO expansion header. Enable it so we can use it. Also enable the internal pull-ups, as there doesn't seem to be external pull-up resistors for pins on the expansion header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Add GPIO LEDs for A80 Optimus boardChen-Yu Tsai
The A80 Optimus board has 3 usable LEDs that are controlled via GPIO. This patch adds support for 2 of them which are driver by GPIOs in the main pin controller. The remaining one uses GPIO from the R_PIO controller, which we don't support yet. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31ARM: dts: sun9i: Enable i2c3 on A80 Optimus boardChen-Yu Tsai
i2c3 is exposed on the GPIO extension header. Enable it so we can use it. Also enable internal pull-ups on the pins, as they don't seem to have external pull-up resistors. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-30ARM: sun9i: optimus: Set UART0 muxingMaxime Ripard
Enable the UART0 muxing, as set up by the bootloader. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-27ARM: sunxi: Fix GPLv2 wordingMaxime Ripard
During the GPL to GPL/X11 licensing migration, the GPL notice introduced mentionned the device trees as a library, which is not really accurate. It began to spread by copy and paste. Fix all these library mentions to reflect the file that it's actually just a file. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-20ARM: dts: sun9i: Add A80 Optimus Board supportChen-Yu Tsai
The A80 Optimus Board is was launched with the Allwinner A80 SoC. It was jointly developed by Allwinner and Merrii. This board has a UART port, a JTAG connector, USB host ports, a USB 3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash, 4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone jack, IR receiver, and additional GPIO headers. This patch adds only basic support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Andreas Färber <afaerber@suse.de>