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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner DT changes for 4.15" from Maxime Ripard:
The most notable changes are:
- Conversion to the last SoC (A10, A20) to the new clock framework
- HDMI and dual pipeline support for the A10, A20 and A31 DRM driver
- Support for the various power supplies on a number of boards
- Fix of DTC warnings on a number of SoCs, but most of them still need
some work
- New boards: A20-OLinuXino-MICRO-eMMC, TBS A711, Banana Pi M2 Berry,
Banana Pi M2 Ultra
- New R40 SoC support
* tag 'sunxi-dt-for-4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (63 commits)
ARM: sun8i: r40: enable USB host for Banana Pi M2 Ultra
ARM: sun8i: v40: add 5V regulator for Banana Pi M2 Berry
ARM: sun8i: r40: add 5V regulator for Banana Pi M2 Ultra
ARM: sun8i: r40: add USB host port nodes for R40
ARM: dts: sun4i: Enable HDMI support on some A10 devices
ARM: dts: sun7i: Enable HDMI support on some A20 devices
ARM: dts: sun7i: Add device nodes for display pipelines
ARM: dts: sun4i: Add device nodes for display pipelines
ARM: dts: sun8i: r40: add watchdog device node
ARM: dts: sun5i: reference-design-tablet: Enable AXP209 AC and battery
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun9i: Change node names to remove underscores
ARM: dts: sun4i: Remove underscores from nodes names
ARM: dts: sun4i: Provide default muxing for relevant controllers
ARM: dts: sun4i: Change pinctrl nodes to avoid warning
ARM: dts: sun6i: Enable HDMI support on some A31/A31s devices
ARM: dts: sun6i: Add device node for HDMI controller
ARM: dts: sun4i: Change LRADC node names to avoid warnings
ARM: dts: sun4i: Remove skeleton and memory to avoid warnings
ARM: dts: sun4i: Remove gpio-keys warnings
...
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git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into fixes
Pull "UniPhier ARM SoC fixes for v4.14" from Masahiro Yamada:
- Add necessary clock to EHCI node
* tag 'uniphier-fixes-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: add STDMAC clock to EHCI nodes
ARM: dts: uniphier: add STDMAC clock to EHCI nodes
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Meson6, Meson8 and Meson8b use a similar IP block which has access to
512 bytes of efuse data.
During SoC manufacturing some calibration settings for the CVBS
connector and the internal temperature sensor are written to this efuse.
On some boards it additionally stores for example the MAC addresses.
The efuse is enabled on Meson8 and Meson8b but kept disabled on Meson6
since we do not have a clock driver there (which is required to read
data from the efuse).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Add gpio interrupt controller node to the meson8b boards
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Booting the secondary CPU cores involves the following nodes/devices:
- SCU (Snoop-Control-Unit, for which we already have a DT node)
- a reset line for each CPU core, provided by the reset-controller
which is built into the clock-controller
- the PMU (power management unit) which controls the power of the CPU
cores
- a range in the SRAM specifically reserved for booting secondary CPU
cores
- the "enable-method" which activates booting the secondary CPU cores
This adds all required nodes and properties to boot the secondary CPU
cores.
Suggested-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Under heavy system stress mvebu SoC using Cortex A9 sporadically
encountered instability issues.
The "double linefill" feature of L2 cache was identified as causing
dependency between read and write which lead to the deadlock.
Especially, it was the cause of deadlock seen under heavy PCIe traffic,
as this dependency violates PCIE overtaking rule.
Fixes: c8f5a878e554 ("ARM: mvebu: use DT properties to fine-tune the L2 configuration")
Cc: stable@vger.kernel.org
Signed-off-by: Yan Markman <ymarkman@marvell.com>
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
[gregory.clement@free-electrons.com: reformulate commit log, add Armada
375 and add Fixes tag]
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Some interrupts properties are given '0' as the flags argument or no
flags argument at all.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Some interrupts properties are given '0' as the flags argument.
Change them to use the appropriate interrupt flags.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add resets properties to all nodes that have reset lines.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Interrupt lines from on-board devices are connected to the GPIO
controller. Add GPIO hogging so that the corresponding GPIO line
is automatically requested.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Interrupt lines from on-board devices are connected to the GPIO
controller. Handle this correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The GPIO controller also acts as an interrupt controller and the
interrupt lines are connected to the AIDET block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This commit adds device tree description of Liebherr's Display5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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reg property
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-qsb/led_gpio7_7@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/iomuxc@53fa8000/imx53-m53evk/led_gpio@0 has a unit name, but no reg property
Fix this warning by removing '@0' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The following build warnings are seen with W=1:
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips@50000000/usbphy@1 has a unit name, but no reg property
Fix these warnings by changing '@' to '-'.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /display-di0/port@0 has a unit name,
but no reg property
Fix this warning by removing '@' from such node.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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property
The following build warning is seen with W=1:
Warning (unit_address_vs_reg): Node /backlight@bl1 has a unit name, but no reg property
Fix this warning by removing '@bl1'from such node and change 'bl1grp' to
'backlightgrp', once there is only one backlight in this dts.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This adds support for the Zodiac Inflight Innovations RDU1 board,
which is based on the i.MX51.
It is the predecessor of the already supported ZII RDU2 board and
relies on the bootloader in the same way to enable correct display
and touchscreen nodes.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Create .dts files for various Ka-Ro electronics TX modules on the MB7
baseboard.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The TX6QP-8037 is a Computer On Module manufactured by
Ka-Ro electronics GmbH with the following characteristics:
Processor Freescale i.MX 6QuadPlus MCIMX6QP7, 1 GHz
RAM 1GiB 64-bit DDR3 SDRAM
ROM 4GB HiRel eMMC
Power supply Single 3.3 to 5V
Size 26mm SO-DIMM
Temp. Range -40°C to 105°C
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Move the MB7 specific settings to a separate .dtsi file to facilitate
supporting more module variants with this baseboard.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Currently the display (LCD or LVDS) configuration is duplicated with
slight variations in each TX6 module specific file.
Move it to an include file for simplification and consistency.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Define the required properties to enable I2C bus recovery supported by
the I2C subsystem.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Convert the DTS sound setup to use the simple-audio-card driver.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Under certain circumstances the ethernet PHY cannot be detected on
Ka-Ro electronics TX6 modules. Using a phy-reset-post-delay of at least
2ms alleviates this problem. Define it to 10ms to be on the safe side.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Remove the PHY INT and RESET pins from hog section and put them into
their own pinctrl nodes referenced by the appropriate driver nodes.
Also, the MDIO pins are required for probing the Ethernet PHY, so they
must be configured by the FEC driver, not by the PHY driver. Move the
corresponding pinctrl settings from the PHY subnode to the FEC node.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The 'ipu1' alias is already defined in imx6q.dtsi. There is no need to
redefine it here.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The current TX6Q module HW revision is 3 reflected in the module name
suffix '-1030' (-1130 for LVDS).
Change the model string to prevent confusion about what DTS file to
use for these modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warnings are gone:
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
DTC arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb4000
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Pass the '#dma-cells' property in the sdma node, so that the following
build warning is gone:
DTC arch/arm/boot/dts/imx50-evk.dtb
arch/arm/boot/dts/imx50-evk.dtb: Warning (dmas_property): Missing property '#dma-cells' in node /soc/aips@60000000/sdma@63fb0000 or bad phandle (referred from /soc/aips@50000000/spba@50000000/ssi@50014000:dmas[0])
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The GPIO polarity is missing in the cd-gpios property.
Fix it, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dtb: Warning (gpios_property): cd-gpios property size (8) too small for cell size 2 in /soc/aips@53f00000/esdhc@53fb400
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The correct property name is 'interrupt-parent', so fix it accordingly.
This fixes the following build warning:
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@02188000/mdio/ethernet0-phy@0
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /soc/aips-bus@02100000/ethernet@021b4000/mdio/ethernet1-phy@0
Cc: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The 'interrupts' property has an extra cell by mistake.
Fix this, so that the following build warning is gone:
DTC arch/arm/boot/dts/imx6ul-pico-hobbit.dtb
arch/arm/boot/dts/imx6ul-pico-hobbit.dtb: Warning (interrupts_property): interrupts size is (12), expected multiple of 8 in /soc/aips-bus@2000000/ethernet@20b4000/mdio/ethernet-phy@1
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The imx6qp variant also has sata, so add support for it.
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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According to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt,
the property for specifying the PCIe regulator is 'vpcie-supply', so
use the correct one.
Also fix the polarity of GPIO2_24 so that the regulator can operate
correctly.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Since commit c26ebe98a103 ("PCI: imx6: Add regulator support"), it is
possible to pass the 'vpcie-supply' property to describe the PCIE supply.
This way we can remove the 'regulator-always-on' property from the
regulator and have a better device tree description.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This works identically to imx6sx-tempmon on both imx6ul and imx6ull.
It just needs to be defined in dts.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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On imx6sx accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first. Use the nvmem-cells binding instead.
This requirement does not apply to older imx6qdl chips because there the
ocotp access clock (clk_ipg_s) is always enabled.
This is visible by comparing the "System Clocks, Gating, and Override"
tables (OCOTP rows) in the 6DQ and 6SX manuals:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6SXRM.pdf
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
This happens to work right now because the ocotp clock might be enabled
for some other reason. In particular the it might be enabled from the
bootloader and it only gets disabled late during boot in
clk_disable_unused, after imx-thermal has completed probing.
If imx-thermal is compiled as a module then the system can hang on
probe.
Reported-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The container node in the iomuxc node is no longer necessary and causes
pinctl errors on the Ventana boards with analog video capture
since aa12693e4156adafdef80a8bd134123a6419621b:
pinctrl core: initialized pinctrl subsystem
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/adv7180grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/ipu2_csi1grp
imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
imx6q-pinctrl 20e0000.iomuxc: function 'iomuxc' not supported
imx6q-pinctrl 20e0000.iomuxc: invalid function iomuxc in map table
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Latest wandboard hardware revision is revd1, which brings the following
new features:
- PFUZE100 PMIC
- AR8035 Ethernet PHY
- Upgrade Wifi/BT chip to BCM4339/BCM43430.
Add support for the mx6, mx6dl and mx6qp revd1 variants.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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By default, the lcdif_pre_sel mux is switched to the pll3_pfd1_540m PFD
source. If this mux is allowed to propagate rate changes to its parent,
setting the LCDIF pixel clock rate to 9 MHz, as required by the LCD
panel, will cause the pll3_pfd1_540m PFD to be switched away from its
nominal rate to 288 MHz.
This has no negative side effects, as there are no other children to
this PFD. Still, to avoid surprises, it might be preferrable to switch
to the designated video PLL (pll5_video_div) as clock source for the
LCDIF pixel clock.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The imx-i2c driver supports automatic bus recovery via the GPIO
function of the I2C pins. Enable this functionality for the Ka-Ro
electronics TX53 modules.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Don't rely on the padctl settings established by the boot loader, but
explicitly specify the padctl values in DTB. This is also necessary to
be able to use the DTB files from the Linux kernel for future U-Boot
versions that support HW configuration via DTB.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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As the DS1339 driver now supports enabling the trickle charge feature
via DTB, add the appropriate properties to utilize this feature.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The display, that incorporates this touchpanel is obsolete and won't
be supported any more.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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