| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2012-11-15 | ARM: cti: fix manipulation of debug lock registers | Will Deacon | |
| The LOCKSTATUS register for memory-mapped coresight devices indicates whether or not the device in question implements hardware locking. If not, locking is not present (i.e. LSR.SLI == 0) and LAR is write-ignore, so software doesn't actually need to check the status register at all. This patch removes the broken LSR checks. Cc: Ming Lei <ming.lei@canonical.com> Reported-by: Mike Williams <michael.williams@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> | |||
| 2011-12-02 | arm: introduce cross trigger interface helpers | Ming Lei | |
| OMAP4 uses cross trigger interface(CTI) to route performance monitor irq to GIC, so introduce cti helpers to make access for cti easily. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Ming Lei <ming.lei@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com> | |||
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index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
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