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This is no longer used for anything, thus it can be removed.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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The new usage of determine_rate and set_rate_and_parent calls for
OMAP DPLLs assumes the DPLLs must have two parents defined, even
if it is the same clock. Legacy clock data did not fullfill this
requirement and caused a boot crash. Fixed by adding the missing
parent information to the DPLL clocks.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Fixes: 2e1a7b014f ("ARM: OMAP3+: DPLL: use determine_rate() and...")
Cc: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Reported-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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Currently, DPLLs are hiding the gory details of switching parent
within set_rate, which confuses the common clock code and is wrong.
Fixed by applying the new determine_rate() and set_rate_and_parent()
functionality to any clock-ops previously using the broken approach.
This patch also removes the broken legacy code.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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all OMAP3 platforms
Commit 7b2e1277598e4187c9be3e61fd9b0f0423f97986 ("ARM: OMAP3: clock:
Back-propagate rate change from cam_mclk to dpll4_m5") enabled clock
rate back-propagation from cam_mclk do dpll4_m5 on OMAP3630 only.
Perform back-propagation on other OMAP3 platforms as well.
Reported-by: Jean-Philippe François <jp.francois@cynove.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: <stable@kernel.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"Changes to existing drivers:
- Use of managed resources - omap, twl4030, ti_am335x_tscadc
- Advanced error handling - omap
- Rework clk management - omap
- Device Tree (re-)work - tc3589x, pm8921, da9055, sec
- IRC management overhaul and !BROKEN - pm8921
- Convert to regmap - ssbi, pm8921
- Use simple power-management ops - ucb1x00
- Include file clean-up - adp5520, cs5535, janz, lpc_ich,
- lpc_sch, max14577, mcp-sa11x0, pcf50633-adc, rc5t583,
rdc321x-southbridge, retu, smsc-ece1099, ti-ssp, ti_am335x_tscadc,
tps65912, vexpress-config, wm8350, ywm8350
- Various bug fixes across the subsystem
- NULL/invalid pointer dereference prevention
- Resource leak mitigation,
- Variable used initialised
- Staticise various containers
- Enforce return value checks
New drivers/supported devices:
- Add support for s2mps14 and s2mpa01 to sec
- Add support for da9063 (v5) to da9063
- Add support for atom-c2000 to gpio-ich
- Add support for come-{mbt10,cbt6,chl6} to kempld
- Add support for da9053 to da9052
- Add support for itco-wdt (v3) and baytrail to lpc_ich
- Add new drivers for tps65218, rtsx_usb, bcm590xx
(Re-)moved drivers:
- twl4030 ==> drivers/iio
- ti-ssp ==> /dev/null"
* tag 'mfd-for-linus-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (103 commits)
mfd: wm5110: Correct default for HEADPHONE_DETECT_1
mfd: arizona: Correct small errors in the DT binding documentation
mfd: arizona: Mark DSP clocking register as volatile
mfd: devicetree: bindings: Add pm8xxx RTC description
mfd: kempld-core: Fix potential hang-up during boot
mfd: sec-core: Fix uninitialized 'regmap_rtc' on S2MPA01
mfd: tps65910: Fix regmap_irq_chip_data leak on mfd_add_devices fail
mfd: tps65910: Fix possible invalid pointer dereference on regmap_add_irq_chip fail
mfd: sec-core: Fix I2C dummy device resource leak on probe failure
mfd: sec-core: Add of_compatible strings for clock MFD cells
mfd: Remove obsolete ti-ssp driver
Documentation: mfd: s2mps11: Describe S5M8767 and S2MPS14 clocks
mfd: bcm590xx: Fix type argument for module device table
mfd: lpc_ich: Add support for Intel Bay Trail SoC
mfd: lpc_ich: Add support for NM10 GPIO
mfd: lpc_ich: Change Avoton to iTCO v3
watchdog: iTCO_wdt: Add support for v3 silicon
mfd: lpc_ich: Add support for iTCO v3
mfd: lpc_ich: Remove lpc_ich_cfg struct use
mfd: lpc_ich: Only configure watchdog or GPIO when present
...
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Not all revisions have all the clocks so get the necessary clocks
based on hardware revision.
This should avoid un-necessary clk_get failure messages that were
observed earlier.
Also remove the dummy USB host clocks from the OMAP3 clock data.
These are no longer expected by the driver.
Acked-by: Mike Turquette <mturquette@linaro.org> [OMAP3 CLK data]
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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If CLK_SET_RATE_PARENT is set for a clkoutx2 clock, calling
clk_set_rate() on the clock "skips" the x2 multiplier as there are no
set_rate and round_rate functions defined for the clkoutx2.
This results in getting double the requested clock rates, breaking the
display on omap3430 based devices. This got broken when
d0f58bd3bba3877fb1af4664c4e33273d36f00e4 and related patches were merged
for v3.14, as omapdss driver now relies more on the clk-framework and
CLK_SET_RATE_PARENT.
This patch implements set_rate and round_rate for clkoutx2.
Tested on OMAP3430, OMAP3630, OMAP4460.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into xxx-dt
Several OMAP2+ DSS-related clock fixes for v3.13 from Tomi Valkeinen.
Basic test logs at:
http://www.pwsan.com/omap/testlogs/clock_fixes_v3.13/20131024090906/
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dpll4_m3_ck and dpll4_m4_ck have divider bit fields which are 6 bits
wide. However, only values from 1 to 32 are allowed. This means we have
to add a divider tables and list the dividers explicitly.
I believe the same issue is there for other dpll4_mx_ck clocks, but as
I'm not familiar with them, I didn't touch them.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Set CLK_SET_RATE_PARENT flag for dss1_alwon_fck_3430es2,
dss1_alwon_fck_3430es1 and dpll4_m4x2_ck so that the DSS's fclk can be
configured without the need to get the parent's parent of the fclk.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Adding this driver as platform device and only for RX-51 until somebody test if
it working also on other OMAP3 HS devices and until there will be generic ARM
way to deal with SMC calls.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[tony@atomide.com: folded in the clock alias change]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We don't need multiple aliases for the OMAP USB host clocks and neither
the dummy clocks so remove them.
CC: Paul Walmsley <paul@pwsan.com>
CC: Rajendra Nayak <rnayak@ti.com>
CC: Benoit Cousson <b-cousson@ti.com>
CC: Mike Turquette <mturquette@linaro.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
[paul@pwsan.com: updated against v3.10-rc4]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Convert the device data for the OMAP3 AES crypto IP
from explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Convert the device data for the OMAP3 SHAM2 (SHA1/MD5) crypto IP
from explicit platform_data to hwmod.
CC: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mark A. Greer <mgreer@animalcreek.com>
[paul@pwsan.com: updated to use per-SoC registration lists for GP-only hwmods;
fixed lines causing sparse warnings]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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The patch removes all the CK_* which were used to identify the family of
processors for which the individual clocks belonged to. Instead now separate
lists are created based on the family of processors.
Boot Tested on: OMAP4430, OMAP4460, Beagle-board, AM33X boards, OMAP2 boards.
Signed-off-by: J Keerthy <j-keerthy@ti.com>
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: changed omap_clock_register_links() to omap_clocks_register();
updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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The cam_mclk clock is generated through the following clocks chain:
dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
As dpll4_m5 and dpll4_m5x2 do not driver any clock other than cam_mclk,
back-propagate the cam_clk rate changes up to dpll4_m5.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
Tested-by: Sakari Ailus <sakari.ailus@iki.fi>
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The ETM/ETB drivers for OMAP3, enable the emu_src_ck clock in order
to access the ETM/ETB hardware. The emu_src_ck should enable the EMU
clock domain so that the ETM/ETB hardware is accessible. However,
currently when enabling the emu_src_ck the EMU clock domain is not
being enabled and so the ETM/ETB drivers are failing. Add enable/disable
clock functions to enable the EMU clock domain when enabling the
emu_src_ck.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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The patch is the output from a python script which converts
from the old OMAP clk format to COMMON clk format using a
JSON parser in between which was developed by Paul Walmsley.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: AM3517/05: dropped bogus hsotgusb "ick" and "fck"
clkdev aliases; added hsotgusb_fck alias; added emac_ick and emac_fck
aliases; replace omap2_init_clksel_parent() with
omap2_clksel_find_parent_index(); reflow macros and parent name
lists; add clkdm_name argument to DEFINE_STRUCT_CLK_HW_OMAP macros]
Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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