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path: root/arch/arm/mach-ux500/db8500-regs.h
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2013-06-04ARM: ux500: avoid warning in ux500_read_asicidArnd Bergmann
phys_addr_t may be 64 bit, which causes this harmless warning in ux500_read_asicid: arch/arm/mach-ux500/id.c: In function 'ux500_read_asicid': arch/arm/include/asm/io.h:159:19: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define IOMEM(x) ((void __force __iomem *)(x)) ^ arch/arm/mach-ux500/id.c:40:9: note: in expansion of macro 'readl' return readl(IOMEM(UX500_VIRT_ROM + (addr & 0xfff))); We can solve this in a nicer way by making UX500_VIRT_ROM have a proper type to start with and calculating the address using pointer arithmetic. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27ARM: ux500: Remove incorrect DB9540 PRCMU TCDM base locationLee Jones
The Tightly Coupled Data Memory for the DB9540 is actually in the same place as the DB8500's. This definition is just plain wrong. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-08ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>Linus Walleij
This removes <mach/hardware.h> and <mach/db8500-regs.h> from the Ux500, merging them into the local include "db8500-regs.h" in mach-ux500. There is some impact outside the ux500 machine, but most of it is dealt with in earlier patches. Contains portions of a clean-up patch from Arnd Bergmann. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>