| Age | Commit message (Collapse) | Author |
|---|
|
ExynosAutov9 pin controller capable of wake-ups is still compatible with
Exynos7, however it does not mux interrupts. Add Exynos7 compatible
fallback to annotate that compatibility and match the bindings.
Link: https://lore.kernel.org/r/20231122200407.423264-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
ExynosAutov9 reuses several devices from older designs, thus historically
we kept the old (block's) compatible only. This works fine and there is
no bug here, however guidelines expressed in
Documentation/devicetree/bindings/writing-bindings.rst state that:
1. Compatibles should be specific.
2. We should add new compatibles in case of bugs or features.
Add compatibles specific to ExynosAutov9 in front of all old-SoC-like
compatibles. This will also help reviews of new code using existing
DTS as template. No functional impact on Linux drivers behavior.
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20231108104343.24192-18-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Add pwm node to support fan on exynosautov9-sadk board.
PWM channel 3 of ExynosAutov9 is connected to fan for SoC cooling
in SADK board.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Link: https://lore.kernel.org/r/20230718062200.79306-3-jaewon02.kim@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Add missing whitespace between node name/label and opening {.
Link: https://lore.kernel.org/r/20230705145942.293527-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Exynosautov9 has several different SYSREGs, so use dedicated compatibles
for them.
Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20221214044342.49766-5-sriranjani.p@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Add cmu_fsys0 and cmu_fsys1 for PCIe clocks and USB/MMC clocks
respectively.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
[krzk: put nodes ordered by unit address]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/50f8145bca30cf5c900359d0b78c1c617090e021.1659054220.git.chanho61.park@samsung.com
|
|
Universal Serial Interface (USI) supports three types of serial interface
such as Universal Asynchronous Receiver and Transmitter (UART), Serial
Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C).
Each protocols can be working independently and configured as one of
those using external configuration inputs.
Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c
and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode.
So, we can define one USI node that includes serial/spi and hsi2c.
usi_i2c nodes can be used only for i2c mode.
We can have below combinations for one USI.
1) The usi node is used either 4 pin uart or 4 pin spi
-> No usi_i2c can be used
2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL)
-> usi_i2c should be enabled to use the latter i2c
3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL)
-> usi_i2c should be enabled to use the latter i2c
By default, all USIs are initially set to uart mode by below setting.
samsung,mode = <USI_V2_UART>;
You can change it either USI_V2_SPI or USI_V2_I2C.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com
|
|
Before adding whole USI nodes, this applies the changes of usi0 in
advance. To be the usi0 and serian_0 nodes as SoC default, some
properties should be moved to exynosautov9-sadk.dts.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
|
|
Add an ARM pl330 dma controller DT node as pdma0.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com
|
|
Add ufs_1_phy and ufs_1 for secondary ufs hci controller and phy
device.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220607070251.15795-2-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Drop "ufs0-" label name usage of ufs phy and hci nodes.
Regarding the comments of reg properties, we don't need to illustrate here
because we can find the description from the dt-binding doc.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220602053250.62593-5-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220526204323.832243-1-krzysztof.kozlowski@linaro.org
|
|
Adds two CPU watchdog devices for ExynosAutov9 SoC.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220523113919.59571-4-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Reboot of exynosautov9 SoC can be handled by setting the
bit(SWRESET_SYSTEM[1]) of SYSTEM_CONFIGURATION register(PMU + 0x3a00).
syscon-reboot-mode can be used to indicate the reboot mode for
bootloader. SYSIP_DAT0 register(PMU + 0x810) will not be cleared after
reboot so bootloader can enter the boot mode according to the value.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220523121244.67341-3-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Use cmu_fsys's clock node instead of dummy UFS clock node.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20220504075154.58819-13-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Use CMU clock nodes instead of dummy fixed-rate-clock.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20220504075154.58819-12-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
Add cmu_top, cmu_busmc, cmu_core, cmu_fsys and peric0/c1/s clock nodes.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20220504075154.58819-11-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
|
The external oscillator - XTCXO - is an input to the SoC. It is defined
in the Exynos Auto v9 SoC DTSI, because all boards will provide it and
clock controller bindings expect it, however the actual frequency of the
clock should be determined by the board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220503092631.174713-1-krzysztof.kozlowski@linaro.org
|
|
Older Samsung Exynos SoC pin controller nodes (Exynos3250, Exynos4,
Exynos5, Exynos5433) with external wake-up interrupts, expected to have
one interrupt for multiplexing these wake-up interrupts. Also they
expected to have exactly one pin controller capable of external wake-up
interrupts.
It seems however that newer ARMv8 Exynos SoC like Exynos850 and
ExynosAutov9 have differences:
1. No multiplexed external wake-up interrupt, only direct,
2. More than one pin controller capable of external wake-up interrupts.
Use dedicated ExynosAutov9 compatible for its external wake-up interrupts
controller to indicate the differences.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-22-krzysztof.kozlowski@canonical.com
|
|
Pull ARM SoC devicetree updates from Arnd Bergmann:
"As usual, this is the bulk of the updates for the SoC tree, adding
more devices to existing files, addressing issues from ever improving
automated checking, and fixing minor issues.
The most interesting bits as usual are the new platforms. All the
newly supported SoCs belong into existing families this time:
- Qualcomm gets support for two newly announced platforms, both of
which can now work in production environments: the SDX65 5G modem
that can run a minimal Linux on its Cortex-A7 core, and the
Snapdragon 8 Gen 1, their latest high-end phone SoC.
- Renesas adds support for R-Car S4-8, the most recent automotive
Server/Communication SoC.
- TI adds support for J721s2, a new automotive SoC in the K3 family.
- Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
generation following their popular MT76xx series. Only basic
support is added for now.
- NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
series.
- TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
have supported for a long time.
New boards with the existing SoCs include
- Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
- AT91/SAMA5 based evaluation board
- NXP gains twenty new development and industrial boards for their
i.MX and Layerscape SoCs
- Intel IXP4xx now supports the final two machines in device tree
that were previously only supported in old style board files.
- Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
MT8183 is used in the Acer Chromebook 314.
- Qualcomm gains support for the reference machines using the two new
SoCs, plus a number of Chromebook variants and phones based on the
Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
devices and the Microsoft Surface Duo 2.
- ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
- Tegra now boots various older Android devices based on 32-bit chips
out of the box, including a number of ASUS Transformer tablets.
There is also a new Jetson AGX Orin developer kit.
- Apple support adds the missing device trees for all the remaining
M1 Macbook and iMac variants, though not yet the M1 Pro/Max
versions.
- Allwinner now supports another version of the Tanix TX6 set-top box
based on the H6 SoC.
- Broadcom gains support for the Netgear RAXE500 Wireless router
based on BCM4908"
* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
arm64: dts: qcom: sm8450-qrd: Enable USB nodes
arm64: dts: qcom: sm8450: Add usb nodes
ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
ARM: dts: aspeed: add LCLK setting into LPC IBT node
ARM: dts: aspeed: p10: Add TPM device
ARM: dts: aspeed: p10: Enable USB host ports
ARM: dts: aspeed: Add TYAN S8036 BMC machine
ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
ARM: dts: aspeed: Adding Facebook Bletchley BMC
ARM: dts: aspeed: g220a: Enable secondary flash
ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
ARM: dts: aspeed: Add secure boot controller node
dt-bindings: aspeed: Add Secure Boot Controller bindings
ARM: dts: Remove "spidev" nodes
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
...
|
|
According to USI v2 driver change[1], serial_0 node should be converted to
use the USI node hierarchy. syscon_peric0 will be used as a syscon node
to control the USI00_USI_SW_CONF register.
This also changes the serial node name from uart@ to serial@.
[1]: https://lore.kernel.org/linux-samsung-soc/20211204195757.8600-2-semen.protsenko@linaro.org/
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211208091853.8557-1-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
samsung,ufs-shareability-reg-offset is not necessary anymore since it
was integrated into the second argument of samsung,sysreg.
Fixes: 31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211102064826.15796-1-chanho61.park@samsung.com
Link: https://lore.kernel.org/r/20211124085042.9649-2-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
It can be compatible with exynos850's chipid. The SoC has eight chipid
registers that can be used for OTP.
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211021012017.158919-3-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|
Add minimal support for ExynosAuto v9 SoC[1].
- Enumarate all pinctrl nodes
- UART with exynos850 compatible
- UFS0 HCI + Phy
Like exynos850, this also uses fixed-rate clock nodes until clock driver
has been supported. The clock nodes are initialized on bootloader stage
thus we don't need to control them so far.
[1]: https://www.samsung.com/semiconductor/minisite/exynos/products/automotiveprocessor/exynos-auto-v9/
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211012002314.38965-3-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
