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2022-09-17arm64: dts: ls1028a-rdb: add more ethernet aliasesVladimir Oltean
Commit "arm64: dts: ls1028a: enable swp5 and eno3 for all boards" which Shawn declared as applied, but for which I can't find a sha1sum, has enabled a new Ethernet port on the LS1028A-RDB (&enetc_port3), but U-Boot, which passes a MAC address to Linux' device tree through the /aliases node, fails to do this for this newly enabled port. Fix that by adding more ethernet aliases in the only backwards-compatible way possible: at the end of the current list. And since it is possible to very easily convert either swp4 or swp5 to DSA user ports now (which have a MAC address of their own), using these U-Boot commands: => fdt addr $fdt_addr_r => fdt rm /soc/pcie@1f0000000/ethernet-switch@0,5/ports/port@4 ethernet it would be good if those DSA user ports (swp4, swp5) gained a valid MAC address from U-Boot as well. In order for that to work properly, provision two more ethernet aliases for &mscc_felix_port{4,5} as well. The resulting ordering is slightly unusual, but to me looks more natural than eno0, eno2, swp0, swp1, swp2, swp3, eno3, swp4, swp5. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a: enable swp5 and eno3 for all boardsVladimir Oltean
In order for the LS1028A based boards to benefit from support for multiple CPU ports, the second DSA master and its associated CPU port must be enabled in the device trees. This does not change the default CPU port from the current port 4. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls1028a: move DSA CPU port property to the common SoC dtsiVladimir Oltean
Since the CPU port 4 of the switch is hardwired inside the SoC to go to the enetc port 2, this shouldn't be something that the board files need to set (but whether that CPU port is used or not is another discussion). So move the DSA "ethernet" property to the common dtsi. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-11arm64: dts: ls1028a: default to OTG mode for USBMichael Walle
At the moment, the dtsi will force the dr_mode to host. This is problematic because it will always turn on the Vbus voltage regardless if the port is host or device. This might lead to a "shortcut" between the two USB endpoints because both might have their Vbus supplies enabled. Therefore, the default should be "otg" for any ports which aren't host only (from a SoC point of view) and have a user of the dtsi file overwrite that explicitly. Move the 'dr_mode = "host";' into the board dts. Now that the dtsi doesn't set the dr_mode anymore, we can also drop the 'dr_mode = "otg";' in the board dts because that is the default value if dr_mode is not set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a-rdb: enable pwm0Biwen Li
Enable pwm0 on ls1028a-rdb board which uses flextimer1. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-16arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup sourceBiwen Li
Add flextimer2 based ftm_alarm1 node and enable it to be the default rtc wakeup source for rdb and qds boards instead of the original flextimer1 which is used by PWM. The ftm_alarm0 node hence is disabled by default. Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14arm64: dts: ls1028a-rdb: update copyrightVladimir Oltean
Company policy requires that copyright is updated when a file is touched. Keeping the copyright change separate to reduce the noise in other patches. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14arm64: dts: ls1028a-rdb: add aliases for the Ethernet portsVladimir Oltean
These are used by U-Boot, and are required for keeping the device trees in sync. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14arm64: dts: ls1028a-rdb: add an alias for the FlexSPI controllerVladimir Oltean
This is used by U-Boot and is required for keeping the device trees in sync. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14arm64: dts: ls1028a-rdb: sort nodes alphabetically by labelVladimir Oltean
In preparation for this board's device tree synchronization with U-Boot, we must find a common node ordering pattern. Alphabetical sounds about right. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04arm64: dts: ls1028a: use phy-mode instead of phy-connection-typeMichael Walle
In linux both are identical, phy-mode is used more often, though. Also for the ls1028a both phy-connection-type and phy-mode was used, one for the enetc nodes and the other for the switch nodes. Unify them. But the main reason for this is that the device tree files can be shared with the u-boot ones; there the enetc driver only supports the "phy-mode" property. Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04arm64: dts: ls1028a: move PHY nodes to MDIO controllerMichael Walle
Move the PHY nodes from the network controller to the dedicated MDIO controller. According to Vladimir Oltean direct MDIO access via the PF, that is when the PHY is put under the "mdio" subnode, is defeatured and in fact the latest reference manual isn't mentioning it anymore. Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-04arm64: dts: ls1028a: disable usb controller by defaultMichael Walle
One of the last devices which are enabled by default are the USB controllers. Although the pins are not multi-function pins, some boards might not use USB at all. Apply the "disabled-by-default" style also for the USB controllers and enable the controllers in the actual device tree of the boards. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-05-11arm64: dts: ls1028a-rdb: enable optee nodeSahil Malhotra
optee node was disabled by default, enabling it for ls1028a-rdb. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: ls1028a: move rtc alias to individual boardsMichael Walle
The aliases are board-specific and shouldn't be included in the common SoC dtsi. Move them over to the boards. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-30arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDSKuldeep Singh
LS1028A-RDB/QDS provides support for flexcan. Add the properties. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-12-01arm64: dts: ls1028a: make the eMMC and SD card controllers use fixed indicesVladimir Oltean
As the boot order in the kernel continues to change, sometimes it may happen that the eSDHC controller mmc@2150000 (the one for eMMC) gets probed before the one at mmc@2140000 (for external SD cards). The effect is that the eMMC controller gets the /dev/mmcblk0 name, and the SD card gets /dev/mmcblk1. Since the introduction of this SoC, that has never happened in practice, even though it was never guaranteed in theory. Setting "root=/dev/mmcblk0p2" in /proc/cmdline has always caused the kernel to use the second partition from the SD card as the rootfs. The NXP development boards are typically shipped with either - LSDK, which uses "root=UUID=", or - OpenIL, which uses "root=/dev/mmcblkNp2" So for OpenIL, let's preserve that old behavior by adding some aliases which create naming consistency (for LSDK it doesn't matter): - the SD card controller uses /dev/mmcblk0 - the eMMC controller uses /dev/mmcblk1 For the Kontron SL28 boards, Michael Walle says that they are shipped with "root=UUID=" already, so the probing order doesn't matter, but it is more natural to him for /dev/mmcblk0 to be the eMMC, so let's do it the other way around there. The aliases are parsed by mmc_alloc_host() in drivers/mmc/core/host.c. Cc: Ashish Kumar <Ashish.Kumar@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Michael Walle <michael@walle.cc> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-11arm64: dts: fsl-ls1028a-rdb: Specify in-band mode for ENETC port 0Claudiu Manoil
As part of the transition of the enetc ethernet driver from phylib to phylink, the in-band operation mode of the SGMII interface from enetc port 0 needs to be specified explicitly for phylink. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-03-16arm64: dts: ls1028a: disable the felix switch by defaultMichael Walle
Disable the felix switch by default and enable it per board which are actually using it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: ls1028a: enable switch PHYs on RDBClaudiu Manoil
Link the switch PHY nodes to the central MDIO controller PCIe endpoint node on LS1028A (implemented as PF3) so that PHYs are accessible via MDIO. Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514 quad PHY is capable of in-band-status. The PHYs are used in poll mode due to an issue with the interrupt line on current revisions of the LS1028A-RDB board. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: ls1028a: disable all enetc ports by defaultVladimir Oltean
There are few boards that enable all ENETC ports, so instead of having board DTs disable them, do so in the DTSI and have the boards enable the ports they use. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23arm64: dts: ls1028a-rdb: enable emmc hs400 modeYinbo Zhu
This patch is to enable emmc hs400 mode for ls1028ardb. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11arm64: dts: ls1028a: Add FlexSPI supportAshish Kumar
Add fspi node property for LS1028A SoC for FlexSPI driver. Property added for FlexSPI controller and for the connected slave device for the LS1028ARDB and LS1028AQDS target. RDB and QDS are having one SPI-NOR flash device, mt35xu02g connected at CS0. This flash device "mt35xu02g" is tested for octal read Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-14arm64: dts: enable otg mode for dwc3 usb ip on layerscapeYinbo Zhu
layerscape otg function should be supported HNP SRP and ADP protocol accroing to rm doc, but dwc3 code not realize it and use id pin to detect who is host or device(0 is host 1 is device) this patch is to enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-19arm64: dts: ls1028a: Add esdhc node in dtsAshish Kumar
This patch is to add esdhc node and enable SD UHS-I, eMMC HS200 for ls1028ardb/ls1028aqds board. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-18arm64: dts: ls1028a: add crypto nodeHoria Geantă
LS1028A has a SEC v5.0 compatible security engine. Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-13arm64: dts: ls1028a: Add temperature sensor nodeYuantian Tang
Add nxp sa56004 chip node for temperature monitor. Signed-off-by: Yuantian Tang <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-05arm64: dts: ls1028a: Enable sata.Peng Ma
Change the sata node to enable sata. Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-19arm64: dts: ls1028a: Add Audio DT nodesAlison Wang
This patch adds Audio DT nodes for LS1028ARDB and LS1028AQDS boards. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-01arm64: dts: fsl: ls1028a-rdb: Add ENETC external eth ports for the LS1028A ↵Claudiu Manoil
RDB board The LS1028A RDB board features an Atheros PHY connected over SGMII to the ENETC PF0 (or Port0). ENETC Port1 (PF1) has no external connection on this board, so it can be disabled for now. Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2018-12-08arm64: dts: Add support for NXP LS1028A SoCBhaskar Upadhaya
LS1028A contains two ARM v8 CortexA72 processor cores with 32 KB L1-D cache and 48 KB L1-I cache Features summary Two 32-bit / 64-bit ARM v8 Cortex-A72 CPUs - Arranged as single clusters of two cores sharing a 1 MB L2 cache - Speed Up to 1.3 GHz - Support for cluster power-gating. Cache coherent interconnect (CCI-400) - Hardware-managed data coherency - Up to 400 MHz 32-bit DDR4 SDRAM memory controller with ECC Two PCIe 3.0 controllers One serial ATA (SATA 3.0) controller Two high-speed USB 3.0 controllers with integrated PHY Following levels of DTSI/DTS files have been created for the LS1028A SoC family: - fsl-ls1028a.dtsi: DTS-Include file for NXP LS1028A SoC. - fsl-ls1028a-qds.dts: DTS file for NXP LS1028A QDS board. - fsl-ls1028a-rdb.dts: DTS file for NXP LS1028A RDB board Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>