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"make dtbs_check":
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: pca9547@77: $nodename:0: 'pca9547@77' does not match '^(i2c-?)?mux'
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: pca9547@77: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@4' were unexpected)
From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
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Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Describe the IRQs for both the QSGMII PHYs and the 10GBASE-R PHY found
on the LS1088ARDB board.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fix interrupt line for RTC node on ls1088ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Annotate the external MDIO2 node and describe the 10GBASER PHY found on
the LS1088ARDB board and add a phy-handle for DPMAC2 to link it.
Also, add the internal PCS MDIO node for the internal MDIO buses found
on the LS1088A SoC along with its internal PCS PHY and link the
corresponding DPMAC to the PCS through the pcs-handle.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Annotate the external MDIO1 node and describe the 8 QSGMII PHYs found on
the LS1088ARDB board and add phy-handles for DPMACs 3-10 to its
associated PHY. Also, add the internal PCS MDIO nodes for the internal
MDIO buses found on the LS1088A SoC along with their internal PCS PHY
and link the corresponding DPMAC to the PCS through the pcs-handle.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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This patch is to add eMMC HS200 speed mode support on ls1088ardb
whose controller and peripheral circut support such capability.
And clocks dts property is needed for driver to get peripheral
clock value used for this speed mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add QSPI node in dtsi(ls1088a), and dts(ls1088ardb, ls1088aqds) boards.
Both ls1088ardb and ls1088aqds has two 64MB flash from SPANSION(s25fs512s).
QUAD I/O is tested in case of read and single I/O is tested in case of
write.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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layerscape otg function should be supported HNP SRP and ADP protocol
accroing to rm doc, but dwc3 code not realize it and use id pin to
detect who is host or device(0 is host 1 is device) this patch is to
enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Replace license text with corresponding SPDX identifiers and update the
format of existing SPDX identifiers to follow the new guideline
Documentation/process/license-rules.rst.
Note that some of the files mentioned X11 license previously but the
license text actually matches MIT license.
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add USB support on ls1088ardb
Signed-off-by: yinbo zhu <yinbo.zhu@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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LS1088AQDS consist of NOR, NAND and FPGA connected over IFC
LS1088ARDB consist of NAND and FPGA connected over IFC.
So add flash information in ifc node of device tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add esdhc node for ls1088a and enable it on both RDB and QDS boards.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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LS1088A contains eight ARM v8 CortexA53 processor cores
with 32 KB L1-D cache and 32 KB L1-I cache
Features summary
Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
- Arranged as two clusters of four cores sharing a 1 MB L2 cache
- Speed Up to 1.5 GHz
- Support for cluster power-gating.
Cache coherent interconnect (CCI-400)
- Hardware-managed data coherency
- Up to 700 MHz
One 64-bit DDR4 SDRAM memory controller with ECC
Data path acceleration architecture 2.0 (DPAA2)
Three PCIe 3.0 controllers
One serial ATA (SATA 3.0) controller
Three high-speed USB 3.0 controllers with integrated PHY
Following levels of DTSI/DTS files have been created for the LS1088A
SoC family:
- fsl-ls1088a.dtsi:
DTS-Include file for NXP LS1088A SoC.
- fsl-ls1088a-qds.dts:
DTS file for NXP LS1088A QDS board.
- fsl-ls1088a-rdb.dts:
DTS file for NXP LS1088A RDB board
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>`
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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