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2023-05-14arm64: dts: freescale: add missing cache propertiesKrzysztof Kozlowski
As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: fsl-ls2080a-simu.dtb: l2-cache3: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-15arm64: dts: Update cache properties for freescalePierre Gondois
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Chester Lin <clin@suse.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.Pankaj Bansal
NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1. However this problem has been fixed in A72 core cluster used in LS2088. Therefore remove the erratum from LS2088A. Keeping it only in LS2085. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Reviewed-by: Sandeep Malik <sandeep.malik@nxp.com> Acked-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-06-12arm64: dts: freescale: Separate each group of data in the property 'reg'Zhen Lei
Do not write the 'reg' of multiple groups of data into a uint32 array, use <> to separate them. Otherwise, the errors similar to the following will be reported by reg.yaml. arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dt.yaml: soc: pcie@3400000:reg:0: \ [0, 54525952, 0, 1048576, 64, 0, 0, 8192] is too long Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: ls208xa: use constants in the clockgen phandleMichael Walle
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-03arm64: dts: freescale: Add missing cooling device properties for CPUsViresh Kumar
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-06-19arm64: dts: freescale: Update to use SPDX identifiersLi Yang
Replace license text with corresponding SPDX identifiers and update the format of existing SPDX identifiers to follow the new guideline Documentation/process/license-rules.rst. Note that some of the files mentioned X11 license previously but the license text actually matches MIT license. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-08-14arm64: dts: ls208xa: add cpu idle supportYuantian Tang
ls208xa supports another cpu idle state which is pw20 which saves more power when cpu is idle. It was implemented through psci firmware. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-05-15arm64: dts: freescale: update the copyright claimsLi Yang
Update the copyright claims to comply with company policy. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-07arm64: dts: freescale: ls2080a: Split devicetree for code resuabilityAbhimanyu Saini
LS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc. Reorganize the LS2080A device tree to move the common nodes to: - fsl-ls208xa.dtsi - fsl-ls208xa-rdb.dtsi - fsl-ls208xa-qds.dtsi Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-12-15Merge tag 'armsoc-dt64' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "A couple of interesting new SoC platforms are now supported, these are the respective DTS sources: - Samsung Exynos5433 mobile phone platform, including an (almost) fully supported phone reference board. - Hisilicon Hip07 server platform and D05 board, the latest iteration of their product line, now with 64 Cortex-A72 cores across two sockets. - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product line, used in Android tablets and ultra-cheap development boards - NXP LS1046A Communication processor, improving on the earlier LS1043A with faster CPU cores - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810) mobile phone SoCs - Early support for the Nvidia Tegra Tegra186 SoC - Amlogic S905D is a minor variant of their existing Android consumer product line - Rockchip PX5 automotive platform, a close relative of their popular rk3368 Android tablet chips Aside from the respective evaluation platforms for the above chips, there are only a few consumer devices and boards added this time: - Huawei Nexus 6P (Angler) mobile phone - LG Nexus 5x (Bullhead) mobile phone - Nexbox A1 and A95X Android TV boxes - Pine64 development board based on Allwinner A64 - Globalscale Marvell ESPRESSOBin community board based on Armada 3700 - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board For the existing platforms, we get bug fixes and new peripheral support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin, and ZTE" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits) arm64: dts: fix build errors from missing dependencies ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible ARM64: dts: meson-gxl: Add support for Nexbox A95X ARM64: dts: meson-gxm: Add support for the Nexbox A1 ARM: dts: artpec: add pcie support arm64: dts: berlin4ct-dmp: add missing unit name to /memory node arm64: dts: berlin4ct-stb: add missing unit name to /memory node arm64: dts: berlin4ct: add missing unit name to /soc node arm64: dts: qcom: msm8916: Add ddr support to sdhc1 arm64: dts: exynos: Enable HS400 mode for eMMC for TM2 ARM: dts: Add xo to sdhc clock node on qcom platforms ARM64: dts: Add support for Meson GXM dt-bindings: add rockchip RK1108 Evaluation board arm64: dts: NS2: Add PCI PHYs arm64: dts: NS2: enable sdio1 arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash arm64: tegra: Add NVIDIA P2771 board support arm64: tegra: Enable PSCI on P3310 arm64: tegra: Add NVIDIA P3310 processor module support arm64: tegra: Add GPIO controllers on Tegra186 ...
2016-11-29ARM64: dts: ls2080a: add device configuration nodeyangbo lu
Add the dts node for device configuration unit that provides general purpose configuration and status for the device. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Scott Wood <oss@buserror.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-11-18Merge tag 'imx-dt64-4.10' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64 Freescale arm64 device tree updates for 4.10: - Enable Thermal Monitoring Unit (TMU) for thermal management on LS1043A and LS2080A. - Add support for LS1046A SoC, which has similar peripherals as LS1043A but integrates 4 A72 cores. - Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB. * tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: ls2080a: Add TMU device tree support for LS2080A arm64: dts: ls1043a: Add TMU device tree support for LS1043A arm64: dts: add LS1046A-QDS board support Documentation: DT: Add entry for QorIQ LS1046A-QDS board arm64: dts: add LS1046A-RDB board support Documentation: DT: Add entry for QorIQ LS1046A-RDB board arm64: dts: add QorIQ LS1046A SoC support dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen dt-bindings: i2c: adds two more nxp devices dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-15arm64: dts: ls2080a: Add TMU device tree support for LS2080AHongtao Jia
Also add nodes and properties for thermal management support. Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-10-21arm64: dts: Add timer erratum property for LS2080A and LS1043AScott Wood
Both the LS1043A and LS2080A platforms are affected by the Freescale A008585 erratum. Advertise it in their respective device trees. Signed-off-by: Scott Wood <oss@buserror.net> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-10-14Merge branch 'for-4.9' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: - Write same support added - Minor ahci MSIX irq handling updates - Non-critical SCSI command translation fixes - Controller specific changes * 'for-4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ahci: qoriq: Revert "ahci: qoriq: Disable NCQ on ls2080a SoC" libata: remove <asm-generic/libata-portmap.h> libata: remove unused definitions from <asm/libata-portmap.h> pata_at91: Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR ata: Replace BUG() with BUG_ON(). ata: sata_mv: Replacing dma_pool_alloc and memset with a single call dma_pool_zalloc. libata: Some drives failing on SCT Write Same ahci: use pci_alloc_irq_vectors libata: SCT Write Same handle ATA_DFLAG_PIO libata: SCT Write Same / DSM Trim libata: Add support for SCT Write Same libata: Safely overwrite attached page in WRITE SAME xlat ahci: also use a per-port lock for the multi-MSIX case ARM: dts: STiH407-family: Add ports-implemented property in sata nodes ahci: st: Add ports-implemented property in support ahci: qoriq: enable snoopable sata read and write ahci: qoriq: adjust sata parameter libata-scsi: fix MODE SELECT translation for Control mode page libata-scsi: use u8 array to store mode page copy
2016-09-14Merge branch 'dt/irq-fix' into next/dt64Arnd Bergmann
* dt/irq-fix: arm64: dts: Fix broken architected timer interrupt trigger This resolves a non-obvious conflict between a bugfix from v4.8 and a cleanup for the exynos7 platform.
2016-09-14arm64: dts: Fix broken architected timer interrupt triggerMarc Zyngier
The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for the corresponding ARM CPUs clearly shows that this is wrong, and I've corrected those. For non-ARM designs (and in the absence of a publicly available TRM), I've made them active low as well, which can't be completely wrong as the GIC cannot disinguish between level low and level high. The respective maintainers are of course welcome to prove me wrong. While I was at it, I took the liberty to fix a couple of related issue, such as some spurious affinity bits on ThunderX, and their complete absence on ls1043a (both of which seem to be related to copy-pasting from other DTs). Acked-by: Duc Dang <dhdang@apm.com> Acked-by: Carlo Caione <carlo@endlessm.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-09-09arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodesLiu Gang
The 'dma-coherent' indicates that the hardware IP block can ensure the coherency of the data transferred from/to the IP block. This can avoid the software cache flush/invalid actions, and improve the performance significantly. The PCI IP block of ls2080a has this capability, so adding this feature to improve the PCI performance. Signed-off-by: Liu Gang <Gang.Liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-08-30arm64: dts: Add DDR memory controller for Layerscape SoCsYork Sun
Add DDR memory controller nodes to enable EDAC driver. Signed-off-by: York Sun <york.sun@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-08-10ahci: qoriq: enable snoopable sata read and writeTang Yuantian
By default the SATA IP on the qoriq SoCs does not generating coherent/snoopable transactions. This patch enable it in the sata axicc register. In addition, the dma-coherent property must be set on the SATA controller nodes. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-06-21arm64: dts: ls2080a: Add cache nodes for cacheinfo supportLi Yang
Adds the cache nodes and next-level-cache property for the cacheinfo to work. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-11arm64: dts: ls2080a: Add dis_rxdet_inp3_quirk property to USB3 nodeRajesh Bhagat
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property is used to disable rx detection in P3 PHY mode. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-06-09arm64: dts: fsl: Update address-cells and reg properties of cpu nodesAlison Wang
MPIDR_EL1[63:32] value is equal to 0 for the CPUs of the LS1043A and LS2080A SoCs. The ARM CPU binding allows #address-cells to be set to 1, since MPIDR_EL1[63:32] bits are not used for CPUs identification. Update the #address-cells and reg properties accordingly. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-26arm64: dts: ls2080a: fsl-mc dt node updatesStuart Yoder
updates to the fsl-mc node for full functionality: -msi-parent is needed for interrupt support -ranges is needed to enable the bus driver to translate bus addresses -dpmac nodes provide a basis for relating dpmac objects to PHYs Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13arm64: dts: ls2080a: Add compatible "fsl,ls2080a-gpio" for ls2080a gpio nodesLiu Gang
The compatible "fsl,qoriq-gpio" is used by gpio driver: drivers/gpio/gpio-mpc8xxx.c to implement general gpio functionalities. The chip-specific compatible "fsl,ls2080a-gpio" may be used to fix potential gpio IP block errata or other chip-specific gpio issues. Signed-off-by: Liu Gang <Gang.Liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-04-13arm64: dts: ls2080a: update the DTS for QSPI and DSPI supportYuan Yao
Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-03-20Merge tag 'armsoc-dt64' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "The arm64 device tree changes make up an increasing portion of the overall changes, so they are kept separate from the 32-bit devicetree changes and from the other arm64 updates. Newly added SoCs and boards are: - 96Boards Husky board - AMD Overdrive board - Amlogic S905 SoC and related Tronsmart boxes - Annapurna Labs Alpine family and development board - Broadcom Vulcan servers - Broadcom Northstar 2 SoC - Marvell Armada 3700 family and development board - Qualcomm MSM8996 SoC Additional devices are enabled for existing platforms from Applied Micro, Hisilicon, Mediatek, Qualcomm, and Renesas and there are a couple of other updates for Rockchip, Xilinx and NXP/Freescale" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (102 commits) ARM64: dts: amlogic: Add Tronsmart Vega S95 configs Documentation: devicetree: amlogic: Document Tronsmart Vega S95 boards ARM64: dts: Prepare configs for Amlogic Meson GXBaby Documentation: devicetree: amlogic: Document Meson GXBaby devicetree: bindings: Add vendor prefix for Tronsmart arm64: dts: qcom: Fix MPP's function used for LED control arm64: dts: alpine: add the MSIX node in the Alpine v2 dtsi arm64: dts: add the Alpine v2 EVP arm64: dts: marvell: re-order Device Tree nodes for Armada AP806 arm64: dts: marvell: update Armada AP806 clock description arm64: dts: marvell: add Device Tree files for Armada 7K/8K arm64: dts: apm: Add DT node for X-Gene v2 SLIMpro Mailbox I2C Driver arm64: dts: apm: Mailbox device tree node for APM X-Gene v2 platform. arm64: dts: apm: Add DT node for X-Gene v1 SLIMpro Mailbox I2C Driver arm64: dts: apm: mailbox device tree node for APM X-Gene platform. arm64: dts: apm: Update GPIO to control power-off on X-Gene v2 platforms arm64: dts: apm: Update GPIO standby controller DT node for X-Gene v2 platforms arm64: dts: apm: Update GPIO to control power-off on X-Gene v1 platforms arm64: dts: salvator-x: enable USB 2.0 Host of channel 1 and 2 arm64: dts: salvator-x: enable usb2_phy of channel 1 and 2 ...
2016-02-24dts/ls2080a: Update PCIe compatibleMinghuan Lian
The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property. Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2016-02-14arm64: dts: ls2080a: Add quirk for Erratum A009116Lijun Pan
Add "snps,quirk-frame-length-adjustment" property to USB3 node for erratum A009116. This property provides value of GFLADJ_30MHZ for post silicon frame length adjustment. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-01-20Merge tag 'armsoc-dt64' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Olof Johansson: "This is the first release where we split up the 64-bit contributions a bit more, and in particular we are having a separate DT branch for them. Contents: - New devices added to Broadcom NorthStar2 - Misc fixes for Exynos7 boards - QCOM updates for MSM8916 - Rockchip tweaks for rk3368 SoC and eval board - A series of fixes for APM X-Gene v1 and v2 - Renesas R8A7795 CPU/PSCI additions - Marvell Berlin4CT PSCI, cpuidle, watchdog portions - Freescale LS1043a SoC and dev board support + some treewide or other misc changes" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (104 commits) dts/ls2080a: Update DTSI to add support of SP805 WDT Documentation: DT: Add entry for ARM SP805-WDT arm64: dts: X-Gene v2: I2C1 clock is always on arm64: dts: X-Gene v1: I2C0 clock is always on arm64: dts: Fix to use standard DT node names for X-Gene 1 and X-Gene 2 platforms arm64: dts: hikey: add label properties to UARTs arm64: dts: apq8016-sbc: add label properties for UART, I2C, and SPI arm64: dts: apq8016-sbc: enable UART0 on LS connector arm64: dts: juno: Add idle-states to device tree arm64: dts: Added syscon-reboot node for FSL's LS2080A SoC arm64: dts: add LS1043a-RDB board support arm64: dts: add Freescale LS1043a SoC support Documentation: DT: Add entry for Freescale LS1043a-RDB board arm64: dts: uniphier: add PH1-LD10 SoC/board support arm64: renesas: r8a7795: fix SATA clock assignment arm64: dts: salvator-x: Enable SATA controller arm64: dts: r8a7795: Add SATA controller node arm64: renesas: r8a7795: add internal delay for i2c IPs arm64: renesas: salvator-x: Add board part number to DT bindings arm64: dts: r8a7795: Add pmu device nodes ...
2015-12-31dts/ls2080a: Update DTSI to add support of SP805 WDTBhupesh Sharma
This patch updates the LS2080a DTSI (DTS Include) file to add support for eight SP805 Watchdog units which can be used to reset the eight Cortex-A57 cores available on LS2080A. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-22arm64: dts: Added syscon-reboot node for FSL's LS2080A SoCJ. German Rivera
Added sys-reboot node to the FSL's LS2080A SoC DT to leverage the ARM-generic reboot mechanism for this SoC. This mechanism is enabled through CONFIG_POWER_RESET_SYSCON. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-11ls2080a/dts: Add little endian property for GPIO IP blockLiu Gang
The GPIO block for ls2080a platform has little endian registers, the GPIO driver needs this property to read/write registers by right interface. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-12-11ARM64: dts: ls2080a: fix eSDHC endiannessyangbo lu
Add the "little-endian" property to fix the issue that eSDHC is not working and dumping out "mmc0: Controller never released inhibit bit(s)." error messages constantly. Fixes: 5461597f6ce0 ("dts/ls2080a: Update DTSI to add support of various peripherals") Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2015-10-23dts/ls2080a: Remove text about writing to Free Software FoundationBhupesh Sharma
Checkpatch complains about the text suggesting writing to Free Software Foundation for GPLv2 license copy. This patch removes the same from the .dtsi and .dts Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23dts/ls2080a: Update DTSI to add support of various peripheralsBhupesh Sharma
This patch updates the LS2080a DTSI (DTS Include) file to add support for the following peripherals: - USB 3.0 Host - PMU - CCN-504 - SATA - SPI - PCIe Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-10-23arm64: Rename FSL LS2085A SoC support code to LS2080ABhupesh Sharma
Freescale is renaming the LS2085A SoC to LS2080A. This patch addresses the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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