summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
AgeCommit message (Collapse)Author
2022-11-14arm64: dts: imx8qm-ss-lsio: add gpio-ranges propertyShenwei Wang
add gpio-ranges property for imx8qm soc. This gpio-range is used to record which GPIOs correspond to which pins on which pin controllers. The GPIO to PIN mapping will be referenced by the pad wakeup function in GPIO-MXC driver. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-11arm64: dts: imx8: add mu5/6 nodePeng Fan
Add mu5/6 for i.MX8QXP/QM, these two mu will be used for communicating with general purpose Cortex-M4 cores. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8qm: add lsio ss supportDong Aisheng
The LSIO SS of MX8QM is exactly the same as MX8QXP. So we can fully reuse the exist LSIO SS dtsi. Add <soc>-ss-lsio.dtsi with compatible string updated according to imx8-ss-lsio.dtsi. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>