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2023-12-16arm64: dts: freescale: imx8qxp: Disable dsp reserved memory by defaultAlexander Stein
Even if the 'dsp' node is disabled the memory intended to be used by the DSP is reserved. This limits the memory range suitable for CMA allocation. Thus disable the dsp_reserved node. DSP users need to enable it in parallel to the 'dsp' node. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-16arm64: dts: imx8qxp: Add VPU subsystem fileAlexander Stein
imx8qxp re-uses imx8qm VPU subsystem file, but it has different base addresses. Also imx8qxp has only two VPU cores, delete vpu_vore2 and mu2_m0 accordingly. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30arm64: dts: imx8qm: Fix VPU core alias nameAlexander Stein
Alias names use dashes instead of underscores, fix this. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-15arm64: dts: Update cache properties for freescalePierre Gondois
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Chester Lin <clin@suse.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8qxp: Fix the keys node nameAbel Vesa
The proper name is 'keys', not 'scu-keys'. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8: Fix the system-controller node nameViorel Suman
The proper name is 'system-controller', not 'scu'. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8qxp: Fix the ocotp node nameViorel Suman
The proper name is 'ocotp', not 'imx8qx-ocotp'. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8qxp: Add fallback compatible for clock controllerAbel Vesa
Both i.MX8QM and i.MX8DXL use the fallback fsl,scu-clk compatible. They rely on the same driver generic part as the i.MX8QXP, so lets add it to i.MX8QXP too, for consitency. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8: Fix power controller nameAbel Vesa
The proper name is power-controller, not imx8qx-pd. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-07-08arm64: dts: freescale: imx8qxp: Remove unnecessary clock related entriesViorel Suman
XTAL clocks are not exposed by SCU to OS via OS<->SCU communication protocol, so remove unnecessary entries. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-19arm64: dts: freescale: imx8qxp: Fix thermal zone name for cpu0Abel Vesa
The proper name is cpu0-thermal, not cpu-thermal0, so change it to that. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-04-18arm64: dts: freescale: imx8q: add imx vpu codec entriesMing Qian
Add the Video Processing Unit node for IMX8Q SoC. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shijie Qin <shijie.qin@nxp.com> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-11-23arm64: dts: imx8qxp: add cache infoPeng Fan
i.MX8QXP A35 Cluster has 32KB Icache, 32KB Dcache and 512KB L2 Cache - Icache is 2-way set associative - Dcache is 4-way set associative - L2cache is 8-way set associative - Line size are 64bytes Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: imx8qxp: update pmu compatiblePeng Fan
i.MX8QXP features four Cortex-A35 cores, use more accurate compatible. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: imx8: Add jpeg encoder/decoder nodesMirela Rabulea
Add dts for imaging subsytem, include jpeg nodes here. Tested on imx8qxp/qm. Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: split adma ss into dma and audio ssDong Aisheng
amda ss is consisted of dma and audio ss in qxp which are also used in qm. Let's split them into two ss for better code reuse. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: switch to new lpcg clock bindingDong Aisheng
switch to new lpcg clock binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: switch to two cell scu clock bindingDong Aisheng
switch to two cell scu clock binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8qxp: orginize dts in subsystemsDong Aisheng
MX8 SoC is comprised of a few HW subsystems while some of them can be reused in the different SoCs. So let's re-orginize them into subsystems in device tree as well for the possible reuse of the common part. Note, as there's still no devices of hsio subsys, so removed it first instead of creating a subsys headfile with no devices. They will be added back when new devices added. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8qxp: move scu pd node before scu clock nodeDong Aisheng
SCU clock depends on SCU Power domain. Moving scu pd node before scu clock can save a hundred of defer probes of all system devices which depends on power domain and clocks. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8qxp: add fallback compatible string for scu pdDong Aisheng
According to binding doc, add the fallback compatible string for scu pd. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15arm64: dts: imx8qxp: correct usdhc clock-names sequencePeng Fan
Per dt-bindings, the clock-names sequence should be ipg ahb per to pass dtbs_check. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23arm64: dts: imx8qxp: Add ethernet aliasPeng Fan
Add ethernet alias, so bootloader code can use this to find the primary ethernet device, and set the MAC address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23arm64: dts: imx8qxp: add i2c aliasesPeng Fan
The devices could be enumerated properly with aliases. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23arm64: dts: imx8qxp: add alias for lsio MUPeng Fan
Add lsio mu alias for all lsio MUs that could communicate with SCU, imx_scu_enable_general_irq_channel will parse the alias to get the mu resource id, if using other MU, not MU1, the `mu_resource_id` is not what we expect, so add alias to fix this issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-28arm64: dts: imx8qxp: support scu mailbox channelPeng Fan
With mailbox driver support i.MX8 SCU MU channel, we could use it to avoid trigger interrupts for each TR/RR registers in one MU, instead, only one RX interrupt for a recv and one TX interrupt for a send. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: imx: add i.MX8QXP thermal supportAnson Huang
Add i.MX8QXP CPU thermal zone support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09arm64: dts: imx8qxp: Remove unnecessary "interrupt-parent" propertyAnson Huang
gic is appointed as default interrupt parent for devices, so no need to specify it again in device nodes which use it as interrupt parent. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28arm64: dts: imx8qxp: Move usdhc clocks assignment to board DTAnson Huang
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-25arm64: dts: imx8qxp: Add scu key nodeAnson Huang
Add scu key node for i.MX8QXP, disabled by default as it depends on board design. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-09-03Merge tag 'imx-dt64-5.4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree update for 5.4: - New board support: i.MX8MQ Nitrogen8m, Hummingboard Pulse, PICO-PI-IMX8M, i.MX8QXP AI_ML, and LS1046A FRWY board. - Add gpio-ranges for GPIO devices on i.MX8MQ and i.MX8MM. - Update OPP table according to latest data sheet and add opp-suspend to OPP table for i.MX8MQ and i.MX8MM. - Add IDEL states for i.MX8MM SoC. - Correct I2C clock divider for Layerscape SoCs. - Add series alias and LPUART baud clock for i.MX8QXP SoC. - Add MIPI D-PHY device for i.MX8MQ and enable it on imx8mq-librem5 board. - Enable USB1 and Type-C support for i.MX8MM EVK board. - Add Thermal Monitor Unit support for LS1028A SoC. - Misc small update and correction on Layerscape and i.MX8 support. * tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits) arm64: dts: imx8mq: Add mux controller to iomuxc_gpr arm64: dts: fsl: add support for Hummingboard Pulse arm64: dts: ls1088a: update gpio compatible arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controller arm64: dts: ls1088a: Add the DSPI controller node arm64: dts: imx8mm: Enable cpu-idle driver arm64: dts: ls1028a: Add esdhc node in dts arm64: dts: ls1028a: Add properties node for Display output pixel clock arm64: dts: lx2160a: Fix incorrect I2C clock divider arm64: dts: ls1028a: Fix incorrect I2C clock divider arm64: dts: ls1012a: Fix incorrect I2C clock divider arm64: dts: ls1088a: Fix incorrect I2C clock divider arm64: dts: ls1028a: fix gpio nodes arm64: dts: ls1028a: Add Thermal Monitor Unit node arm64: dts: imx8mq-evk: Unbypass audio_pll1 arm64: dts: imx8mm: Add opp-suspend property to OPP table arm64: dts: imx8mq: Add opp-suspend property to OPP table arm64: dts: ls1088a: Revise gpio registers to little-endian arm64: dts: add the console node for DPAA2 platforms ... Link: https://lore.kernel.org/r/20190825153237.28829-6-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-08-19arm64: dts: imx8qxp: Add DSP DT nodeDaniel Baluta
This includes DSP reserved memory, ADMA DSP device and DSP MU communication channels description. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8qxp: add serial aliasFugang Duan
Add i.MX8QXP serial alias for lpuart ports. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03arm64: dts: imx8qxp: add lpuart baud clockFugang Duan
Add imx8qxp lpuart baud clock. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: added ddr performance monitor nodesFrank Li
Add ddr performance monitor Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort LSIO subsystem devicesShawn Guo
We prefer to sort device nodes under simple bus in order of unit address. Let's sort the devices under lsio_subsys properly. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: sort alias alphabeticallyShawn Guo
We prefer to sort alias entries alphabetically, so let's move serial0 to the right place. Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-24arm64: dts: imx8qxp: Add lsio_mu13 nodeDaniel Baluta
lsio_mu13 node is used to communicate with DSP. Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-05arm64: dts: imx: add i.MX8QXP ocotp supportPeng Fan
Add i.MX8QXP ocotp node Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Anson Huang <anson.huang@nxp.com> Cc: Daniel Baluta <daniel.baluta@nxp.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-06-05arm64: dts: imx8qxp: Move watchdog node into scu nodeAnson Huang
i.MX system controller watchdog has pretimeout function which depends on i.MX SCU driver, so it should be a subnode of SCU. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-05-21arm64: dts: imx8qxp: Add gpio aliasAnson Huang
Add i.MX8QXP GPIO alias for kernel GPIO driver usage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-22arm64: dts: imx8qxp: enable scu general irq channelAnson Huang
On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11arm64: dts: imx8qxp: Add lpuart1/lpuart2/lpuart3 nodesDaniel Baluta
lpuart nodes are part of the ADMA subsystem. See Audio DMA memory map in iMX8 QXP RM [1] This patch is based on the dtsi file initially submitted by Teo Hall in i.MX NXP internal tree. [1] https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf Signed-off-by: Teo Hall <teo.hall@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-03arm64: dts: imx8qxp: add system controller watchdog supportAnson Huang
Add i.MX8QXP system controller watchdog support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: imx8qxp: add lsio_mu2 nodePeng Fan
Add lsio_mu2 node which could be used communicate with SCU. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-21arm64: dts: imx8qxp: fix mbox-cellsPeng Fan
Currently lsio_mu1 is used by Linux Kernel with mbox-cells as 2, but actually mu0-4 could be used to communicate with SCU. So fix the mbox-cells. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-03-19arm64: dts: imx8qxp: add cpu opp tableAnson Huang
Add i.MX8QXP CPU opp table to support cpufreq. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-22arm64: dts: imx8qxp: Fix MU4_INT numberDaniel Baluta
MU4_INT correct number is 180, while 179 is for MU3_INT. Fixes: 3d91ba65fecd ("arm64: dts: imx: add imx8qxp support") Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-15arm64: dts: imx: add i.MX8QXP system controller RTC supportAnson Huang
Add i.MX8QXP system controller RTC support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-15arm64: dts: imx: add imx8qxp supportAisheng Dong
i.MX 8QuadXPlus is a quad (4x) Cortex-A35 proccessor with powerful graphic and multimedia features. This patch adds the core SoC dtsi file support. Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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