Age | Commit message (Collapse) | Author |
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Use the correct names for scl-gpios and sda-gpios so that the generic
i2c recovery code will find them. While we're here set the
GPIO_OPEN_DRAIN flag on the gpios.
Fixes: b795fadfc46b ("arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Methode eDPU is an Armada 3720 powered board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Split the Methode uDPU DTS into a common DTSI as preparation for adding
support for Methode eDPU which is based on the uDPU to avoid duplication.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Rename the temperature sensor nodes to use "temp-sensor" which matches
their device class instead of IC specific naming.
Remove the status = "okay" which is not required as its default anyway.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Using pinctrl-names requires the appropriate pinctrl-0 property, otherwise
it is not utilized at all.
Since its not required, just remove it.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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According to bindings they LED-s should be prefixed with "led" in this
use case, so fix accordingly.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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According to the bindings, all boards using Armada 37xx SoC-s must have
"marvell,armada3710" compatible while 3720 based ones should also have
"marvell,armada3720" before it.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Espressobin Ultra is part of the Espressobin family and shares the basic
design, so add the generic "globalscale,espressobin" compatible to it as
well.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The AC5/AC5X SoC has 4 UART blocks. Add the additional UART1-3 blocks to
the base dtsi file.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next
Pull networking changes from Paolo Abeni:
"Core:
- Refactor the forward memory allocation to better cope with memory
pressure with many open sockets, moving from a per socket cache to
a per-CPU one
- Replace rwlocks with RCU for better fairness in ping, raw sockets
and IP multicast router.
- Network-side support for IO uring zero-copy send.
- A few skb drop reason improvements, including codegen the source
file with string mapping instead of using macro magic.
- Rename reference tracking helpers to a more consistent netdev_*
schema.
- Adapt u64_stats_t type to address load/store tearing issues.
- Refine debug helper usage to reduce the log noise caused by bots.
BPF:
- Improve socket map performance, avoiding skb cloning on read
operation.
- Add support for 64 bits enum, to match types exposed by kernel.
- Introduce support for sleepable uprobes program.
- Introduce support for enum textual representation in libbpf.
- New helpers to implement synproxy with eBPF/XDP.
- Improve loop performances, inlining indirect calls when possible.
- Removed all the deprecated libbpf APIs.
- Implement new eBPF-based LSM flavor.
- Add type match support, which allow accurate queries to the eBPF
used types.
- A few TCP congetsion control framework usability improvements.
- Add new infrastructure to manipulate CT entries via eBPF programs.
- Allow for livepatch (KLP) and BPF trampolines to attach to the same
kernel function.
Protocols:
- Introduce per network namespace lookup tables for unix sockets,
increasing scalability and reducing contention.
- Preparation work for Wi-Fi 7 Multi-Link Operation (MLO) support.
- Add support to forciby close TIME_WAIT TCP sockets via user-space
tools.
- Significant performance improvement for the TLS 1.3 receive path,
both for zero-copy and not-zero-copy.
- Support for changing the initial MTPCP subflow priority/backup
status
- Introduce virtually contingus buffers for sockets over RDMA, to
cope better with memory pressure.
- Extend CAN ethtool support with timestamping capabilities
- Refactor CAN build infrastructure to allow building only the needed
features.
Driver API:
- Remove devlink mutex to allow parallel commands on multiple links.
- Add support for pause stats in distributed switch.
- Implement devlink helpers to query and flash line cards.
- New helper for phy mode to register conversion.
New hardware / drivers:
- Ethernet DSA driver for the rockchip mt7531 on BPI-R2 Pro.
- Ethernet DSA driver for the Renesas RZ/N1 A5PSW switch.
- Ethernet DSA driver for the Microchip LAN937x switch.
- Ethernet PHY driver for the Aquantia AQR113C EPHY.
- CAN driver for the OBD-II ELM327 interface.
- CAN driver for RZ/N1 SJA1000 CAN controller.
- Bluetooth: Infineon CYW55572 Wi-Fi plus Bluetooth combo device.
Drivers:
- Intel Ethernet NICs:
- i40e: add support for vlan pruning
- i40e: add support for XDP framented packets
- ice: improved vlan offload support
- ice: add support for PPPoE offload
- Mellanox Ethernet (mlx5)
- refactor packet steering offload for performance and scalability
- extend support for TC offload
- refactor devlink code to clean-up the locking schema
- support stacked vlans for bridge offloads
- use TLS objects pool to improve connection rate
- Netronome Ethernet NICs (nfp):
- extend support for IPv6 fields mangling offload
- add support for vepa mode in HW bridge
- better support for virtio data path acceleration (VDPA)
- enable TSO by default
- Microsoft vNIC driver (mana)
- add support for XDP redirect
- Others Ethernet drivers:
- bonding: add per-port priority support
- microchip lan743x: extend phy support
- Fungible funeth: support UDP segmentation offload and XDP xmit
- Solarflare EF100: add support for virtual function representors
- MediaTek SoC: add XDP support
- Mellanox Ethernet/IB switch (mlxsw):
- dropped support for unreleased H/W (XM router).
- improved stats accuracy
- unified bridge model coversion improving scalability (parts 1-6)
- support for PTP in Spectrum-2 asics
- Broadcom PHYs
- add PTP support for BCM54210E
- add support for the BCM53128 internal PHY
- Marvell Ethernet switches (prestera):
- implement support for multicast forwarding offload
- Embedded Ethernet switches:
- refactor OcteonTx MAC filter for better scalability
- improve TC H/W offload for the Felix driver
- refactor the Microchip ksz8 and ksz9477 drivers to share the
probe code (parts 1, 2), add support for phylink mac
configuration
- Other WiFi:
- Microchip wilc1000: diable WEP support and enable WPA3
- Atheros ath10k: encapsulation offload support
Old code removal:
- Neterion vxge ethernet driver: this is untouched since more than 10 years"
* tag 'net-next-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1890 commits)
doc: sfp-phylink: Fix a broken reference
wireguard: selftests: support UML
wireguard: allowedips: don't corrupt stack when detecting overflow
wireguard: selftests: update config fragments
wireguard: ratelimiter: use hrtimer in selftest
net/mlx5e: xsk: Discard unaligned XSK frames on striding RQ
net: usb: ax88179_178a: Bind only to vendor-specific interface
selftests: net: fix IOAM test skip return code
net: usb: make USB_RTL8153_ECM non user configurable
net: marvell: prestera: remove reduntant code
octeontx2-pf: Reduce minimum mtu size to 60
net: devlink: Fix missing mutex_unlock() call
net/tls: Remove redundant workqueue flush before destroy
net: txgbe: Fix an error handling path in txgbe_probe()
net: dsa: Fix spelling mistakes and cleanup code
Documentation: devlink: add add devlink-selftests to the table of contents
dccp: put dccp_qpolicy_full() and dccp_qpolicy_push() in the same lock
net: ionic: fix error check for vlan flags in ionic_set_nic_features()
net: ice: fix error NETIF_F_HW_VLAN_CTAG_FILTER check in ice_vsi_sync_fltr()
nfp: flower: add support for tunnel offload without key ID
...
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.20 (part 1)
Add support for Marvell 98DX2530 (and variants)
* tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: marvell: enable the 98DX2530 pinctrl driver
arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
dt-bindings: marvell: Document the AC5/AC5X compatibles
Link: https://lore.kernel.org/r/87cze1qlg3.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The 98DX2530 SoC is the Control and Management CPU integrated into
the Marvell 98DX25xx and 98DX35xx series of switch chip (internally
referred to as AlleyCat5 and AlleyCat5X).
These files have been taken from the Marvell SDK and lightly cleaned
up with the License and copyright retained.
gregory.clement: use specific cpu type: cortex-a55 instead of armv8 in
cpu nodes, armv8 being reserved for the arm virtual models that are
not meant to implement a particular CPU type.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Rename the GPIO related sfp properties to include the preffered -gpios
suffix. Also, with this change the dtb_check will no longer complain
when trying to verify the DTS against the sff,sfp.yaml binding.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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The node names should be generic and DT schema expects certain pattern
with 'led'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-12-krzysztof.kozlowski@linaro.org
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The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-11-krzysztof.kozlowski@linaro.org
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Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204525.832847-1-krzysztof.kozlowski@linaro.org
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Pull ARM DT updates from Arnd Bergmann:
"There are 40 branches this time, adding a lot of new hardware support,
and cleanups. Krzysztof Kozlowski continues his treewide cleanups.
There are a number of new SoCs, all of them as part of existing
families, and typically added along with a reference board:
- Renesas RZ/G2UL (R9A07G043) is the single-core version of the
RZ/G2L general-purpose MPU.
- Renesas RZ/V2M (R9A09G011) is a smart camera SoC
- Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
cores and deep learning accerlation.
- Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
and dual Wifi-6.
- Corstone1000 is a generic platform from Arm that is used for
designing custom SoCs, the support for now is for the Fixed Virtual
Platform emulation for it.
- Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
upcoming Chromebooks.
- NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
MMU-less SoC to be added in a while
New machines based on already supported SoCs this time are mainly for
32-bit platforms and include:
- Two wireless routers based on Broadcom bcm4708
- 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
for the industrial embedded market, and on NXP LS1021A based IOT
board.
- Two ethernet switches based on Microchip LAN966
- Eight Qualcomm Snapdragon based machines, including a smartwatch, a
Chromebook board and some phones
- Another phone based on the old ST-Ericsson Ux500 platform
- Seven STM32MP1 based boards
- Four single-board computers based on Rockchip RK3566/RK3568"
* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
ARM: dts: kswitch-d10: enable networking
ARM: dts: lan966x: add switch node
ARM: dts: lan966x: add serdes node
ARM: dts: lan966x: add reset switch reset node
ARM: dts: lan966x: add MIIM nodes
ARM: dts: lan966x: add hwmon node
ARM: dts: lan966x: add basic Kontron KSwitch D10 support
ARM: dts: lan966x: add flexcom I2C nodes
ARM: dts: lan966x: add flexcom SPI nodes
ARM: dts: lan966x: add all flexcom usart nodes
ARM: dts: lan966x: add missing uart DMA channel
ARM: dts: lan966x: add sgpio node
ARM: dts: lan966x: swap dma channels for crypto node
ARM: dts: lan966x: rename pinctrl nodes
ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
ARM: dts: at91: use generic node name for dataflash
ARM: dts: turris-omnia: Add atsha204a node
arm64: dts: mt8192: Follow binding order for SCP registers
arm64: dts: mediatek: add mtk-snfi for mt7622
arm64: dts: mediatek: mt8195-demo: enable uart1
...
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MDIO devices have #address-cells = <1>, #size-cells = <0>. Now that we
have a schema enforcing this for marvell,orion-mdio we can see that the
turris-mox has a unnecessary 2nd cell for the switch nodes reg property
of it's switch devices. Remove the unnecessary 2nd cell from the
switches reg property.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.19 (part 1)
Update sdhci node names to match schema on all mvebu dt64 dtsi files
Armada 3720:
uDPU board:
- correct temperature sensors
- update partition table
espressobin-ultra board:
- enable front USB3 port
- add PHY and switch reset pins
- fix SPI-NOR config
* tag 'mvebu-dt64-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: Update sdhci node names to match schema
arm64: dts: marvell: espressobin-ultra: enable front USB3 port
arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins
arm64: dts: marvell: espressobin-ultra: fix SPI-NOR config
arm64: dts: uDPU: correct temperature sensors
arm64: dts: uDPU: update partition table
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Update the node names of the sdhci@ interfaces to be mmc@ to match the
node name enforced by the mmc-controller.yaml schema.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Espressobin Ultra has a front panel USB3.0 Type-A port which works
just fine so enable it.
I dont see a reason why it was disabled in the first place anyway.
Fixes: 3404fe15a60f ("arm64: dts: marvell: add DT for ESPRESSObin-Ultra")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Both the Topaz switch and 88E1512 PHY have their reset and interrupts
connected to the SoC.
So, define the Topaz and 88E1512 reset pins in the DTS.
Defining the interrupt pins wont work as both the 88E1512 and the
Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller
only supports edge triggers.
88E1512 would require special setup anyway as its INT pin is shared with
the LED2 and you first need to configure it as INT.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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SPI config for the SPI-NOR is incorrect and completely breaking
reading/writing to the onboard SPI-NOR.
SPI-NOR is connected in the single(x1) IO mode and not in the quad
(x4) mode.
Also, there is no need to override the max frequency from the DTSI
as the mx25u3235f that is used supports 104Mhz.
Fixes: 3404fe15a60f ("arm64: dts: marvell: add DT for ESPRESSObin-Ultra")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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uDPU has a pair of NCT375 temperature sensors, which are TMP75C compatible
as far as the driver is concerned.
The current LM75 compatible worked as all of the LM75 compatible sensors
are backwards compatible with the original part, but it meant that lower
resolution and incorrect sample rate was being used.
The "lm75" compatible has been deprecated anyway and is meant as fallback
in order to keep older DTS-es working.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Partition currently called "uboot" does not only contain U-boot, but
rather it contains TF-A, U-boot and U-boot environment.
So, to avoid accidentally deleting the U-boot environment which is
located at 0x180000 split the partition.
"uboot" is not the correct name as you can't boot these boards with U-boot
only, TF-A must be present as well, so rename the "uboot" partition to
"firmware".
While we are here, describe the NOR node as "spi-flash@0" instead of
"m25p80@0" which is the old SPI-NOR driver name.
This won't break booting for existing devices as the SoC-s BootROM is not
partition aware at all, it will simply try booting from 0x0 of the
boot device that is set by bootstrap pins.
This will however prevent accidental or automated flashing of just U-boot
to the partition.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220407143234.295426-2-krzysztof.kozlowski@linaro.org
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty/serial driver updates from Greg KH:
"Here are the big set of tty and serial driver changes for 5.18-rc1.
Nothing major, some more good cleanups from Jiri and 2 new serial
drivers. Highlights include:
- termbits cleanups
- export symbol cleanups and other core cleanups from Jiri Slaby
- new sunplus and mvebu uart drivers (amazing that people are still
creating new uarts...)
- samsung serial driver cleanups
- ldisc 29 is now "reserved" for experimental/development line
disciplines
- lots of other tiny fixes and cleanups to serial drivers and
bindings
All of these have been in linux-next for a while with no reported
issues"
* tag 'tty-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (104 commits)
vt_ioctl: fix potential spectre v1 in VT_DISALLOCATE
serial: 8250: fix XOFF/XON sending when DMA is used
tty: serial: samsung: Add ARTPEC-8 support
dt-bindings: serial: samsung: Add ARTPEC-8 UART
serial: sc16is7xx: Clear RS485 bits in the shutdown
tty: serial: samsung: simplify getting OF match data
tty: serial: samsung: constify variables and pointers
tty: serial: samsung: constify s3c24xx_serial_drv_data members
tty: serial: samsung: constify UART name
tty: serial: samsung: constify s3c24xx_serial_drv_data
tty: serial: samsung: reduce number of casts
tty: serial: samsung: embed s3c2410_uartcfg in parent structure
tty: serial: samsung: embed s3c24xx_uart_info in parent structure
serial: 8250_tegra: mark acpi_device_id as unused with !ACPI
tty: serial: bcm63xx: use more precise Kconfig symbol
serial: SERIAL_SUNPLUS should depend on ARCH_SUNPLUS
tty: serial: jsm: fix two assignments in if conditions
tty: serial: jsm: remove redundant assignments to variable linestatus
serial: 8250_mtk: make two read-only arrays static const
serial: samsung_tty: do not unlock port->lock for uart_write_wakeup()
...
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Pull ARM devicetree updates from Arnd Bergmann:
"After a somewhat quiet 5.17 release, the size of the DT changes is a
bit larger again. There are nine new SoC that get added, all of them
related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added
all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno:
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar:
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)"
* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
arm64: dts: n5x: drop invalid property and fix edac node name
arm64: dts: fsd: Add the MCT support
arm64: dts: stingray: Fix spi clock name
arm64: dts: ns2: Fix spi clock name
ARM: dts: rockchip: Update regulator name for PX3
ARM: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
ARM: dts: at91: sama7g5: Add NAND support
ARM: dts: at91: sama7g5: add eic node
ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
arm64: dts: lg: align pl330 node name with dtschema
arm64: dts: lg: add dma-cells to pl330 node
arm64: dts: juno: align pl330 node name with dtschema
arm64: dts: broadcom: Fix sata nodename
arm64: dts: n5x: add sdr edac support
arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
dt-bindings: usb: dwc2: add disable-over-current
...
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git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/fixes
mvebu fixes for 5.17 (part 2)
Allow using old PCIe card on Armada 37xx
* tag 'mvebu-fixes-5.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: armada-37xx: Remap IO space to bus address 0x0
Link: https://lore.kernel.org/r/87bkydj4fn.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Legacy and old PCI I/O based cards do not support 32-bit I/O addressing.
Since commit 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from
'ranges' DT property") kernel can set different PCIe address on CPU and
different on the bus for the one A37xx address mapping without any firmware
support in case the bus address does not conflict with other A37xx mapping.
So remap I/O space to the bus address 0x0 to enable support for old legacy
I/O port based cards which have hardcoded I/O ports in low address space.
Note that DDR on A37xx is mapped to bus address 0x0. And mapping of I/O
space can be set to address 0x0 too because MEM space and I/O space are
separate and so do not conflict.
Remapping IO space on Turris Mox to different address is not possible to
due bootloader bug.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 76f6386b25cc ("arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700")
Cc: stable@vger.kernel.org # 64f160e19e92 ("PCI: aardvark: Configure PCIe resources from 'ranges' DT property")
Cc: stable@vger.kernel.org # 514ef1e62d65 ("arm64: dts: marvell: armada-37xx: Extend PCIe MEM space")
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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U-Boot uses ethernet* aliases for setting MAC addresses. Therefore define
also alias for ethernet0.
Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The clock binding documents PCIe clock for a long time already. Add
clock phande into the PCIe node.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Define DT node for UART clock "marvell,armada-3700-uart-clock" and use
this UART clock as a base clock for all UART devices.
Reviewed-by: Marek Behún <kabel@kernel.org>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20220219152818.4319-7-kabel@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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CN9130 has a built-in CP115 which has 2 GPIO controllers, but unlike in
Armada 7k and 8k both are left disabled by the SoC DTSI.
This first of all makes no sense as they are always present due to being
SoC built-in and its an issue as boards like CN9130-CRB use the CPO GPIO2
pins for regulators and SD card support without enabling them first.
So, enable both of them like Armada 7k and 8k do.
Fixes: 6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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CN9130 has one CP115 built in, which like the CP110 has 2 GPIO and 2 SPI
controllers built-in.
However, unlike the Armada 7k and 8k the SoC DTSI doesn't add the required
aliases as both the Orion SPI driver and MVEBU GPIO drivers require the
aliases to be present.
So add the required aliases for GPIO and SPI controllers.
Fixes: 6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Kernel driver phy-mvebu-a3700-comphy.c needs to know the rate of the
reference xtal clock. So add missing xtal clock source into comphy device
tree node. If the property is not present, the driver defaults to 25 MHz
xtal rate (which, as far as we know, is used by all the existing boards).
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The CN9130-CRB boards have a MV88E6393X switch connected to eth0. Add
the necessary dts nodes and properties for this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Globalscale MOCHAbin is a Armada 7040 based development board.
Specifications:
* Armada 7040 Quad core ARMv8 Cortex A-72 @ 1.4GHz
* 2 / 4 / 8 GB of DDR4 DRAM
* 16 GB eMMC
* 4MB SPI-NOR (Bootloader)
* 1x M.2-2280 B-key socket (for SSD expansion, SATA3 only)
* 1x M.2-2250 B-key socket (for modems, USB2.0 and I2C only)
* 1x Mini-PCIe 3.0 (x1, USB2.0 and I2C)
* 1x SATA 7+15 socket (SATA3)
* 1x 16-pin (2×8) MikroBus Connector
* 1x SIM card slot (Connected to the mini-PCIe and both M.2 slots)
* 2x USB3.0 Type-A ports via SMSC USB5434B hub
* Cortex 2x5 JTAG
* microUSB port for UART (PL2303GL/PL2303SA onboard)
* 1x 10G SFP+
* 1x 1G SFP (Connected to 88E1512 PHY)
* 1x 1G RJ45 with PoE PD (Connected to 88E1512 PHY)
* 4x 1G RJ45 ports via Topaz 88E6141 switch
* RTC with battery holder (SoC provided, requires CR2032 battery)
* 1x 12V DC IN
* 1x Power switch
* 1x 12V fan header (3-pin, power only)
* 1x mini-PCIe LED header (2x0.1" pins)
* 1x M.2-2280 LED header (2x0.1" pins)
* 6x Bootstrap jumpers
* 1x Power LED (Green)
* 3x Tri-color RGB LEDs (Controllable)
* 1x Microchip ATECC608B secure element
Note that 1G SFP and 1G WAN cannot be used at the same time as they are in
parallel connected to the same PHY.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, the bulk of work in the SoC tree goes into DT files, this
time with a roughly even split between 32-bit and 64-bit SoCs rather
than the usual mostly 64-bit changes.
New SoCs:
- Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
platform based on the older SAMA5 series.
- Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
phone SoCs.
- Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
SoCs.
New boards:
- Marvell CN913x reference boards
- ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
and Fuji server boards.
- Snapdragon 665 based Sony Xperia 10II
- Snapdragon MSM8916 based Xiaomi Redmi 2
- Snapdragon MSM8226 based Samsung Galaxy S3 Neo
- NXP i.MX based 32-bit boards:
- DHCOM based PicoITX
- DHSOM based DRC0ỉ
- SolidRun SolidSense
- SKOV i.MX6 boards.
- NXP i.MX based 64-bit boards:
- Nitrogen8 SoM and MNT Reform2
- LS1088A based Traverse Ten64
- i.MX8M based GW7902.
- NVIDIA Jetson TX2 NX Developer Kit
- 4KOpen STiH418-b2264 development board
- ux500 based Samsung phones: Gavini, Codina and Kyle
- TI AM335x based Sancloud BBE Lite
- ixp4xx dts files to replace all old board files
Other changes:
- Treewide fixes for dtc warnings
- Rockchips i/o domain support
- TI OMAP/AM3 CPSW switch driver support
- Improved device support for allwinner, aspeed, qualcomm, NXP,
nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
OMAP and actions"
* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
ARM: dts: rockchip: Add SFC to RV1108
arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
ARM: dts: aspeed: p10bmc: Add power control pins
ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
ARM: dts: aspeed: minipack: Update flash partition table
dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
dt-bindings: vendor-prefixes: add Traverse Technologies
arm64: dts: add device tree for Traverse Ten64 (LS1088A)
arm64: dts: ls1088a: add missing PMU node
arm64: dts: ls1088a: add internal PCS for DPMAC1 node
ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
ARM: dts: add SKOV imx6q and imx6dl based boards
dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
arm64: dts: imx8mq-reform2: add sound support
arm64: dts: imx8m: drop interrupt-affinity for pmu
arm64: dts: imx8qxp: update pmu compatible
arm64: dts: imx8mm: update pmu compatible
...
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Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Current PCIe MEM space of size 16 MB is not enough for some combination
of PCIe cards (e.g. NVMe disk together with ath11k wifi card). ARM Trusted
Firmware for Armada 3700 platform already assigns 128 MB for PCIe window,
so extend PCIe MEM space to the end of 128 MB PCIe window which allows to
allocate more PCIe BARs for more PCIe cards.
Without this change some combination of PCIe cards cannot be used and
kernel show error messages in dmesg during initialization:
pci 0000:00:00.0: BAR 8: no space for [mem size 0x01800000]
pci 0000:00:00.0: BAR 8: failed to assign [mem size 0x01800000]
pci 0000:00:00.0: BAR 6: assigned [mem 0xe8000000-0xe80007ff pref]
pci 0000:01:00.0: BAR 8: no space for [mem size 0x01800000]
pci 0000:01:00.0: BAR 8: failed to assign [mem size 0x01800000]
pci 0000:02:03.0: BAR 8: no space for [mem size 0x01000000]
pci 0000:02:03.0: BAR 8: failed to assign [mem size 0x01000000]
pci 0000:02:07.0: BAR 8: no space for [mem size 0x00100000]
pci 0000:02:07.0: BAR 8: failed to assign [mem size 0x00100000]
pci 0000:03:00.0: BAR 0: no space for [mem size 0x01000000 64bit]
pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x01000000 64bit]
Due to bugs in U-Boot port for Turris Mox, the second range in Turris Mox
kernel DTS file for PCIe must start at 16 MB offset. Otherwise U-Boot
crashes during loading of kernel DTB file. This bug is present only in
U-Boot code for Turris Mox and therefore other Armada 3700 devices are not
affected by this bug. Bug is fixed in U-Boot version 2021.07.
To not break booting new kernels on existing versions of U-Boot on Turris
Mox, use first 16 MB range for IO and second range with rest of PCIe window
for MEM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 76f6386b25cc ("arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Some SFP modules are not detected when i2c-fast-mode is enabled even when
clock-frequency is already set to 100000. The I2C bus violates the timing
specifications when run in fast mode. So disable fast mode on Turris Mox.
Same change was already applied for uDPU (also Armada 3720 board with SFP)
in commit fe3ec631a77d ("arm64: dts: uDPU: remove i2c-fast-mode").
Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Acked-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Change all 10G port modes in Armada family device trees from
10gbase-kr to 10gbase-r
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Suggested-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The Marvell reference platform CN9130-CRB is a small form factor
board in a metal case. The platform is based on CN9130 SoC with
addition of 8 Gigabit ports SOHO Ethernet switch.
The reference platform features the following:
* Up to 4 CPU cores ARMv8 Cortex-A72 CPU
* CPU core operating speed of up to 2.2GHz
* DDR4 DIMM – 8GB 64bit+ECC @ 2400Mhz.
* 1x eMMC 8GB device
* 1x uSD card 4 bits port on CP
* 1x 128MB SPI NOR flash memory
* 1x USB 3.0 Host port (Type A)
* 1x SATA Gen3 via M.2
* 1x USB 3.0 via M.2
* 1x SIM card slot
* 1x 1G Ethernet port via RGMII
* 1x 10G switch port over SFP+ connector
* 8x 1G ports through 88E6393X switch via XFI
* 1x 2.5G/1G/100M/10M port via HS_SGMII
* 1x PCI Express (PCIe)x1 Gen 3.0
* 1x PCI Express (PCIe)x4 Gen 3.0 via NVMe M.2
* JTAG port
The CRB board uses MCP23017 i2c pin controller that drives the
onboard eMMC abd USB 3,0 port power lines.
The following configuration should be enabled for this controller
support:
CONFIG_PINCTRL_MCP23S08=y
The plaform supports two HW configurations - "A" and "B"
CN9130-CRB-A
* AP-MPP configuration: SDIO, UART
* CP0 Serdes configuration:
* Lane0-3: NVMe (PCIe x4)
* Lane4: XFI
* Lane5: HS_SGMII
2. CN9130-CRB-B
* AP-MPP configuration: SDIO, UART
* CP0-MPP configuration: RGMII, SDIO, I2C0, I2C1, SMI, XSMI
* CP0 Serdes configuration:
* Lane0: PCIe x1
* Lane1: USB3_0 x1
* Lane2: SATA x1
* Lane3: USB3_1 x1
* Lane4: XFI
* Lane5: HS_SGMII
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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This patch enables eth0 10G interface on CN9130-DB paltforms and
eth0 10G and eth3 10G interfaces on CN9131-DB.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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The CN913x DB with topology B is similar to a regular setup (A)
boards, but uses NAND flash as a boot device, while topology A
boards are booting from SPI flash.
Since NAND and SPI on CN913x DB boards share some wires, they
cannot be activated simultaneously.
The DTS files for setup "B" are based on setup "A", in which the
CP0 NAND controller enabled and CP0 SPI1 disabled.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Since drivers/mmc/host/sdhci-xenon.c declares the PROBE_PREFER_ASYNCHRONOUS
probe type, it is not guaranteed whether /dev/mmcblk0 will belong to
sdhci0 or sdhci1. In turn, this will break booting by:
root=/dev/mmcblk0p1
Fix the issue by adding aliases so that the old MMC controller indices
are preserved.
Fixes: 7320915c8861 ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.14")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Pull ARM devicetree updates from Olof Johansson:
"Like always, the DT branch is sizable. There are numerous additions
and fixes to existing platforms, but also a handful of new ones
introduced. Less than some other releases, but there's been
significant work on cleanups, refactorings and device enabling on
existing platforms.
A non-exhaustive list of new material:
- Refactoring of BCM2711 dtsi structure to add support for the
Raspberry Pi 400
- Rockchip: RK3568 SoC and EVB, video codecs for
rk3036/3066/3188/322x
- Qualcomm: SA8155p Automotive platform (SM8150 derivative),
SM8150/8250 enhancements and support for Sony Xperia 1/1II and
5/5II
- TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc
definitions
- TI OMAP: Various cleanups
- Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194
- Qualcomm: lots of additions for peripherals across several SoCs,
and new support for Microsoft Surface Duo (SM8150-based), Huawei
Ascend G7.
- i.MX: Numerous additions of features across SoCs and boards.
- Allwinner: More device bindings for V3s, Forlinx OKA40i-C and
NanoPi R1S H5 boards
- MediaTek: More device bindings for mt8167, new Chromebook system
variants for mt8183
- Renesas: RZ/G2L SoC and EVK added
- Amlogic: BananaPi BPI-M5 board added"
* tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits)
arm64: dts: rockchip: add basic dts for RK3568 EVB
arm64: dts: rockchip: add core dtsi for RK3568 SoC
arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs
ARM: dts: rockchip: add vpu and vdec node for RK322x
ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188
ARM: dts: rockchip: add vpu node for RK3036
arm64: dts: ipq8074: Add QUP6 I2C node
arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc
arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc
arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc
arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly
arm64: dts: rockchip: Sort rk3399 firefly pinmux entries
arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly
arm64: dts: rockchip: add SPDIF node for rk3399-firefly
arm64: dts: rockchip: Add Rotation Property for OGA Panel
arm64: dts: qcom: sc7180: bus votes for eMMC and SD card
arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen
arm64: dts: qcom: sm8250-edo: Enable GPI DMA
arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI
arm64: dts: qcom: sm8250-edo: Enable PCIe
...
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UART1 (standard variant with DT node name 'uart0') has register space
0x12000-0x12018 and not whole size 0x200. So fix also this in example.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: c737abc193d1 ("arm64: dts: marvell: Fix A37xx UART0 register size")
Link: https://lore.kernel.org/r/20210624224909.6350-6-pali@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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