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2024-01-18Merge tag 'usb-6.8-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the big set of USB and Thunderbolt changes for 6.8-rc1. Included in here are the following: - Thunderbolt subsystem and driver updates for USB 4 hardware and issues reported by real devices - xhci driver updates - dwc3 driver updates - uvc_video gadget driver updates - typec driver updates - gadget string functions cleaned up - other small changes All of these have been in the linux-next tree for a while with no reported issues" * tag 'usb-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (169 commits) usb: typec: tipd: fix use of device-specific init function usb: typec: tipd: Separate reset for TPS6598x usb: mon: Fix atomicity violation in mon_bin_vma_fault usb: gadget: uvc: Remove nested locking usb: gadget: uvc: Fix use are free during STREAMOFF usb: typec: class: fix typec_altmode_put_partner to put plugs dt-bindings: usb: dwc3: Limit num-hc-interrupters definition dt-bindings: usb: xhci: Add num-hc-interrupters definition xhci: add support to allocate several interrupters USB: core: Use device_driver directly in struct usb_driver and usb_device_driver arm64: dts: mediatek: mt8195: Add 'rx-fifo-depth' for cherry usb: xhci-mtk: fix a short packet issue of gen1 isoc-in transfer dt-bindings: usb: mtk-xhci: add a property for Gen1 isoc-in transfer issue arm64: dts: qcom: msm8996: Remove PNoC clock from MSS arm64: dts: qcom: msm8996: Remove AGGRE2 clock from SLPI arm64: dts: qcom: msm8998: Remove AGGRE2 clock from SLPI arm64: dts: qcom: msm8939: Drop RPM bus clocks arm64: dts: qcom: sdm630: Drop RPM bus clocks arm64: dts: qcom: qcs404: Drop RPM bus clocks arm64: dts: qcom: msm8996: Drop RPM bus clocks ...
2024-01-04arm64: dts: qcom: qcs404: Drop RPM bus clocksKonrad Dybcio
Some nodes are abusingly referencing some of the internal bus clocks, that were recently removed in Linux (because the original implementation did not make much sense), managing them as if they were the only devices on an NoC bus. These clocks are now handled from within the icc framework and are no longer registered from within the CCF. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v3-4-a66e698932e3@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-12-15arm64: dts: qcom: Use "pcie" as the node name instead of "pci"Manivannan Sadhasivam
Qcom SoCs doesn't support the legacy PCI, but only PCIe. So use the correct node name for the controller instances. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231206135540.17068-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-13arm64: dts: qcom: Add rpm-proc node for GLINK gplatformsStephan Gerhold
Rather than having the RPM GLINK channels as the only child of a dummy top-level rpm-glink node, switch to representing the RPM as remoteproc like all the other remoteprocs (modem DSP, ...). This allows assigning additional subdevices to it like the MPM interrupt-controller or rpm-master-stats. Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM6375 Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-11-a07dcdefd918@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09arm64: dts: qcom: minor whitespace cleanup around '='Krzysztof Kozlowski
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230702185051.43867-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-05-17arm64: dts: qcom: add missing cache propertiesKrzysztof Kozlowski
Add required cache-level and cache-unified properties to fix warnings like: qdu1000-idp.dtb: l3-cache: 'cache-unified' is a required property qdu1000-idp.dtb: l2-cache: 'cache-level' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230416101134.95686-3-krzysztof.kozlowski@linaro.org
2023-04-07arm64: dts: qcom: qcs404: add compatible fallback to mailboxKrzysztof Kozlowski
QCS404 mailbox is compatible with MSM8916. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230322174148.810938-10-krzysztof.kozlowski@linaro.org
2023-03-15arm64: dts: qcom: qcs404: Use 0x prefix for the PCI I/O and MEM rangesManivannan Sadhasivam
To maintain the uniformity, let's use the 0x prefix for the values of ranges property. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230228164752.55682-10-manivannan.sadhasivam@linaro.org
2023-02-13arm64: dts: qcom: qcs404: align RPM G-Link node with bindingsKrzysztof Kozlowski
Bindings expect (and most of DTS use) the RPM G-Link node name to be "rpm-requests". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230208101545.45711-2-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: qcs404: specify per-sensor calibration cellsDmitry Baryshkov
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230101194034.831222-19-dmitry.baryshkov@linaro.org
2023-01-10arm64: dts: qcom: replace underscores in node namesKrzysztof Kozlowski
Underscores should not be used in node names (dtc with W=2 warns about them), so replace them with hyphens. In few places adjust the name to match other nodes (e.g. xxx-regulator). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221214110448.86268-1-krzysztof.kozlowski@linaro.org
2022-12-27arm64: dts: qcom: qcs404: align CDSP PAS node with bindingsKrzysztof Kozlowski
The QCS404 CDSP remote processor can be brought to life using two different bindings: 1. qcom,qcs404-cdsp-pas - currently used in DTSI. 2. qcom,qcs404-cdsp-pil. Comment out the properties related to qcom,qcs404-cdsp-pil (qcom,halt-regs, resets and additional clocks), to silence DT schema warnings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221124184333.133911-3-krzysztof.kozlowski@linaro.org
2022-12-27arm64: dts: qcom: qcs404: register PCIe PHY as a clock providerDmitry Baryshkov
Add #clock-cells to the pcie_phy node. It provides a PCIe PIPE clock. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226031059.2563165-4-dmitry.baryshkov@linaro.org
2022-12-27arm64: dts: qcom: qcs404: add xo clock to rpm clock controllerDmitry Baryshkov
Populate the rpm clock controller node with clocks and clock-names properties. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226042154.2666748-17-dmitry.baryshkov@linaro.org
2022-12-27arm64: dts: qcom: qcs404: add clocks to the gcc nodeDmitry Baryshkov
Populate the gcc node with the clocks and clock-names properties to enable DT-based lookups for the parent clocks. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226042154.2666748-16-dmitry.baryshkov@linaro.org
2022-12-27arm64: dts: qcom: qcs404: add power-domains-cells to gcc nodeDmitry Baryshkov
As gcc now provides two GDSCs, add #power-domain-cells property to the gcc device node. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226042154.2666748-15-dmitry.baryshkov@linaro.org
2022-12-27arm64: dts: qcom: qcs404: use symbol names for PCIe resetsDmitry Baryshkov
The commit e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets") added names for PCIe resets, but it did not change the existing qcs404.dtsi to use these names. Do it now and use symbol names to make it easier to check and modify the dtsi in future. Fixes: e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221226042154.2666748-14-dmitry.baryshkov@linaro.org
2022-11-07arm64: dts: qcom: qcs404-*: Fix up commentsKonrad Dybcio
Switch '//' comments to C-style /* */. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221107145522.6706-11-konrad.dybcio@linaro.org
2022-11-07arm64: dts: qcom: qcs404: align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221104161131.57719-1-krzysztof.kozlowski@linaro.org
2022-09-13arm64: dts: qcom: qcs404: add missing TCSR syscon compatibleKrzysztof Kozlowski
TCSR syscon node should come with dedicated compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220909092035.223915-8-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: qcs404: switch TCSR mutex to MMIOKrzysztof Kozlowski
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220819083209.50844-13-krzysztof.kozlowski@linaro.org
2022-08-29arm64: dts: qcom: stop using snps,dw-pcie falbackDmitry Baryshkov
Qualcomm PCIe devices are not really compatible with the snps,dw-pcie. Unlike the generic IP core, they have special requirements regarding enabling clocks, toggling resets, using the PHY, etc. This is not to mention that platform snps-dw-pcie driver expects to find two IRQs declared, while Qualcomm platforms use just one. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220506152107.1527552-6-dmitry.baryshkov@linaro.org
2022-07-16arm64: dts: qcom: qcs404: Fix incorrect USB2 PHYs assignmentSumit Garg
Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each assigned to USB3 controller and USB2 controller. This assignment is incorrect which only works by luck: as when each USB HCI comes up it configures the *other* controllers PHY which is enough to make them happy. If, for any reason, we were to disable one of the controllers then both would stop working. This was a difficult inconsistency to be caught which was found while trying to enable USB support in u-boot. So with all the required drivers ported to u-boot, I couldn't get the same USB storage device enumerated in u-boot which was being enumerated fine by the kernel. The root cause of the problem came out to be that I wasn't enabling USB2 PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling the same USB2 PHY currently assigned to USB2 host controller in the kernel disabled enumeration for USB3 host controller as well. So fix this inconsistency by correctly assigning USB2 PHYs. Fixes: 9375e7d719b3 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs") Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220711083038.1518529-1-sumit.garg@linaro.org
2022-07-06Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"Douglas Anderson
This reverts commit afcbe252e9c19161e4d4c95f33faaf592f1de086. The commit in question caused my sc7280-herobrine-herobrine-r1 board not to boot anymore. This shouldn't be too surprising since the driver is relying on the name "cqhci". The issue seems to be that someone decided to change the names of things when the binding moved from .txt to .yaml. We should go back to the names that the bindings have historically specified. For some history, see commit d3392339cae9 ("mmc: cqhci: Update cqhci memory ioresource name") and commit d79100c91ae5 ("dt-bindings: mmc: sdhci-msm: Add CQE reg map"). Fixes: afcbe252e9c1 ("arm64: dts: qcom: Fix 'reg-names' for sdhci nodes") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220706144706.1.I48f35820bf3670d54940110462555c2d0a6d5eb2@changeid
2022-07-02arm64: dts: qcom: qcs404: add dedicated IMEM and syscon compatiblesKrzysztof Kozlowski
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-9-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: use generic sram as name for imem and ocmem nodesKrzysztof Kozlowski
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: Fix 'reg-names' for sdhci nodesBhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names' for sdhci nodesBhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: Fix sdhci node names - use 'mmc@'Bhupesh Sharma
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Moved non-arm64 changes to separate commit] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
2022-07-02arm64: dts: qcom: qcs404: fix default pinctrl settings for blsp1_spi1Andrey Konovalov
The current settings refer to "blsp_spi1" function which isn't defined. For this reason an attempt to enable blsp1_spi1 interface results in the probe failure below: [ 3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.548277] spi_qup: probe of 78b6000.spi failed with error -22 Fix this by making the functions used in qcs404.dtsi to match the contents of drivers/pinctrl/qcom/pinctrl-qcs404.c. Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220611195713.131597-1-andrey.konovalov@linaro.org
2022-07-02arm64: dts: qcom: use dedicated QFPROM compatiblesKrzysztof Kozlowski
Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998, QCS404 and SDM630 which is expected by the bindings: msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-5-krzysztof.kozlowski@linaro.org
2022-06-03Merge tag 'usb-5.19-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the "big" set of USB and Thunderbolt driver changes for 5.18-rc1. For the most part it's been a quiet development cycle for the USB core, but there are the usual "hot spots" of development activity. Included in here are: - Thunderbolt driver updates: - fixes for devices without displayport adapters - lane bonding support and improvements - other minor changes based on device testing - dwc3 gadget driver changes. It seems this driver will never be finished given that the IP core is showing up in zillions of new devices and each implementation decides to do something different with it... - uvc gadget driver updates as more devices start to use and rely on this hardware as well - usb_maxpacket() api changes to remove an unneeded and unused parameter. - usb-serial driver device id updates and small cleanups - typec cleanups and fixes based on device testing - device tree updates for usb properties - lots of other small fixes and driver updates. All of these have been in linux-next for weeks with no reported problems" * tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits) USB: new quirk for Dell Gen 2 devices usb: dwc3: core: Add error log when core soft reset failed usb: dwc3: gadget: Move null pinter check to proper place usb: hub: Simplify error and success path in port_over_current_notify usb: cdns3: allocate TX FIFO size according to composite EP number usb: dwc3: Fix ep0 handling when getting reset while doing control transfer usb: Probe EHCI, OHCI controllers asynchronously usb: isp1760: Fix out-of-bounds array access xhci: Don't defer primary roothub registration if there is only one roothub USB: serial: option: add Quectel BG95 modem USB: serial: pl2303: fix type detection for odd device xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI xhci: Remove quirk for over 10 year old evaluation hardware xhci: prevent U2 link power state if Intel tier policy prevented U1 xhci: use generic command timer for stop endpoint commands. usb: host: xhci-plat: omit shared hcd if either root hub has no ports usb: host: xhci-plat: prepare operation w/o shared hcd usb: host: xhci-plat: create shared hcd after having added main hcd xhci: prepare for operation w/o shared hcd xhci: factor out parts of xhci_gen_setup() ...
2022-05-05arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatibleKrzysztof Kozlowski
Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-11-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-05-05arm64: dts: qcom: correct DWC3 node names and unit addressesKrzysztof Kozlowski
Align DWC3 USB node names with DT schema ("usb" is expected) and correct the unit addresses to match the "reg" property. This also implies overriding nodes by label, instead of full path. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-04-12arm64: dts: qcom: add RPM clock controller fallback compatibleKrzysztof Kozlowski
The bindings require a fallback compatible to RPM clock controller. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: align clocks in I2C/SPI with DT schemaKrzysztof Kozlowski
The DT schema expects clocks core-iface order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-3-krzysztof.kozlowski@linaro.org
2022-04-12arm64: dts: qcom: align dmas in I2C/SPI/UART with DT schemaKrzysztof Kozlowski
The DT schema expects dma channels in tx-rx order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-2-krzysztof.kozlowski@linaro.org
2022-02-10arm64: dts: qcom: qcs404: Rename CPU and CPR OPP tablesYassine Oudjana
Rename CPU and CPR OPP table node names to match the nodename pattern defined in the opp-v2-base DT schema. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220203072226.51482-7-y.oudjana@protonmail.com
2021-10-24arm64: dts: qcom: Fix node name of rpm-msg-ram device nodesStephan Gerhold
According to the new DT schema for qcom,rpm-msg-ram the node name should be sram@. memory@ is reserved for definition of physical RAM (usable by Linux). This fixes the following dtbs_check error on various device trees: memory@60000: 'device_type' is a required property From schema: dtschema/schemas/memory.yaml Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
2021-10-16arm64: dts: qcom: Enable RPM Sleep statsMaulik Shah
Add device node for Sleep stats driver which provides various low power mode stats on msm8996, msm8998, qcs404, sdm630 and sm6125. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah <mkshah@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1634107104-22197-6-git-send-email-mkshah@codeaurora.org
2021-07-21Revert "arm64: dts: qcom: Harmonize DWC USB3 DT nodes name"Greg Kroah-Hartman
This reverts commit eb9b7bfd5954f5f6ac4d57313541dd0294660aad as it breaks working userspace implementations (i.e. Android systems) The device node name here is part of configfs, so it is a user-visable api that can not be changed. Reported-by: John Stultz <john.stultz@linaro.org> Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/CALAqxLX_FNvFndEDWtGbFPjSzuAbfqxQE07diBJFZtftwEJX5A@mail.gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-05-31arm64: dts: qcom: Harmonize DWC USB3 DT nodes nameSerge Semin
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210324204836.29668-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm64: dts: qcs404: Fix dma node nameVinod Koul
DMA controller binding describes the node name should be dma-controller and not dma, so fix the node name Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201027164511.476312-4-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-01arm64: dts: qcom: qcs404: Add IMEM and PIL info regionBjorn Andersson
Add a simple-mfd representing IMEM on QCS404 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200622191942.255460-5-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-04-13arm64: dts: qcom: qcs404: Add USB devices and PHYsBjorn Andersson
QCS404 sports HS and SS USB controllers based on dwc3 block with two HS PHYs and one SS PHY. Add nodes for these devices and enable them for EVB board. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Andy Gross <agross@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20200311191517.8221-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-11arm64: dts: qcom: qcs404: Enable CQE support for eMMCVeerabhadrarao Badiganti
Enabling CQE support for eMMC by supplying the correct reg name and flag which indicates CQE support. Also remove the redundant _mem suffix for reg names. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Link: https://lore.kernel.org/r/1583946863-24308-1-git-send-email-vbadigan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24arm64: dts: qcom: qcs404: Fix sdhci compat stringDouglas Anderson
As per the bindings, the SDHCI controller should have a SoC-specific compatible string in addition to the generic version-based one. Add it. Reviewed-by: Vinod Koul <vkoul@kernel.org> Fixes: 7241ab944da3 ("arm64: dts: qcom: qcs404: Add sdcc1 node") Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200127082331.1.I402470e4a162d69fde47ee2ea708b15bde9751f9@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-04arm64: dts: qcom: qcs404: Add CPR and populate OPP tableNiklas Cassel
Add CPR and populate OPP table. Co-developed-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20191129213917.1301110-4-niklas.cassel@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-04arm64: dts: qcom: qcs404: Add DVFS supportJorge Ramirez-Ortiz
Support dynamic voltage and frequency scaling on qcs404. CPUFreq will soon be superseded by Core Power Reduction (CPR, a form of Adaptive Voltage Scaling found on some Qualcomm SoCs like the qcs404). Due to the CPR upstreaming already being in progress - and some commits already merged - the following commit will need to be reverted to enable CPUFreq support Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Date: Thu Jul 25 12:41:36 2019 +0200 cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191125142511.681149-5-niklas.cassel@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-04arm64: dts: qcom: qcs404: Add the clocks for APCS mux/dividerJorge Ramirez-Ortiz
Specify the clocks that feed the APCS mux/divider instead of using default hardcoded values in the source code. Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191125142511.681149-4-niklas.cassel@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit (git 2.34.1) at 2024-06-03 01:25:11 +0000