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2023-09-14arm64: dts: qcom: sdm845: cheza doesn't support LMh nodeDavid Heidelberg
Cheza firmware doesn't allow controlling LMh from the operating system. Fixes: 36c6581214c4 ("arm64: dts: qcom: sdm845: Add support for LMh node") Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20230912071205.11502-2-david@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-09-14arm64: dts: qcom: sdm845: Fix PSCI power domain namesDavid Heidelberg
The original commit hasn't been updated according to refactoring done in sdm845.dtsi. Fixes: a1ade6cac5a2 ("arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI") Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20230912071205.11502-1-david@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-03arm64: dts: qcom: Use labels with generic node names for ADC channelsMarijn Suijten
As discussed in [1] it is more convenient to use a generic `channel` node name for ADC channels while storing a friendly - board-specific instead of PMIC-specific - name in the label, if/when desired to overwrite the channel description already contained (but previously unused) in the driver [2]. Follow up on the dt-bindings' `channel` node name requirement, and instead provide this (sometimes per-board) channel description through a label property. Also remove all the unused label references (not to be confused with label properties) from pm660, pmp8074 and pms405. [1]: https://lore.kernel.org/linux-arm-msm/20221106193018.270106-1-marijn.suijten@somainline.org/T/#u [2]: https://lore.kernel.org/linux-arm-msm/20230116220909.196926-4-marijn.suijten@somainline.org/ Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230730-generic-adc-channels-v5-2-e6c69bda8034@somainline.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-06-13arm64: dts: qcom: sdm845: rename labels for DSI nodesDmitry Baryshkov
Currently in board files MDSS and DSI nodes stay apart, because labels for DSI nodes do not have the mdss_ prefix. It was found that grouping all display-related notes is more useful. To keep all display-related nodes close in the board files, change DSI node labels from dsi_* to mdss_dsi_*. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230531011623.3808538-12-dmitry.baryshkov@linaro.org
2023-04-07arm64: dts: qcom: sdm845: Fix cheza qspi pin configDouglas Anderson
Cheza's SPI flash hookups (qspi) are exactly the same as trogdor's. Apply the same solution that's described in the patch ("arm64: dts: qcom: sc7180: Fix trogdor qspi pin config") Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323102605.14.I82951106ab8170f973a4c1c7d9b034655bbe2f60@changeid
2023-04-07arm64: dts: qcom: sdm845: Remove superfluous "input-enable"s from chezaDouglas Anderson
As talked about in the patch ("dt-bindings: pinctrl: qcom: tlmm should use output-disable, not input-enable"), using "input-enable" in pinctrl states for Qualcomm TLMM pinctrl devices was either superfluous or there to disable a pin's output. Looking at cheza * ec_ap_int_l, h1_ap_int_odl: Superfluous. The pins will be configured as inputs automatically by the Linux GPIO subsystem (presumably the reference for other OSes using these device trees). * bios_flash_wp_l: Superfluous. This pin is exposed to userspace through the kernel's GPIO API and will be configured automatically. That means that in none of the cases for cheza did we need to change "input-enable" to "output-disable" and we can just remove these superfluous properties. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323102605.11.Ia439c29517b1c0625325a54387b047f099d16425@changeid
2023-03-27arm64: dts: qcom: sdm845-cheza: use just "port" in Innolux panelKrzysztof Kozlowski
The panel bindings expect to have only one port, thus they do not allow to use "ports" node: sdm845-cheza-r2.dtb: panel: 'ports' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230326155753.92007-1-krzysztof.kozlowski@linaro.org
2023-02-08arm64: dts: qcom: sdm845: align RPMh regulator nodes with bindingsKrzysztof Kozlowski
Device node names should be generic and bindings expect certain pattern for RPMh regulator nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230127114347.235963-6-krzysztof.kozlowski@linaro.org
2023-02-08arm64: dts: qcom: use generic node name for BluetoothKrzysztof Kozlowski
Node names should be generic (as Devicetree spec mandates), so use "bluetooth" for BT node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230124084951.38195-1-krzysztof.kozlowski@linaro.org
2023-01-18arm64: dts: qcom: use qcom,gsi-loader for IPAAlex Elder
Depending on the platform, either the modem or the AP must load GSI firmware for IPA before it can be used. To date, this has been indicated by the presence or absence of a "modem-init" property. That mechanism has been deprecated. Instead, we indicate how GSI firmware should be loaded by the value of the "qcom,gsi-loader" property. Update all arm64 platforms that use IPA to use the "qcom,gsi-loader" property to specify how the GSI firmware is loaded. Update the affected nodes so the status property is last. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> [bjorn: Moved sc7280 change herobrine-lte-sku] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221231002716.2367375-3-elder@linaro.org
2023-01-10arm64: dts: qcom: sdm845: align TLMM pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221222151319.122398-3-krzysztof.kozlowski@linaro.org
2022-12-27arm64: dts: qcom: Use plural _gpios node label for PMIC gpiosMarijn Suijten
The gpio node in PMIC dts'es define access to multiple GPIOs. Most Qcom PMICs were already using the plural _gpios label to point to this node, but a few PMICs were left behind including the recently-pulled pm(i)8950. Rename it from *_gpio to *_gpios for pm6125, pm6150(l), pm8005, pm(i)8950, and pm(i)8998. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221209220450.1793421-1-marijn.suijten@somainline.org
2022-10-17arm64: dts: qcom: sdm845-*: fix uart6 aliasesCaleb Connolly
Some devices have been using hsuart0 as an alias for the bluetooth UART, rename this to serial1 Signed-off-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172944.1892206-4-kc@postmarketos.org
2022-10-17arm64: dts: qcom: sdm845: commonize bluetooth UART pinmuxCaleb Connolly
The 4-pin configuration for UART6 is used for all or almost all SDM845 devices with built in Bluetooth. Move the pinmux configuration to sdm845.dtsi in preparation to be removed from individual devices in future patches. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172944.1892206-2-kc@postmarketos.org
2022-10-17arm64: dts: qcom: correct white-space before {Krzysztof Kozlowski
Add missing space or remove redundant one before opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220919163333.129989-1-krzysztof.kozlowski@linaro.org
2022-10-17arm64: dts: qcom: sdm845-cheza: fix AP suspend pin biasKrzysztof Kozlowski
There is no "bias-no-pull" property. Assume intentions were disabling bias. Fixes: 79e7739f7b87 ("arm64: dts: qcom: sdm845-cheza: add initial cheza dt") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221010114417.29859-3-krzysztof.kozlowski@linaro.org
2022-07-06arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSIAbel Vesa
Switch from the flat PC idle states of sdm845 to OSI hierarchical idle states. The exceptions are the cheza plaftorms, which need to remain with PC idle states. So in order allow all the other platforms to switch, while cheza platforms to remain the same, replace the PC idle states with the OSI ones in the main SDM845 dtsi, and then override the inherited OSI states with PC ones, delete inherited psci cpus nodes, domain idle states and power domain properties. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220630101403.1888541-1-abel.vesa@linaro.org
2022-07-02arm64: dts: qcom: align gpio-key node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-21-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: adjust whitespace around '='Krzysztof Kozlowski
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
2022-02-24arm64: dts: qcom: align Google CROS EC PWM node name with dtschemaKrzysztof Kozlowski
dtschema expects PWM node name to be a generic "pwm". This also matches Devicetree specification requirements about generic node names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220214081916.162014-4-krzysztof.kozlowski@canonical.com
2021-10-23arm64: dts: qcom: sdm845: Move gpio.h inclusion to SoC DTSIKonrad Dybcio
Almost any board that boots and has a way to interact with it (say for the rare cases of just-pstore or let's-rely-on-bootloader-setup) needs to set some GPIOs, so it makes no sense to include gpio.h separately each time. Hence move it to SoC DTSI. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-6-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Don't disable MDP explicitlyKonrad Dybcio
DPU/MDSS is borderline useless without MDP, so disabling both of them makes little sense. With this change, enabling mdss will be enough. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-4-konrad.dybcio@somainline.org
2021-10-23arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by defaultKonrad Dybcio
Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-06-10arm64: dts: qcom: sdm845: Remove cros-pd-update on ChezaStephen Boyd
This compatible string isn't present upstream. Let's drop the node as it isn't used. Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20210601185959.3101132-2-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-24arm64: dts: sdm845: Add iommus property to qupStephen Boyd
The SMMU that sits in front of the QUP needs to be programmed properly so that the i2c geni driver can allocate DMA descriptors. Failure to do this leads to faults when using devices such as an i2c touchscreen where the transaction is larger than 32 bytes and we use a DMA buffer. arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x00000002, GFSYNR0 0x00000002, GFSYNR1 0x000006c0, GFSYNR2 0x00000000 Add the right SID and mask so this works. Reviewed-by: Vinod Koul <vkoul@kernel.org> Tested-by: Caleb Connolly <caleb@connolly.tech> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> [bjorn: Define for second QUP as well, be more specific in sdm845.dtsi] Link: https://lore.kernel.org/r/20201122034149.626045-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-10arm: dts: qcom: sm845: Set the compatible string for the GPU SMMUJordan Crouse
Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable split pagetables and per-instance pagetables for drm/msm. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201109184728.2463097-5-jcrouse@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-07-08arm64: dts: qcom: sc7180: Drop the unused non-MSA SIDSibi Sankar
Having a non-MSA (Modem Self-Authentication) SID bypassed breaks modem sandboxing i.e if a transaction were to originate from it, the hardware memory protections units (XPUs) would fail to flag them (any transaction originating from modem are historically termed as an MSA transaction). Drop the unused non-MSA modem SID on SC7180 SoCs and cheza so that SMMU continues to block them. Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Fixes: bec71ba243e95 ("arm64: dts: qcom: sc7180: Update Q6V5 MSS node") Fixes: 68aee4af5f620 ("arm64: dts: qcom: sdm845-cheza: Add iommus property") Cc: stable@vger.kernel.org Reported-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200630081938.8131-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-08Merge tag 'iommu-updates-v5.8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: "A big part of this is a change in how devices get connected to IOMMUs in the core code. It contains the change from the old add_device() / remove_device() to the new probe_device() / release_device() call-backs. As a result functionality that was previously in the IOMMU drivers has been moved to the IOMMU core code, including IOMMU group allocation for each device. The reason for this change was to get more robust allocation of default domains for the iommu groups. A couple of fixes were necessary after this was merged into the IOMMU tree, but there are no known bugs left. The last fix is applied on-top of the merge commit for the topic branches. Other than that change, we have: - Removal of the driver private domain handling in the Intel VT-d driver. This was fragile code and I am glad it is gone now. - More Intel VT-d updates from Lu Baolu: - Nested Shared Virtual Addressing (SVA) support to the Intel VT-d driver - Replacement of the Intel SVM interfaces to the common IOMMU SVA API - SVA Page Request draining support - ARM-SMMU Updates from Will: - Avoid mapping reserved MMIO space on SMMUv3, so that it can be claimed by the PMU driver - Use xarray to manage ASIDs on SMMUv3 - Reword confusing shutdown message - DT compatible string updates - Allow implementations to override the default domain type - A new IOMMU driver for the Allwinner Sun50i platform - Support for ATS gets disabled for untrusted devices (like Thunderbolt devices). This includes a PCI patch, acked by Bjorn. - Some cleanups to the AMD IOMMU driver to make more use of IOMMU core features. - Unification of some printk formats in the Intel and AMD IOMMU drivers and in the IOVA code. - Updates for DT bindings - A number of smaller fixes and cleanups. * tag 'iommu-updates-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (109 commits) iommu: Check for deferred attach in iommu_group_do_dma_attach() iommu/amd: Remove redundant devid checks iommu/amd: Store dev_data as device iommu private data iommu/amd: Merge private header files iommu/amd: Remove PD_DMA_OPS_MASK iommu/amd: Consolidate domain allocation/freeing iommu/amd: Free page-table in protection_domain_free() iommu/amd: Allocate page-table in protection_domain_init() iommu/amd: Let free_pagetable() not rely on domain->pt_root iommu/amd: Unexport get_dev_data() iommu/vt-d: Fix compile warning iommu/vt-d: Remove real DMA lookup in find_domain iommu/vt-d: Allocate domain info for real DMA sub-devices iommu/vt-d: Only clear real DMA device's context entries iommu: Remove iommu_sva_ops::mm_exit() uacce: Remove mm_exit() op iommu/sun50i: Constify sun50i_iommu_ops iommu/hyper-v: Constify hyperv_ir_domain_ops iommu/vt-d: Use pci_ats_supported() iommu/arm-smmu-v3: Use pci_ats_supported() ...
2020-05-11arm64: dts: sdm845: Add "no-hpd" to sn65dsi86 on chezaDouglas Anderson
We don't have the HPD line hooked up to the bridge chip. Add it as suggested in the patch ("dt-bindings: drm/bridge: ti-sn65dsi86: Document no-hpd"). NOTE: this patch isn't expected to have any effect but just keeps us cleaner for the future. Currently the driver in Linux just assumes that nobody has HPD hooked up. This change allows us to later implement HPD support in the driver without messing up sdm845-cheza. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200507143354.v5.6.I89df9b6094549b8149aa8b8347f7401c678055b0@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-07arm64: dts: qcom: sdm845-cheza: Add iommus propertySibi Sankar
Add iommus property to remoteproc modem node. Following SMMU global faults are seen without it. arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000781, GFSYNR2 0x00000000 arm-smmu 15000000.iommu: Unexpected global fault, this could be serious arm-smmu 15000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000461, GFSYNR2 0x00000000 Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/38c607841e81664a2db69a27260cd7dfbd653458.1587407458.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon <will@kernel.org>
2020-03-16arm64: dts: sdm845: add IPA informationAlex Elder
Add IPA-related nodes and definitions to "sdm845.dtsi". Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20200313115237.10491-2-elder@linaro.org [bjorn: Moved modem-init to cheza.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-24arm64: dts: qcom: add Venus firmware node on ChezaAlexandre Courbot
Cheza boards require this node to probe, so add it. Reviewed-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Alexandre Courbot <acourbot@chromium.org> Link: https://lore.kernel.org/r/20200108032623.113921-1-acourbot@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-02-11arm64: dts: qcom: sdm845: Disable pwrkey on ChezaStephen Boyd
We don't use the power key from the PMIC on Cheza. Disable this node so that we don't probe the driver for this device. Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20200121171806.9933-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-13arm64: dts: qcom: sdm845: move gpu zap nodes to per-device dtsRob Clark
We want to specify per-device firmware-name, so move the zap node into the .dts file for individual boards/devices. This lets us get rid of the /delete-node/ for cheza, which does not use zap. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20200112195405.1132288-5-robdclark@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-16arm64: dts: qcom: sdm845-cheza: Add cr50 spi nodeStephen Boyd
Add the cr50 device to the spi controller it is attached to. This enables /dev/tpm0 and some login things on Cheza. Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20191216234204.190769-1-swboyd@chromium.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-27arm64: dts: qcom: sdm845-cheza: delete zap-shaderRob Clark
This is unused on cheza. Delete the node to get ride of the reserved- memory section, and to avoid the driver from attempting to load a zap shader that doesn't exist every time it powers up the GPU. This also avoids a massive amount of dmesg spam about missing zap fw: msm ae00000.mdss: [drm:adreno_request_fw] *ERROR* failed to load qcom/a630_zap.mdt: -2 adreno 5000000.gpu: [drm:adreno_zap_shader_load] *ERROR* Unable to load a630_zap.mdt Signed-off-by: Rob Clark <robdclark@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Fixes: 3fdeaee951aa ("arm64: dts: sdm845: Add zap shader region for GPU") Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-10-01arm64: dts: qcom: sdm845: Use UFS reset gpio instead of pinctrlStephen Boyd
We use a pinctrl "workaround" to toggle the UFS reset line. Now that UFS controller can issue the reset, just specify the line as a GPIO and let it be reset that way. Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-08-05arm64: dts: qcom: sdm845-cheza: Spelling s/conenctors/connectors/Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-07-25arm64: dts: qcom: sdm845-cheza: remove macro from unit nameVinod Koul
Unit address is supposed to be a number, using a macro with hex value is not recommended, so add the value in unit name. arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:966.16-969.4: Warning (unit_address_format): /soc@0/spmi@c440000/pmic@0/adc@3100/adc-chan@0x4d: unit name should not have leading "0x" arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:971.16-974.4: Warning (unit_address_format): /soc@0/spmi@c440000/pmic@0/adc@3100/adc-chan@0x4e: unit name should not have leading "0x" arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:976.16-979.4: Warning (unit_address_format): /soc@0/spmi@c440000/pmic@0/adc@3100/adc-chan@0x4f: unit name should not have leading "0x" arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:981.16-984.4: Warning (unit_address_format): /soc@0/spmi@c440000/pmic@0/adc@3100/adc-chan@0x50: unit name should not have leading "0x" arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:986.16-989.4: Warning (unit_address_format): /soc@0/spmi@c440000/pmic@0/adc@3100/adc-chan@0x51: unit name should not have leading "0x" Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-06-25arm64: dts: qcom: sdm845-cheza: add initial cheza dtRob Clark
This is essentialy a squash of a bunch of history of cheza dt updates from chromium kernel, some of which were themselves squashes of history from older chromium kernels. I don't claim any credit other than wanting to more easily boot upstream kernel on cheza to have an easier way to test upstream driver work ;-) I've added below in Cc tags all the original actual authors (apologies if I missed any). Cc: Douglas Anderson <dianders@chromium.org> Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Evan Green <evgreen@chromium.org> Cc: Matthias Kaehlcke <mka@chromium.org> Cc: Abhinav Kumar <abhinavk@codeaurora.org> Cc: Brian Norris <briannorris@chromium.org> Cc: Venkat Gopalakrishnan <venkatg@codeaurora.org> Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Andy Gross <agross@kernel.org>
generated by cgit (git 2.34.1) at 2024-05-13 18:08:03 +0000