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path: root/arch/arm64/boot/dts/qcom
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2021-12-22arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCXBjorn Andersson
The SM6125_VDDCX constant is introduced through a separate branch and is not available in the dts branch. Temporarily replace the constant with it's value to avoid the build breakage. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-12-20arm64: dts: qcom: sm8450-qrd: Enable USB nodesVinod Koul
Enable the usb phy and usb controller in peripheral mode. This helps to get the adb working with the QRD board. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211216110813.658384-2-vkoul@kernel.org
2021-12-20arm64: dts: qcom: sm8450: Add usb nodesVinod Koul
SM8450 features a single USB controller which connects to both HS and SS phy. Add the USB and the phy nodes for Qualcomm SM8450 SoC. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211216110813.658384-1-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodesDmitry Baryshkov
Add device tree nodes for two i2c blocks: i2c13 and i2c14. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-12-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add cpufreq supportVladimir Zapolskiy
The change adds a description of a SM8450 cpufreq-epss controller and references to it from CPU nodes. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-11-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add rpmhpd nodeDmitry Baryshkov
This adds RPMH power domain found in SM8450 SoC Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-10-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450-qrd: enable ufs nodesVinod Koul
Enable the UFS and phy node and add the regulators used by them. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-9-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add ufs nodesVinod Koul
Add the UFS and QMP PHY node for SM8450 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-8-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodesVinod Koul
Add the RPMH regulators found in QRD-SM8450 platform Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-7-vkoul@kernel.org
2021-12-15arm64: dts: qcom: Add base SM8450 QRD DTSVinod Koul
Add DTS for Qualcomm QRD platform which uses SM8450 SoC and mark the reserved nodes. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-6-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: add smmu nodesVinod Koul
Add the apps smmu node as found in the SM8450 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-5-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add reserved memory nodesVinod Koul
Add the reserved memory nodes for SM8450. This is based on the downstream documentation. Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-4-vkoul@kernel.org
2021-12-15arm64: dts: qcom: sm8450: Add tlmm nodesVinod Koul
Add tlmm node found in SM8450 SoC and uart pin configuration Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-3-vkoul@kernel.org
2021-12-15arm64: dts: qcom: Add base SM8450 DTSIVinod Koul
This add based DTSI for SM8450 SoC and includes base description of CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to shell with console on boards with this SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211215043440.605624-2-vkoul@kernel.org
2021-12-15arm64: dts: qcom: ipq6018: Fix gpio-ranges propertyBaruch Siach
There must be three parameters in gpio-ranges property. Fixes this not very helpful error message: OF: /soc/pinctrl@1000000: (null) = 3 found 3 Fixes: 1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support") Cc: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/8a744cfd96aff5754bfdcf7298d208ddca5b319a.1638862030.git.baruch@tkos.co.il
2021-12-15arm64: dts: qcom: sdm845: add QFPROM chipset specific compatibleDavid Heidelberg
Use correct compatible according to dt-binding. Fixes + few other lines of `make qcom/sdm845-oneplus-fajita.dtb`: arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: qfprom@784000: compatible: ['qcom,qfprom'] is too short From schema: Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213190228.106924-1-david@ixit.cz
2021-12-15arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zonesBjorn Andersson
Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
2021-12-15arm64: dts: qcom: pm8998: Add ADC Thermal Monitor nodeBjorn Andersson
Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is used to connect thermal zones with ADC channels. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-4-bjorn.andersson@linaro.org
2021-12-15arm64: qcom: dts: drop legacy property #stream-id-cellsDavid Heidelberg
Property #stream-id-cells is legacy leftover and isn't currently documented nor used. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz
2021-12-15Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"Konrad Dybcio
This reverts commit ed9500c1df59437856d43e657f185fb1eb5d817d. The clock-frequency property was meant to aid platforms with broken firmwares that don't set up the timer properly on their own. Don't include it where it is not the case. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211202004328.459899-1-konrad.dybcio@somainline.org
2021-12-15arm64: dts: qcom: c630: add headset jack and button detection supportSrinivas Kandagatla
Add MBHC support available in WCD934X codec. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209175342.20386-3-srinivas.kandagatla@linaro.org
2021-12-15arm64: dts: qcom: c630: Fix soundcard setupSrinivas Kandagatla
Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback. This setup has issues, ex if we try to play on headset the audio stream is also sent to SoundWire Speakers and we will hear sound in both headsets and speakers. Make a separate device for Speakers and Headset so that the streams are different and handled properly. Fixes: 45021d35fcb2 ("arm64: dts: qcom: c630: Enable audio support") Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209175342.20386-2-srinivas.kandagatla@linaro.org
2021-12-14arm64: dts: qcom: add minimal DTS for Microsoft Surface Duo 2Katherine Perez
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350 Chipset Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209183246.842880-2-kaperez@linux.microsoft.com
2021-12-14arm64: dts: qcom: sdm845-oneplus-*: add msm-id and board-idCaleb Connolly
The msm-id and board-id can be used to select the correct dtb when multiple are provided to the bootloader. Multiple DTBs can be provided on sdm845 devices using boot image header v1 by appending them all to the kernel image before creating the boot image. The bootloader then selects them like this: Best match DTB tags 321/00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0 Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211209225938.2427342-1-caleb.connolly@linaro.org
2021-12-13arm64: dts: qcom: sm7225-fairphone-fp4: Enable ADSP, CDSP & MPSSLuca Weiss
Enable the remoteprocs found on the SoC and add a qcom,rmtfs-mem node. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213082208.21492-9-luca.weiss@fairphone.com
2021-12-13arm64: dts: qcom: sm6350: Add CDSP nodesLuca Weiss
Add the required nodes for booting the CDSP on sm6350. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213082208.21492-8-luca.weiss@fairphone.com
2021-12-13arm64: dts: qcom: sm6350: Add ADSP nodesLuca Weiss
Add the required nodes for booting the ADSP on sm6350. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213082208.21492-6-luca.weiss@fairphone.com
2021-12-13arm64: dts: qcom: sm6350: Add MPSS nodesLuca Weiss
Add the required nodes for booting the MPSS on sm6350. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213082208.21492-4-luca.weiss@fairphone.com
2021-12-13arm64: dts: qcom: sm6350: Fix validation errorsLuca Weiss
Sort clocks and interrupts as specified in the docs and remove the stray property #power-domain-cells from aoss_qmp to solve dtbs_check validation errors. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211213082614.22651-11-luca.weiss@fairphone.com
2021-12-13arm64: dts: qcom: Add device tree for Samsung J5 2015 (samsung-j5)Julian Ribbeck
Samsung J5 2015 is a MSM8916 based Smartphone. It is similar to some of the other MSM8916 devices, especially the Samsung ones. With this patch initial support for the following is added: - eMMC/SD card - Buttons - USB (although no suiting MUIC driver currently) - UART (untested for lack of equipment) - WiFi/Bluetooth (WCNSS) It is worth noting that Samsung J5 with MSM8916 exists in different generations (e.g Samsung J5 2015 and Samsung J5 2016) which each have different models (e.g. samsung-j5nlte, samsung-j5xnlte, etc). This patch is only regarding the 2015 generation, but should work with all of it's models, as far as we could test. Co-developed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Julian Ribbeck <julian.ribbeck@gmx.de> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211116200734.73920-1-julian.ribbeck@gmx.de
2021-11-30arm64: dts: qcom: msm8916: fix MMC controller aliasesDmitry Baryshkov
Change sdhcN aliases to mmcN to make them actually work. Currently the board uses non-standard aliases sdhcN, which do not work, resulting in mmc0 and mmc1 hosts randomly changing indices between boots. Fixes: c4da5a561627 ("arm64: dts: qcom: Add msm8916 sdhci configuration nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201020559.1611890-1-dmitry.baryshkov@linaro.org
2021-11-30arm64: dts: qcom: sm6125: Add power domains to sdhcMartin Botka
Add RPM Power Domains to internal eMMC and SDCard. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211130212332.25401-4-martin.botka@somainline.org
2021-11-30arm64: dts: qcom: sm6125: Add RPMPD nodeMartin Botka
Add RPM Power Distribution node for sm6125 SoC. Signed-off-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211130212332.25401-3-martin.botka@somainline.org
2021-11-30arm64: dts: qcom: sc7280-crd: Add Touchscreen and touchpad supportKshitiz Godara
Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board Signed-off-by: Kshitiz Godara <kgodara1@codeaurora.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1638185497-26477-5-git-send-email-quic_rjendra@quicinc.com
2021-11-30arm64: dts: qcom: sc7280: Define EC and H1 nodes for IDP/CRDKshitiz Godara
The IDP2 and CRD boards share the EC and H1 parts, so define all related device nodes into a common file and include them in the idp2 and crd dts files to avoid duplication. Signed-off-by: Kshitiz Godara <kgodara@codeaurora.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1638185497-26477-4-git-send-email-quic_rjendra@quicinc.com
2021-11-30arm64: dts: qcom: sc7280-crd: Add device tree files for CRDRajendra Nayak
CRD (Compute Reference Design) is a sc7280 based board, largely derived from the existing IDP board design with some key deltas 1. has EC and H1 over SPI similar to IDP2 2. touchscreen and trackpad support 3. eDP display We just add the barebones dts file here, subsequent patches will add support for EC/H1 and other components. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1638185497-26477-3-git-send-email-quic_rjendra@quicinc.com
2021-11-30arm64: dts: qcom: Drop input-name propertyDang Huynh
This property doesn't seem to exist in the documentation nor in source code, but for some reason it is defined in a bunch of device trees. Signed-off-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211123162436.1507341-1-danct12@riseup.net
2021-11-30arm64: dts: qcom: sdm660-xiaomi-lavender: Add volume up buttonDang Huynh
This enables the volume up key. Signed-off-by: Dang Huynh <danct12@riseup.net> Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211121170449.1124048-1-danct12@riseup.net
2021-11-30arm64: dts: qcom: msm8916: Add RPM sleep statsStephan Gerhold
MSM8916 is similar to the other SoCs that had the RPM stats node added in commit 290bc6846547 ("arm64: dts: qcom: Enable RPM Sleep stats"). However, the dynamic offset readable at 0x14 seems only available on some of the newer firmware versions. To be absolutely sure, make use of the new qcom,msm8916-rpm-stats compatible that reads the sleep stats from a fixed offset of 0xdba0. Statistics are available for a "vmin" and "xosd" low power mode: $ cat /sys/kernel/debug/qcom_stats/vmin Count: 0 Last Entered At: 0 Last Exited At: 0 Accumulated Duration: 0 Client Votes: 0x0 $ cat /sys/kernel/debug/qcom_stats/xosd Count: 0 Last Entered At: 0 Last Exited At: 0 Accumulated Duration: 0 Client Votes: 0x0 Cc: Maulik Shah <mkshah@codeaurora.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211119213953.31970-4-stephan@gerhold.net
2021-11-30arm64: dts: qcom: sm8250: Add CPU opp tablesThara Gopinath
Add OPP tables to scale DDR and L3 with CPUs for SM8250 SoCs. Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211110215330.74257-1-thara.gopinath@linaro.org
2021-11-20arm64: dts: qcom: sdm660-xiaomi-lavender: Add USBAlexey Min
Enable and configure DWC3 and QUSB2 PHY to enable USB functionality on the Redmi Note 7. Signed-off-by: Alexey Min <alexey.min@gmail.com> Co-developed-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-9-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm660-xiaomi-lavender: Enable Simple FramebufferDang Huynh
This lets the user sees the framebuffer console. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-8-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm660-xiaomi-lavender: Add eMMC and SDDang Huynh
This commit enable the SD card slot and internal MMC. Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-7-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm660-xiaomi-lavender: Add PWRKEY and RESINDang Huynh
This enables the volume down key as well as the power button. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-5-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm660-xiaomi-lavender: Add RPM and fixed regulatorsDang Huynh
Add most of the RPM PM660/PM660L regulators and the fixed ones, defining the common electrical part of this platform. Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-4-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm630-pm660: Move RESIN to pm660 dtsiDang Huynh
It's not worth duplicating the same node over and over again, so let's keep the common bits in the pm660 DTSI, making only changing the status and keycode necessary. Also, disable RESIN/PWR by default just in case if there are devices that doesn't use them. Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-3-danct12@riseup.net
2021-11-20arm64: dts: qcom: sdm630: Assign numbers to eMMC and SDDang Huynh
This makes eMMC/SD device number consistent. Reviewed-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Dang Huynh <danct12@riseup.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-2-danct12@riseup.net
2021-11-20arm64: dts: qcom: sc7280: Fix 'interrupt-map' parent address cellsPrasad Malisetty
Update interrupt-map parent address cells for sc7280 Similar to existing Qcom SoCs. Fixes: 92e0ee9f8 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1637060508-30375-4-git-send-email-pmaliset@codeaurora.org
2021-11-20arm64: dts: qcom: sc7280: Add pcie clock supportPrasad Malisetty
Add pcie clock phandle for sc7280 SoC. Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1637060508-30375-3-git-send-email-pmaliset@codeaurora.org
2021-11-20arm64: dts: qcom: sc7280: Fix incorrect clock namePrasad Malisetty
Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk To match with dt binding. Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node") Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1637060508-30375-2-git-send-email-pmaliset@codeaurora.org
generated by cgit (git 2.34.1) at 2025-06-03 09:50:12 +0000