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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.9 (take two)
- Add pin control, I2C, GPIO, CA76 cluster, Ethernet, SD/MMC, DMA, and
HyperFLASH/QSPI (RPC) support for the R-Car V4M SoC,
- Add I2C EEPROM, Ethernet, eMMC, and QSPI FLASH support for the Gray
Hawk Single development board,
- Fix PCIe power on ULCB development boards equipped with the
Shimafuji Kingfisher extension,
- Add PSCI support for the RZ/G3S SoC,
- Add camera support for the RZ/G2UL SMARC EVK development board,
- Add display support for the RZ/G2L{,C} and RZ/V2L SoCs and SMARC EVK
development boards,
- Miscellaneous fixes and improvements,
* tag 'renesas-dts-for-v6.9-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (31 commits)
arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI
arm64: dts: renesas: r9a07g054: Add DU node
arm64: dts: renesas: r9a07g044: Add DU node
arm64: dts: renesas: gray-hawk-single: Add QSPI FLASH support
arm64: dts: renesas: r8a779h0: Add RPC node
arm64: dts: renesas: r8a779h0: Add DMA support
arm64: dts: renesas: gray-hawk-single: Add eMMC support
arm64: dts: renesas: r8a779h0: Add SD/MMC node
ARM: dts: renesas: r8a7778: Add missing reg-names to sound node
arm64: dts: renesas: rzg2ul-smarc: Enable CRU, CSI support
arm64: dts: renesas: gray-hawk-single: Add Ethernet support
arm64: dts: renesas: r8a779h0: Add Ethernet-AVB support
arm64: dts: renesas: r8a779g0: Correct avb[01] reg sizes
arm64: dts: renesas: r8a779a0: Correct avb[01] reg sizes
arm64: dts: renesas: r9a08g045: Add PSCI support
arm64: dts: renesas: rzg3s-smarc-som: Guard Ethernet IRQ GPIO hogs
arm64: dts: renesas: r9a08g045: Add missing interrupts to IRQC node
arm64: dts: renesas: rzg2l: Add missing interrupts to IRQC nodes
arm64: dts: renesas: r8a779h0: Add CA76 operating points
arm64: dts: renesas: r8a779h0: Add CPU core clocks
...
Link: https://lore.kernel.org/r/cover.1708687134.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.9
- Add GPIO keys and watchdog support for the RZ/G3S SMARC development
board,
- Add GNSS support for Renesas ULCB development boards equipped with
the Shimafuji Kingfisher extension,
- Add support for the standalone White Hawk CPU board,
- Add support for the R-Car V4H ES2.0 (R8A779G2) SoC and the White
Hawk Single development board,
- Add initial support for the R-Car V4M (R8A779H0) SoC and the Gray
Hawk Single development board,
- Add camera support for the RZ/G2UL SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
arm64: dts: renesas: gray-hawk-single: Enable watchdog timer
arm64: dts: renesas: r8a779h0: Add RWDT node
arm64: dts: renesas: Improve TMU interrupt descriptions
ARM: dts: renesas: Improve TMU interrupt descriptions
arm64: dts: renesas: r9a07g043u: Add CSI and CRU nodes
arm64: dts: renesas: Add Gray Hawk Single board support
arm64: dts: renesas: Add Renesas R8A779H0 SoC support
arm64: dts: renesas: rzg3s-smarc-som: Enable the watchdog interface
arm64: dts: renesas: r9a08g045: Add watchdog node
arm64: dts: renesas: r8a779g0: Add missing SCIF_CLK2
dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions
dt-bindings: clock: renesas,cpg-mssr: Document R-Car V4M support
dt-bindings: power: Add r8a779h0 SYSC power domain definitions
dt-bindings: power: renesas,rcar-sysc: Document R-Car V4M support
arm64: dts: renesas: r8a779g2: Add White Hawk Single support
arm64: dts: renesas: Add Renesas R8A779G2 SoC support
arm64: dts: renesas: white-hawk: Factor out common parts
arm64: dts: renesas: white-hawk-cpu: Factor out common parts
arm64: dts: renesas: white-hawk: Add SoC name to top-level comment
arm64: dts: renesas: white-hawk: Drop SoC parts from sub boards
...
Link: https://lore.kernel.org/r/cover.1707487834.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable DU and link with DSI on RZ/{G2L,G2LC,V2L} SMARC EVK.
Move DSI port properties from board dtsi to SoC dtsi and then link with DU
and after that enable DU on the board dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240222132117.137729-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add DU node to RZ/V2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240222132117.137729-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add DU node to RZ/G2L SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240222132117.137729-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Describe the QSPI FLASH on the Gray Hawk Single board.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/96d6567024cef9fcd6b04f92a697301c1c8d1d8e.1708354463.git.geert+renesas@glider.be
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Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/26f9c5d5a7944db3813ed53459aa9c5767c1bdc0.1708354463.git.geert+renesas@glider.be
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Add device nodes for the Direct Memory Access Controllers for System
(SYS-DMAC) on the Renesas R-Car V4M (R8A779H0) SoC.
Link all DMA consumers to the corresponding DMA controller channels.
Based on patches in the BSP by Thanh Le and Minh Le.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/44de886cd83f41659d2f6962c0e277f548fb0adb.1707916707.git.geert+renesas@glider.be
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Describe the eMMC on the Gray Hawk Single board.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/208bfc781b1488e253e19626ad80876c34c86758.1707915763.git.geert+renesas@glider.be
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Add a device node for SD/MMC on Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/4433cd73049ae517ea163bc703555ee8d9a4dd82.1707915763.git.geert+renesas@glider.be
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Enable CRU and CSI on RZ/G2UL SMARC EVK and tie the CSI to the OV5645
sensor using a Device Tree overlay.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240213141300.159847-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Describe the wiring of the first Ethernet AVB instance to the Micrel
KSZ9031RNXVB PHY.
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b83b21b6477a0e31f99eaedbd36c03014b72ec8a.1707661382.git.geert+renesas@glider.be
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Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on
the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ae7488c0065b455b45f23253c997a94f4850064f.1707661382.git.geert+renesas@glider.be
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All Ethernet AVB instances on R-Car V4H have registers related to UDP/IP
support, but the declared register blocks for the first two instances
are too small to cover them.
Fix this by extending the register block sizes.
Fixes: 848c82db56923a8b ("arm64: dts: renesas: r8a779g0: Add RAVB nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/83437778614a7c96f4d8f1be98dffeee29bb4a0b.1707660323.git.geert+renesas@glider.be
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All Ethernet AVB instances on R-Car V3U have registers related to UDP/IP
support, but the declared register blocks for the first two instances
are too small to cover them.
Fix this by extending the register block sizes.
Fixes: 5a633320f08b8c9b ("arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ce6ce3c4b1495e02e7c1803fca810a7178a84500.1707660323.git.geert+renesas@glider.be
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Add PSCI support to enable suspend/resume with the help of TF-A.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208135629.2840932-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ethernet IRQ GPIOs are marked as GPIO hogs. Thus, these GPIOs are
requested at probe time without considering if there are other
peripherals that need them. The Ethernet IRQ GPIOs are shared with
SDHI2. Selection between Ethernet and SDHI2 is done through a hardware
switch. To avoid scenarios where one wants to boot with SDHI2 support
and some SDHI pins are not propertly configured because of the GPIO
hogs, guard the Ethernet IRQ GPIO hogs with the proper build flag.
Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The IRQC block on the RZ/G3S (R9A08G045) SoC supports ECCRAM error
interrupts too. Add those missing interrupts to the IRQC node.
Fixes: 837918aa3fdd ("arm64: dts: renesas: r9a08g045: Add IA55 interrupt controller node")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240205144421.51195-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The IRQC IP block supports Bus error and ECCRAM interrupts on RZ/G2L and
alike SoC's (listed below). Update the IRQC nodes with the missing
interrupts, and additionally, include the 'interrupt-names' properties
in the IRQC nodes so that the driver can parse interrupts by name.
- R9A07G043U - RZ/G2UL
- R9A07G044L/R9A07G044LC - RZ/{G2L,G2LC}
- R9A07G054 - RZ/V2L
Fixes: 5edc51af5b30 ("arm64: dts: renesas: r9a07g044: Add IRQC node")
Fixes: 48ab6eddd8bb ("arm64: dts: renesas: r9a07g043u: Add IRQC node")
Fixes: 379478ab09e0 ("arm64: dts: renesas: r9a07g054: Add IRQC node")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240205144421.51195-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add operating points for running the Cortex-A76 CPU cores on R-Car V4M
at various speeds, up to the Normal (1.0 GHz).
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/736b5836ec2b54e8b36712866309dc1b7ee1fc48.1706796979.git.geert+renesas@glider.be
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Describe the clocks for the four Cortex-A76 CPU cores.
CA76 CPU cores 0,1,2,3 are clocked by ZC0,ZC1,ZC2,ZC3.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c64cf6ca1590fa1a36b90a18fd70c831d5b8318e.1706796979.git.geert+renesas@glider.be
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Support CPUIdle for ARM Cortex-A76 on R-Car V4M.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/848d176bdbcaf3bc44e5dae555afa9c812a19fd1.1706796979.git.geert+renesas@glider.be
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Complete the description of the Cortex-A76 CPU cores and L3 cache
controllers on the Renesas R-Car V4M (R8A779H0) SoC, including CPU
topology and PSCI support for enabling CPU cores.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c2a38a0da74915bf2a9171e53886c83a1c732934.1706796979.git.geert+renesas@glider.be
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Describe the cache configuration for the first Cortex-A76 CPU core on
the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9d56a46892c5e0957d244370e6809013cf815905.1706796979.git.geert+renesas@glider.be
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Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/d4c1c40404ab84c7e7c07612077ca1a319ae7283.1706796918.git.geert+renesas@glider.be
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Enable the I2C0 bus on the Gray Hawk Single board, and describe the I2C
EEPROMs present.
Based on patches for Gray Hawk in the BSP by Hai Pham.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/960595394a274b675f1ec9ec1c324e4cc1ac1f77.1706796660.git.geert+renesas@glider.be
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Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4M
(R8A779H0) SoC.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/7dbbe13428273c5786ddff6ea7af6724fcdd4de8.1706796660.git.geert+renesas@glider.be
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Sound uses the standard 5V supply, so rename the fixed regulator as
such. Also add properties documenting it is always on, also during boot.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129212350.33370-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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It is named T1.8V in the schematics. Also add properties documenting it
is always on, also during boot.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129212350.33370-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Without them, no power, so cards do not get recognized.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240129135840.28988-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Complete the descriptions of the serial console and the external serial
clock by adding pin control.
Based on patches for Gray Hawk in the BSP by Hai Pham and Nghia Nguyen.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b1eb2d3364d5ead7f7bcf7a737c5914971db64d3.1706266286.git.geert+renesas@glider.be
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Add a device node for the Pin Function Controller on the Renesas R-Car
V4M (R8A779H0) SoC.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0ab32290014b64ddbee5c9ec2808c8294d0b6192.1706266286.git.geert+renesas@glider.be
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The dtc interrupt_provider warning is off by default. Fix all the warnings
so it can be enabled.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> #
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Acked-by: Chanho Min <chanho.min@lge.com>
Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-3-f2dee1292525@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Enable the watchdog timer on the Gray Hawk Single board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/cf6effafd9e0472a457eed9d84a834abc3e1c833.1706790320.git.geert+renesas@glider.be
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Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car V4M (R8A779H0) SoC.
Signed-off-by: Minh Le <minh.le.aj@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/43bb03f3baa87b4be8ce953b1955df6b89387e4c.1706790320.git.geert+renesas@glider.be
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Add the input capture interrupt on Timer Unit instances that have it.
Add "interrupt-names" properties for clarity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5c70ad8c2ea14333616c5add31a4a958f4a47081.1705325654.git.geert+renesas@glider.be
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Add CSI and CRU nodes r9a07g043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240126133116.121981-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add initial support for the Renesas Gray Hawk Single board, which is
based on the R-Car V4M (R8A779H0) SoC:
- Memory,
- Crystal oscillators,
- Serial console.
Based on the White Hawk Single DTS, and on a patch for the Gray Hawk
board stack in the BSP by Hai Pham.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be
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Add initial support for the Renesas R-Car V4M (R8A779H0) SoC.
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/4107bc3d7c31932da29e671ddf4b1564ba38a84c.1706194617.git.geert+renesas@glider.be
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Enable the watchdog interface (accessible by Cortex-A of RZ/G3S SoC) on
RZ/G3S SMARC SoM.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240122111115.2861835-11-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S
SoC (R9108G045).
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240122111115.2861835-10-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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R-Car V4H actually has two SCIF_CLK pins.
The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4.
Fixes: a4c31c56d2d35641 ("arm64: dts: renesas: r8a779g0: Add SCIF nodes")
Fixes: 39d9dfc6fbe1860e ("arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/72f20c1bf32187bd30a963cafe27252907d661f9.1705589612.git.geert+renesas@glider.be
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The White Hawk Single board is a single-board integration of the Renesas
White Hawk CPU and Breakout board stack, based on the R-Car V4H ES2.0
(R8A779G2) SoC.
For now, the only visible differences compared to the board stack are:
- The SoC is an updated version of R-Car V4H (R8A779G0),
- The serial console uses an FT2232H instead of a CP2102 USB-UART
bridge, with CTS/RTS wired.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/2b8d37949c17cca170c1d9e97f10a100b20c5cd9.1706192990.git.geert+renesas@glider.be
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Add support for the Renesas R-Car V4H ES2.0 (R8A779G2) SoC, which is an
updated version of the R-Car V4H (R8A779G0) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/4f773dbb66af5da51d1e171424ec8f97ee933b36.1706192990.git.geert+renesas@glider.be
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Factor out the parts on the White Hawk BreakOut board that are also
present on the White Hawk Single board, so they can be reused when
introducing support for the latter.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/8c05b4d283b5d765fbc6f64cee9a247cded29409.1706192990.git.geert+renesas@glider.be
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Factor out the parts on the White Hawk CPU board that are also present
on the White Hawk Single board, so they can be reused when introducing
support for the latter.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/50676e7e9ac1c50ab450c030481f60ece4c3947e.1706192990.git.geert+renesas@glider.be
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The White Hawk CPU and BreakOut board DTS is specific to R-Car V4H.
Document it in the top-level comment.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/de81db7ca38c8f4737092bdac6891e9db4bb9bd6.1706192990.git.geert+renesas@glider.be
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The White Hawk CSI/DSI and RAVB/Ethernet(1000Base-T1) sub boards are not
specific to R-Car V4H.
Hence rename their DTS file names to drop the "r8a779g0-" prefix, and
remove any references to R-Car V4H.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f89613d0df04cfa6196f8797fe655cf7cec812de.1706192990.git.geert+renesas@glider.be
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Alphabetical by node name.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f375293d6e21659ee30a86e2b46e4998a75ea3b5.1706192990.git.geert+renesas@glider.be
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The White Hawk CPU board can be used standalone, without connecting it
to the White Hawk BreakOut board.
Add a DTS file for supporting this use case.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/95ac53e7f2bc42402eb411ad7f64a66864a3de01.1706192990.git.geert+renesas@glider.be
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