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Pull SoC DT updates from Arnd Bergmann:
"There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
the Rockchips rv1109 and Sopgho CV1812H are just minor variations of
already supported chips.
The other six new SoCs are all part of existing arm64 families, but
are somewhat more interesting:
- Samsung ExynosAutov920 is an automotive chip, and the first one we
support based on the Cortex-A78AE core with lockstep mode.
- Google gs101 (Tensor G1) is the chip used in a number of Pixel
phones, and is grouped with Samsung Exynos here since it is based
on the same SoC design, sharing most of its IP blocks with that
series.
- MediaTek MT8188 is a new chip used for mid-range tablets and
Chromebooks, using two Cortex-A78 cores where the older MT8195 had
four of them.
- Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range
phone SoC and the first supported chip based on Cortex-X4,
Cortex-A720 and Cortex-A520.
- Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest Laptop
chip using the custom Oryon cores.
- Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on
Cortex-A76 and Cortex-A55
In terms of boards, we have
- Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto
G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs.
- Multiple Rockchips mobile gaming systems (Anbernic RG351V, Powkiddy
RK2023, Powkiddy X55) along with the Sonoff iHost Smart Home Hub
and a few Rockchips SBCs
- Some ComXpress boards based on Marvell CN913x, which is the
follow-up to Armada 7xxx/8xxx.
- Six new industrial/embedded boards based on NXP i.MX8 and i.MX9
- Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer.
- Toradex Verdin AM62 Mallow carrier for TI AM62
- Huashan Pi board based on the SophGo CV1812H RISC-V chip
- Two boards based on Allwinner H616/H618
- A number of reference boards for various added SoCs from Qualcomm,
Mediatek, Google, Samsung, NXP and Spreadtrum
As usual, there are cleanups and warning fixes across all platforms as
well as added features for several of them"
* tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (857 commits)
ARM: dts: usr8200: Fix phy registers
arm64: dts: intel: minor whitespace cleanup around '='
arm64: dts: socfpga: agilex: drop redundant status
arm64: dts: socfpga: agilex: add unit address to soc node
arm64: dts: socfpga: agilex: move firmware out of soc node
arm64: dts: socfpga: agilex: move FPGA region out of soc node
arm64: dts: socfpga: agilex: align pin-controller name with bindings
arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties
arm64: dts: socfpga: stratix10_socdk: align NAND chip name with bindings
arm64: dts: socfpga: stratix10: add unit address to soc node
arm64: dts: socfpga: stratix10: move firmware out of soc node
arm64: dts: socfpga: stratix10: move FPGA region out of soc node
arm64: dts: socfpga: stratix10: align pincfg nodes with bindings
arm64: dts: socfpga: stratix10: add clock-names to DWC2 USB
arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
ARM: dts: socfpga: align NAND controller name with bindings
ARM: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
arm64: dts: rockchip: Fix led pinctrl of lubancat 1
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
...
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Not all supported boards actually use the RK3399's built-in GMAC, while the
SoC TRM and the datasheet don't define some standard numbering in this case.
Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the
same alias back to the appropriate board dts(i) files.
This is quite similar to the already performed migration of the mmcX aliases
from the Rockchip SoC dtsi files to the board dts(i) files.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20879826c01fb9ead71c339866846ea794669802.1702366958.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Rockchip SoC TRM, SoC datasheet and board schematics always refer to
the same gpio numbers - even if not all are used for a specific board.
In order to not have to re-define them for every board add the
aliases to SoC dtsi files.
Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/56daeead-1d35-44bb-00c0-614b84a986de@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add dynamic-power-coefficient to the GPU node. That will create Energy
Model for the GPU based on the coefficient and OPP table information.
It will enable mechanism such as DTMP or IPA to work with the GPU DVFS.
In similar way the Energy Model for CPUs in rk3399 is created, so both
are aligned in power scale. The maximum power used from this coefficient
is 1.5W at 600MHz.
Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Expand the reg size for the vdec node to include cache/performance
registers the rkvdec driver writes to. Also add missing clocks to the
related power-domain.
Fixes: cbd7214402ec ("arm64: dts: rockchip: Define the rockchip Video Decoder node on rk3399")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20231105233630.3927502-10-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Pull SoC DT updates from Arnd Bergmann:
"There are a couple new SoCs that are supported for the first time:
- AMD Pensando Elba is a data processing unit based on Cortex-A72 CPU
cores
- Sophgo makes RISC-V based chips, and we now support the CV1800B
chip used in the milkv-duo board and the massive sg2042 chip in the
milkv-pioneer, a 64-core developer workstation.
- Qualcomm Snapdragon 720G (sm7125) is a close relative of Snapdragon
7c and gets added with some Xiaomi phones
- Renesas gains support for the R8A779F4 (R-Car S4-8) automotive SoC
and the RZ/G3S (R9A08G045) embedded SoC.
There are also a bunch of newly supported machines that use already
supported chips. On the 32-bit side, we have:
- USRobotics USR8200 is a NAS/Firewall/router based on the ancient
Intel IXP4xx platform
- A couple of machines based on the NXP i.MX5 and i.MX6 platforms
- One machine each for Allwinner V3s, Aspeed AST2600, Microchip
sama5d29 and ST STM32mp157
The other ones all use arm64 cores on chips from allwinner, amlogic,
freescale, mediatek, qualcomm and rockchip"
* tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (641 commits)
ARM: dts: BCM5301X: Set switch ports for Linksys EA9200
ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000 CPU ports
ARM: dts: BCM5301X: Explicitly disable unused switch CPU ports
ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U
arm64: dts: socionext: add missing cache properties
riscv: dts: thead: convert isa detection to new properties
arm64: dts: Update cache properties for socionext
arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports
arm64: dts: ti: k3-am654-icssg2: add ICSSG2 Ethernet support
arm64: dts: ti: k3-am65-main: Add ICSSG IEP nodes
arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM
arm64: dts: ti: k3-am62p: Add nodes for more IPs
arm64: dts: rockchip: Add Turing RK1 SoM support
dt-bindings: arm: rockchip: Add Turing RK1
dt-bindings: vendor-prefixes: add turing
arm64: dts: rockchip: Add DFI to rk3588s
arm64: dts: rockchip: Add DFI to rk356x
arm64: dts: rockchip: Always enable DFI on rk3399
...
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the DFI unit can provide useful data for measuring DDR utilization
and works without any configuration from the board, so enable it in the
dtsi file directly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20231018061714.3553817-25-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Commit 0efaf8078393 ("arm64: dts: rockchip: add i2s0-2ch-bus pins on
rk3399") introduced a pinctl for i2s0 in two-channel mode. Commit
91419ae0420f ("arm64: dts: rockchip: use BCLK to GPIO switch on rk3399")
modified i2s0 to switch the corresponding pins off when idle.
Although an idle pinctrl node was added for i2s0 in 8-channel mode, a
similar idle pinctrl node for i2s0 in 2-channel mode was not added. Add
it.
Fixes: 91419ae0420f ("arm64: dts: rockchip: use BCLK to GPIO switch on rk3399")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Link: https://lore.kernel.org/r/20231013114737.494410-2-chris.obbard@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add dtsi entry for RK3399 PCIe endpoint core in the device tree.
The status is "disabled" by default, so it will not be loaded unless
explicitly chosen to. The RK3399 PCIe endpoit core should be enabled
with the RK3399 PCIe root complex disabled because the RK3399 PCIe
controller can only work one mode at the time, either in "root complex"
mode or in "endpoint" mode.
Tested-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Link: https://lore.kernel.org/r/20230418074700.1083505-6-rick.wertenbroek@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Pull ARM SoC devicetree updates from Arnd Bergmann:
"The devicetree changes overall are again dominated by the Qualcomm
Snapdragon platform that weighs in at over 300 changesets, but there
are many updates across other platforms as well, notably Mediatek,
NXP, Rockchips, Renesas, TI, Samsung and ST Microelectronics. These
all add new features for existing machines, as well as new machines
and SoCs.
The newly added SoCs are:
- Allwinner T113-s, an Cortex-A7 based variant of the RISC-V based D1
chip.
- StarFive JH7110, a RISC-V SoC based on the Sifive U74 core like its
JH7100 predecessor, but with additional CPU cores and a GPU.
- Apple M2 as used in current Macbook Air/Pro and Mac Mini gets
added, with comparable support as its M1 predecessor.
- Unisoc UMS512 (Tiger T610) is a midrange smartphone SoC
- Qualcomm IPQ5332 and IPQ9574 are Wi-Fi 7 networking SoCs, based on
the Cortex-A53 and Cortex-A73 cores, respectively.
- Qualcomm sa8775p is an automotive SoC derived from the Snapdragon
family.
Including the initial board support for the added SoC platforms, there
are 52 new machines. The largest group are 19 boards industrial
embedded boards based on the NXP i.MX6 (32-bit) and i.MX8 (64-bit)
families.
Others include:
- Two boards based on the Allwinner f1c200s ultra-low-cost chip
- Three 'Banana Pi' variants based on the Amlogic g12b (A311D, S922X)
SoC.
- The Gl.Inet mv1000 router based on Marvell Armada 3720
- A Wifi/LTE Dongle based on Qualcomm msm8916
- Two robotics boards based on Qualcomm QRB chips
- Three Snapdragon based phones made by Xiaomi
- Five developments boards based on various Rockchip SoCs, including
the rk3588s-khadas-edge2 and a few NanoPi models
- The AM625 Beagleplay industrial SBC
Another 14 machines get removed: both boards for the obsolete 'oxnas'
platform, three boards for the Renesas r8a77950 SoC that were only for
pre-production chips, and various chromebook models based on the
Qualcomm Sc7180 'trogdor' design that were never part of products"
* tag 'soc-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (836 commits)
arm64: dts: rockchip: Add support for volume keys to rk3399-pinephone-pro
arm64: dts: rockchip: Add vdd_cpu_big regulators to rk3588-rock-5b
arm64: dts: rockchip: Use generic name for es8316 on Pinebook Pro and Rock 5B
arm64: dts: rockchip: Drop RTC clock-frequency on rk3588-rock-5b
arm64: dts: apple: t8112: Add PWM controller
arm64: dts: apple: t600x: Add PWM controller
arm64: dts: apple: t8103: Add PWM controller
arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x
ARM: dts: nomadik: Replace deprecated spi-gpio properties
ARM: dts: aspeed-g6: Add UDMA node
ARM: dts: aspeed: greatlakes: add mctp device
ARM: dts: aspeed: greatlakes: Add gpio names
ARM: dts: aspeed: p10bmc: Change power supply info
arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMM050 Magnetometer
arm64: dts: mediatek: mt6795-xperia-m5: Add Bosch BMA255 Accelerometer
arm64: dts: mediatek: mt6795: Add tertiary PWM node
arm64: dts: rockchip: add panel to Anbernic RG353 series
dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC
dt-bindings: arm: fsl: Add chargebyte Tarragon
dt-bindings: vendor-prefixes: add chargebyte
...
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Use generic node name for rk3399.dtsi dp node.
With the conversion of rockchip,analogix-dp.yaml a port@1 node
is required, so add a node with label edp_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/f6008819-db9b-0944-3f5b-5522b7cd8a8d@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Use generic node name for rk3399.dtsi dsi node.
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label mipi_out.
Also restyle.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/1e019e9e-a8da-3d57-2770-f6b81bbbf591@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230207234750.202154-1-robh@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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When the input enable pinconf was introduced, a default drive-strength
value of 2 was set for the pull up/down configs. However, this parameter
is unneeded when configuring the pin as input, and having a single
hardcoded value here is actually harmful: GPIOs on the RK3399 have
various same drive-strength capabilities depending on the bank and port
they belong to.
As an example, trying to configure the GPIO4_PD3 pin as an input with
pull-up enabled fails with the following output:
[ 10.706542] rockchip-pinctrl pinctrl: unsupported driver strength 2
[ 10.713661] rockchip-pinctrl pinctrl: pin_config_set op failed for pin 155
(acceptable drive-strength values for this pin being 3, 6, 9 and 12)
Let's drop the drive-strength property from all input pinconfs in order
to solve this issue.
Fixes: ec48c3e82ca3 ("arm64: dts: rockchip: add an input enable pinconf to rk3399")
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Reviewed-by: Caleb Connolly <kc@postmarketos.org>
Link: https://lore.kernel.org/r/20221215101947.254896-1-arnaud.ferraris@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The reset names does not follow the binding, use the correct ones.
Fixes: 8c701fa6e38c ("arm64: dts: rockchip: rk3399: add crypto node")
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/20221212124423.1239748-1-clabbe@baylibre.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The rk3399 has a crypto IP handled by the rk3288 crypto driver so adds a
node for it.
Tested-by Diederik de Haas <didi.debian@cknow.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Link: https://lore.kernel.org/r/20220927075511.3147847-29-clabbe@baylibre.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Define the memory region on RK3399 VOPs containing the gamma LUT at
base+0x2000.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Tested-by: Linus Heckemann <git@sphalerite.org>
Link: https://lore.kernel.org/r/20211019215843.42718-4-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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We discoverd that the state of BCLK on, LRCLK off and SD_MODE on
may cause the speaker melting issue. Removing LRCLK while BCLK
is present can cause unexpected output behavior including a large
DC output voltage as described in the Max98357a datasheet.
In order to:
1. prevent BCLK from turning on by other component.
2. keep BCLK and LRCLK being present at the same time
This patch adjusts the device tree to allow BCLK to switch
to GPIO func before LRCLK output, and switch back during
LRCLK is output.
Signed-off-by: Judy Hsiao <judyhsiao@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220708080726.4170711-1-judyhsiao@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Before commit 9998943f6dfc ("media: rkvdec: Stop overclocking the
decoder"), the rkvdec driver was forcing the VDU clock rate. After that
commit, we rely on the default clock rate. That rate works OK on many
boards, with the default PLL settings (CPLL is 800MHz, VDU dividers
leave it at 400MHz); but some boards change PLL settings.
Assign the expected default clock rate explicitly, so that the rate is
consistent, regardless of PLL configuration.
This was particularly broken on RK3399 Gru Scarlet systems, where the
rk3399-gru-scarlet.dtsi assigns PLL_CPLL to 1.6 GHz, and so the VDU
clock ends up at 800 MHz (twice the expected rate), and causes video
artifacts and other issues.
Note: I assign the clock rate in the clock controller instead of the
vdec node, because there are multiple nodes that use this clock, and per
the clock.yaml specification:
Configuring a clock's parent and rate through the device node that
consumes the clock can be done only for clocks that have a single
user. Specifying conflicting parent or rate configuration in multiple
consumer nodes for a shared clock is forbidden.
Configuration of common clocks, which affect multiple consumer devices
can be similarly specified in the clock provider node.
Fixes: 9998943f6dfc ("media: rkvdec: Stop overclocking the decoder")
Cc: <stable@vger.kernel.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Link: https://lore.kernel.org/r/20220607141535.1.Idafe043ffc94756a69426ec68872db0645c5d6e2@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The reference clock for the HDMI controller has been renamed to 'ref',
the previous 'vpll' name is only left for compatibility in the driver.
Rename the clock to the new name.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220422072841.2206452-7-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add a pinconf to configure pins as input-enable.
Signed-off-by: Caleb Connolly <kc@postmarketos.org>
Link: https://lore.kernel.org/r/20220328005005.72492-5-kc@postmarketos.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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These are required to support DDR DVFS on RK3399 platforms.
Change since Daniel's posting: reordered by unit address, per existing
style
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220308110825.v4.11.Ie97993621975c5463d7928a8646f3737c9f2921d@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add clocks property to rk3399 cru nodes to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329150742.22093-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The node names should be generic, so fix this for the rk3399 pmucru node
and rename it to "clock-controller".
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329150742.22093-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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drive-impedance-ohm is introduced for emmc phy instead of pcie phy.
Fixes: fb8b7460c995 ("arm64: dts: rockchip: Define drive-impedance-ohm for RK3399's emmc-phy.")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://lore.kernel.org/r/1647336426-154797-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The binding specifies the clock order to "cec", "grf", "vpll". Reorder
the clocks accordingly.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The thermal framework accepts now the cpu idle cooling device as an
alternative when the cpufreq cooling device fails.
Add the node in the DT so the cooling devices will be present and the
platforms can extend the thermal zone definition to add them.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20211001161728.1729664-1-daniel.lezcano@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Per Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt.
This IP block can be used for sampling the PC of any given CPU, which is
useful in certain panic scenarios where you can't get the CPU to stop
cleanly (e.g., hard lockup).
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20210908111337.v2.3.Ibc87b4785709543c998cc852c1edaeb7a08edf5c@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Commit 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes")
intended to remove the interrupt-names property for mmu nodes, but it
also removed it for the vpu node in rk3399.dtsi. That makes the driver
fail probing currently.
Fix this by re-adding the property for this node.
Fixes: 53a05c8f6e8e ("arm64: dts: rockchip: remove interrupt-names from iommu nodes")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210822115755.3171937-1-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This enables variant a of the clkout signal for camera applications
and also the cifclkin pinctrl setting.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-6-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The dsi controller includes access to the dphy which might be used
not only for dsi output but also for csi input on dsi1, so add the
necessary #phy-cells to allow it to be used as phy.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The iommu driver gets the interrupts by platform_get_irq(),
so remove interrupt-names property from iommu nodes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210711143430.14347-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Pull ARM devicetree updates from Olof Johansson:
"Like always, the DT branch is sizable. There are numerous additions
and fixes to existing platforms, but also a handful of new ones
introduced. Less than some other releases, but there's been
significant work on cleanups, refactorings and device enabling on
existing platforms.
A non-exhaustive list of new material:
- Refactoring of BCM2711 dtsi structure to add support for the
Raspberry Pi 400
- Rockchip: RK3568 SoC and EVB, video codecs for
rk3036/3066/3188/322x
- Qualcomm: SA8155p Automotive platform (SM8150 derivative),
SM8150/8250 enhancements and support for Sony Xperia 1/1II and
5/5II
- TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc
definitions
- TI OMAP: Various cleanups
- Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194
- Qualcomm: lots of additions for peripherals across several SoCs,
and new support for Microsoft Surface Duo (SM8150-based), Huawei
Ascend G7.
- i.MX: Numerous additions of features across SoCs and boards.
- Allwinner: More device bindings for V3s, Forlinx OKA40i-C and
NanoPi R1S H5 boards
- MediaTek: More device bindings for mt8167, new Chromebook system
variants for mt8183
- Renesas: RZ/G2L SoC and EVK added
- Amlogic: BananaPi BPI-M5 board added"
* tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits)
arm64: dts: rockchip: add basic dts for RK3568 EVB
arm64: dts: rockchip: add core dtsi for RK3568 SoC
arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs
ARM: dts: rockchip: add vpu and vdec node for RK322x
ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188
ARM: dts: rockchip: add vpu node for RK3036
arm64: dts: ipq8074: Add QUP6 I2C node
arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc
arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc
arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc
arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly
arm64: dts: rockchip: Sort rk3399 firefly pinmux entries
arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly
arm64: dts: rockchip: add SPDIF node for rk3399-firefly
arm64: dts: rockchip: Add Rotation Property for OGA Panel
arm64: dts: qcom: sc7180: bus votes for eMMC and SD card
arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen
arm64: dts: qcom: sm8250-edo: Enable GPI DMA
arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI
arm64: dts: qcom: sm8250-edo: Enable PCIe
...
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memory
The PCIe host bridge on RK3399 advertises a single 64-bit memory
address range even though it lies entirely below 4GB.
Previously the OF PCI range parser treated 64-bit ranges more
leniently (i.e., as 32-bit), but since commit 9d57e61bf723 ("of/pci:
Add IORESOURCE_MEM_64 to resource flags for 64-bit memory addresses")
the code takes a stricter view and treats the ranges as advertised in
the device tree (i.e, as 64-bit).
The change in behaviour causes failure when allocating bus addresses
to devices connected behind a PCI-to-PCI bridge that require
non-prefetchable memory ranges. The allocation failure was observed
for certain Samsung NVMe drives connected to RockPro64 boards.
Update the host bridge window attributes to treat it as 32-bit address
memory. This fixes the allocation failure observed since commit
9d57e61bf723.
Reported-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@arm.com
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Punit Agrawal <punitagrawal@gmail.com>
Tested-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://lore.kernel.org/r/20210607112856.3499682-5-punitagrawal@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$"
in phy-provider.yaml has required "#phy-cells" for phy nodes.
The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes.
Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent
notifications.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210601164800.7670-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-9-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-8-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below aimed at powerpc generates
notifications in the Rockchip arm64 tree.
Fix pinctrl "sleep" nodename by renaming it to "suspend"
for rk3399.dtsi
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210126110221.10815-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This adds support for the PWM controller found on Toshiba Visconti
SoCs and converts a couple of drivers to the atomic API.
There's also a bunch of cleanups and minor fixes across the board"
* tag 'pwm/for-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (35 commits)
pwm: Reword docs about pwm_apply_state()
pwm: atmel: Improve duty cycle calculation in .apply()
pwm: atmel: Fix duty cycle calculation in .get_state()
pwm: visconti: Add Toshiba Visconti SoC PWM support
dt-bindings: pwm: Add bindings for Toshiba Visconti PWM Controller
arm64: dts: rockchip: Remove clock-names from PWM nodes
ARM: dts: rockchip: Remove clock-names from PWM nodes
dt-bindings: pwm: rockchip: Add more compatible strings
dt-bindings: pwm: Convert pwm-rockchip.txt to YAML
pwm: mediatek: Remove unused function
pwm: pca9685: Improve runtime PM behavior
pwm: pca9685: Support hardware readout
pwm: pca9685: Switch to atomic API
pwm: lpss: Don't modify HW state in .remove callback
pwm: sti: Free resources only after pwmchip_remove()
pwm: sti: Don't modify HW state in .remove callback
pwm: lpc3200: Don't modify HW state in .remove callback
pwm: lpc18xx-sct: Free resources only after pwmchip_remove()
pwm: bcm-kona: Don't modify HW state in .remove callback
pwm: bcm2835: Free resources only after pwmchip_remove()
...
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A test with the command below gives this error:
/arch/arm64/boot/dts/rockchip/rk3368-evb-act8846.dt.yaml:
pwm@ff680030: clock-names: ['pwm'] is too short
Devices with only one PWM clock use it to both to derive the functional
clock for the device and as the bus clock. The driver does not need
"clock-names" to get a handle, so remove them all.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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As suggested by Arnd Bergmann, the newly added mmc aliases
should be board specific, so move them from the general dtsi
to the individual boards.
Suggested-by: Arnd Bergmann <arnd@kernel.org>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20210324122235.1059292-7-heiko@sntech.de
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The watchdog compatible strings are suppose to be SoC orientated.
In the more recently added Rockchip rk3399.dtsi file only
the fallback string "snps,dw-wdt" is used, so add the new
compatible string:
"rockchip,rk3399-wdt", "snps,dw-wdt"
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-7-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC devicetree updates from Arnd Bergmann:
"After the last release contained a surprising amount of new 32-bit
machines, this time two thirds of the code changes are for 64-bit.
The usual updates to existing files include:
- Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA,
nomadik, stm32, Allwinner, TI Keystone
- Support for additional devices on existing machines on Renesas,
SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom,
ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic,
Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba
- Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung,
stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm,
i.MX, Rockchip, ASpeed, Zynq
Only three new SoCs this time, but a number of boards across:
Renesas:
- Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based)
Intel SoCFPGA:
- eASIC N5X board (N5X)
ST-Ericsson Ux500:
- Samsung GT-I9070 (Janice) phone (u8500)
TI OMAP:
- MYIR Tech Limited development board (AM335X)
Allwinner/sunxi:
- SL631 Action Camera (V3)
- PineTab Early Adopter tablet (A64)
Broadcom:
- BCM4906 networking chip
- Netgear R8000P router (BCM4906)
AMLogic:
- Hardkernel ODROID-HC4 development board (SM1)
- Beelink GS-King-X TV Box (S922X)
Qualcomm:
- Snapdragon 888 / SM8350 high-end phone SoC
- Qualcomm SDX55 5G modem as standalone SoC
- Snapdragon MTP reference board (SM8350)
- Snapdragon MTP reference board (SDX55)
- Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094)
- Alcatel Idol 3 phone (MSM8916)
- ASUS Zenfone 2 Laser phone (MSM8916)
- BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916)
- OnePlus6 phone (SDM845)
- OnePlus6T phone (SDM845)
- Alfa Network AP120C-AC access point (IPQ4018)
NXP i.MX6 (32-bit):
- Plymovent BAS base system controller for filter systems (imx6dl)
- Protonic MVT industrial touchscreen terminals (imx6dl)
- Protonic PRTI6G reference board (imx6ul)
- Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp)
NXP i.MX8 (64-bit)
- Beacon i.MX8M Nano development kit (imx8mn)
- Boundary Devices i.MX8MM Nitrogen SBC (imx8mm)
- Gateworks Venice i.MX 8M Mini Development Kits (imx8mm)
- phyBOARD-Pollux-i.MX8MP (imx8mp)
- Purism Librem5 Evergreen phone (imx8mp)
- Kontron SMARC-sAL28 system-on-module(imx8mp)
Rockchip:
- NanoPi M4B Single-board computer (RK3399)
- Radxa Rock Pi E router SBC (RK3328)
ASpeed:
- Ampere Mt. Jade, a BMC for an x86 server (AST2500)
- IBM Everest, a BMC for a Power10 server (AST2600)
- Supermicro x11spi, a BMC for an ARM server (AST2500)
Zynq:
- Ebang EBAZ4205, FPGA board (Zynq-7000)
- ZynqMP zcu104 revC reference platform (ZynqMP)"
* tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits)
ARM: dts: aspeed: align GPIO hog names with dtschema
ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell
dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml
arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci
ARM: dts: aspeed: mowgli: Add i2c rtc device
ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
dt-bindings: arm: xilinx: Add missing Zturn boards
ARM: dts: ebaz4205: add pinctrl entries for switches
ARM: dts: add Ebang EBAZ4205 device tree
dt-bindings: arm: add Ebang EBAZ4205 board
dt-bindings: add ebang vendor prefix
ARM: dts: aspeed: Add Everest BMC machine
ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver
ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names
ARM: dts: aspeed: Add Supermicro x11spi BMC machine
ARM: dts: aspeed: g220a: Fix some gpio
ARM: dts: aspeed: g220a: Enable ipmb
ARM: dts: aspeed: rainier: Add eMMC clock phase compensation
ARM: dts: aspeed: Add LCLK to lpc-snoop
...
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The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").
As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: pcie@f8000000:
ranges: 'oneOf' conditional failed, one must be fixed:
The pcie ranges property is an array. The dt-check expects that
each array item is wrapped with angle brackets, so fix that ranges
property format for the rk3399 pcie node.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/
schemas/pci/pci-bus.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210122171243.16138-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: video-codec@ff660000:
'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+'
The rkvdec driver gets it irq with help of the platform_get_irq()
function, so remove the interrupt-names property from the rk3399
vdec node.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
media/rockchip,vdec.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210117181653.24886-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml:
thermal-zones: 'cpu', 'gpu' do not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'
Rename Rockchip rk3399 thermal subnodes so that it ends
with "-thermal"
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
thermal/thermal-zones.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210117150953.16475-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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It recently became apparent that the lack of a 'device_type = "pci"'
in the PCIe root complex node for rk3399 is a violation of the PCI
binding, as documented in IEEE Std 1275-1994. Changes to the kernel's
parsing of the DT made such violation fatal, as drivers cannot
probe the controller anymore.
Add the missing property makes the PCIe node compliant. While we
are at it, drop the pointless linux,pci-domain property, which only
makes sense when there are multiple host bridges.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200815125112.462652-3-maz@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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