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2024-02-20Merge tag 'v6.8-rockchip-dtsfixes1' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes Some fixes to make devicetrees conform to bindings better (pwm irqs), dt styling fixes (unneeded jaguar status, whitespaces, Cool Pi regulator naming) and functionality fixes (px30 spi chipselect number, allowing rk3588-evb1 to turn off, pcie lane numbers on CoolPi, wrong gpio-names on Indidroid Nova and some CoolPi sdmmc aliases to match what uboot uses). * tag 'v6.8-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: Correct Indiedroid Nova GPIO Names arm64: dts: rockchip: Drop interrupts property from rk3328 pwm-rockchip node arm64: dts: rockchip: set num-cs property for spi on px30 arm64: dts: rockchip: minor rk3588 whitespace cleanup arm64: dts: rockchip: drop unneeded status from rk3588-jaguar gpio-leds ARM: dts: rockchip: Drop interrupts property from pwm-rockchip nodes arm64: dts: rockchip: Fix the num-lanes of pcie3x4 on Cool Pi CM5 EVB arm64: dts: rockchip: rename vcc5v0_usb30_host regulator for Cool Pi CM5 EVB arm64: dts: rockchip: aliase sdmmc as mmc1 for Cool Pi CM5 EVB arm64: dts: rockchip: aliase sdmmc as mmc1 for Cool Pi 4B arm64: dts: rockchip: mark system power controller on rk3588-evb1 Link: https://lore.kernel.org/r/2450634.jE0xQCEvom@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-13arm64: dts: rockchip: Correct Indiedroid Nova GPIO NamesChris Morgan
Correct the names given to a few of the GPIO pins. The original names were unknowingly based on the header from a pre-production board. The production board has a slightly different pin assignment for the 40-pin GPIO header. Fixes: 3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board") Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20240125201943.90476-2-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: Drop interrupts property from rk3328 pwm-rockchip nodeJohan Jonker
The binding doesn't define interrupts and adding such a definition was refused because it's unclear how they should ever be used and the relevant registers are outside the PWM range. So drop them fixing several dtbs_check warnings. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/5551846d-62cd-4b72-94f4-07541e726c37@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: set num-cs property for spi on px30Heiko Stuebner
The px30 has two spi controllers with two chip-selects each. The num-cs property is specified as the total number of chip selects a controllers has and is used since 2020 to find uses of chipselects outside that range in the Rockchip spi driver. Without the property set, the default is 1, so spi devices using the second chipselect will not be created. Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240119101656.965744-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-13arm64: dts: rockchip: minor rk3588 whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space before '{' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240208105129.128561-1-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: drop unneeded status from rk3588-jaguar gpio-ledsHeiko Stuebner
The default status is okay, so it is definitly not necessary to set it on a newly added node. Fixes: d1b8b36a2cc5 ("arm64: dts: rockchip: add Theobroma Jaguar SBC") Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobrona-systems.com> Link: https://lore.kernel.org/r/20240129114851.2019861-1-heiko@sntech.de
2024-02-04arm64: dts: rockchip: Fix the num-lanes of pcie3x4 on Cool Pi CM5 EVBAndy Yan
The 4 lane pcie30 phy is shared by pcie3x4 and pcie3x2, so the num-lanes of pcie3x4 should be 2. Fixes: 791c154c3982 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB") Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20240201121106.1471301-4-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: rename vcc5v0_usb30_host regulator for Cool Pi CM5 EVBAndy Yan
According to the schematic, USB20 HOST0 and HOST1 each have their own independent power supply, but these two regulators controlled by a same GPIO, so give it a more appropriate name. Fixes: 791c154c3982 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB") Signed-off-by: Andy Yan <andyshrk@163.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240201121106.1471301-3-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: aliase sdmmc as mmc1 for Cool Pi CM5 EVBAndy Yan
Follow others rk3588 based boards, and u-boot only use mmc0/1 as mmc boot targets, so aliase sdmmc as mmc1. Fixes: 791c154c3982 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB") Signed-off-by: Andy Yan <andyshrk@163.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240201121106.1471301-2-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04arm64: dts: rockchip: aliase sdmmc as mmc1 for Cool Pi 4BAndy Yan
Follow others rk3588 based boards, and u-boot only use mmc0/1 as mmc boot targets, so aliase sdmmc as mmc1. Fixes: 3f5d336d64d6 ("arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B") Signed-off-by: Andy Yan <andyshrk@163.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20240201121106.1471301-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: rockchip: mark system power controller on rk3588-evb1Sebastian Reichel
Mark the primary PMIC as system-power-controller, so that the system properly shuts down on poweroff. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20240117191555.86138-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-01-25arm64: dts: Fix TPM schema violationsLukas Wunner
Since commit 26c9d152ebf3 ("dt-bindings: tpm: Consolidate TCG TIS bindings"), several issues are reported by "make dtbs_check" for arm64 devicetrees: The compatible property needs to contain the chip's name in addition to the generic "tcg,tpm_tis-spi" and the nodename needs to be "tpm@0" rather than "cr50@0": tpm@1: compatible: ['tcg,tpm_tis-spi'] is too short from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml# cr50@0: $nodename:0: 'cr50@0' does not match '^tpm(@[0-9a-f]+)?$' from schema $id: http://devicetree.org/schemas/tpm/google,cr50.yaml# Fix these schema violations. phyGATE-Tauri uses an Infineon SLB9670: https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/ Gateworks Venice uses an Atmel ATTPM20P: https://trac.gateworks.com/wiki/tpm Signed-off-by: Lukas Wunner <lukas@wunner.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-01-11Merge tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull SoC DT updates from Arnd Bergmann: "There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both the Rockchips rv1109 and Sopgho CV1812H are just minor variations of already supported chips. The other six new SoCs are all part of existing arm64 families, but are somewhat more interesting: - Samsung ExynosAutov920 is an automotive chip, and the first one we support based on the Cortex-A78AE core with lockstep mode. - Google gs101 (Tensor G1) is the chip used in a number of Pixel phones, and is grouped with Samsung Exynos here since it is based on the same SoC design, sharing most of its IP blocks with that series. - MediaTek MT8188 is a new chip used for mid-range tablets and Chromebooks, using two Cortex-A78 cores where the older MT8195 had four of them. - Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range phone SoC and the first supported chip based on Cortex-X4, Cortex-A720 and Cortex-A520. - Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest Laptop chip using the custom Oryon cores. - Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on Cortex-A76 and Cortex-A55 In terms of boards, we have - Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs. - Multiple Rockchips mobile gaming systems (Anbernic RG351V, Powkiddy RK2023, Powkiddy X55) along with the Sonoff iHost Smart Home Hub and a few Rockchips SBCs - Some ComXpress boards based on Marvell CN913x, which is the follow-up to Armada 7xxx/8xxx. - Six new industrial/embedded boards based on NXP i.MX8 and i.MX9 - Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer. - Toradex Verdin AM62 Mallow carrier for TI AM62 - Huashan Pi board based on the SophGo CV1812H RISC-V chip - Two boards based on Allwinner H616/H618 - A number of reference boards for various added SoCs from Qualcomm, Mediatek, Google, Samsung, NXP and Spreadtrum As usual, there are cleanups and warning fixes across all platforms as well as added features for several of them" * tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (857 commits) ARM: dts: usr8200: Fix phy registers arm64: dts: intel: minor whitespace cleanup around '=' arm64: dts: socfpga: agilex: drop redundant status arm64: dts: socfpga: agilex: add unit address to soc node arm64: dts: socfpga: agilex: move firmware out of soc node arm64: dts: socfpga: agilex: move FPGA region out of soc node arm64: dts: socfpga: agilex: align pin-controller name with bindings arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties arm64: dts: socfpga: stratix10_socdk: align NAND chip name with bindings arm64: dts: socfpga: stratix10: add unit address to soc node arm64: dts: socfpga: stratix10: move firmware out of soc node arm64: dts: socfpga: stratix10: move FPGA region out of soc node arm64: dts: socfpga: stratix10: align pincfg nodes with bindings arm64: dts: socfpga: stratix10: add clock-names to DWC2 USB arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size ARM: dts: socfpga: align NAND controller name with bindings ARM: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size arm64: dts: rockchip: Fix led pinctrl of lubancat 1 arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6 arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b ...
2023-12-29arm64: dts: rockchip: Fix led pinctrl of lubancat 1Andy Yan
According to the schematics, the gpio control sys_led is GPIO0_C5. Fixes: 8d94da58de53 ("arm64: dts: rockchip: Add EmbedFire LubanCat 1") Reported-by: Zhang Ning <zhangn1985@outlook.com> Closes: https://lore.kernel.org/linux-rockchip/OS0P286MB06412D049D8BF7B063D41350CD95A@OS0P286MB0641.JPNP286.PROD.OUTLOOK.COM/T/#u Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20231225005055.3102743-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6John Clark
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1. Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20231225223226.17690-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5bJohn Clark
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1. Signed-off-by: John Clark <inindev@gmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231225222859.17153-2-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29arm64: dts: rockchip: support poweroff on the rock-5bJohn Clark
Allow the rock-5b to poweroff its pmic. When issuing a "shutdown -h now" on the rock-5b it reboots instead. Defining 'system-power-controller' allows the rk806 to power down. Commit c699fbfdfd54 ("arm64: dts: rockchip: Support poweroff on NanoPC-T6") similarly resolves this issue for the nanopc-t6. Signed-off-by: John Clark <inindev@gmail.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231225222859.17153-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29arm64: dts: rockchip: Support poweroff on Orange Pi 5Jimmy Hon
The RK806 on the Orange Pi 5 can be used to power on/off the whole board. Mark it as the system power controller. Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20231227203211.1047-1-honyuenkwun@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29arm64: dts: rockchip: nanopc-t6 sdmmc beautificationJohn Clark
drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi order no-sdio & no-mmc properties while we are here Signed-off-by: John Clark <inindev@gmail.com> Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: Fix rk3588 USB power-domain clocksSam Edwards
The QoS blocks saved/restored when toggling the PD_USB power domain are clocked by ACLK_USB. Attempting to access these memory regions without that clock running will result in an indefinite CPU stall. The PD_USB node wasn't specifying this clock dependency, resulting in hangs when trying to toggle the power domain (either on or off), unless we get "lucky" and have ACLK_USB running for another reason at the time. This "luck" can result from the bootloader leaving USB powered/clocked, and if no built-in driver wants USB, Linux will disable the unused PD+CLK on boot when {pd,clk}_ignore_unused aren't given. This can also be unlucky because the two cleanup tasks run in parallel and race: if the CLK is disabled first, the PD deactivation stalls the boot. In any case, the PD cannot then be reenabled (if e.g. the driver loads later) once the clock has been stopped. Fix this by specifying a dependency on ACLK_USB, instead of only ACLK_USB_ROOT. The child-parent relationship means the former implies the latter anyway. Fixes: c9211fa2602b8 ("arm64: dts: rockchip: Add base DT for rk3588 SoC") Cc: stable@vger.kernel.org Signed-off-by: Sam Edwards <CFSworks@gmail.com> Link: https://lore.kernel.org/r/20231216021019.1543811-1-CFSworks@gmail.com [changed to only include the missing clock, not dropping the root-clocks] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: configure eth pad driver strength for orangepi r1 plus ltsTianling Shen
The default strength is not enough to provide stable connection under 3.3v LDO voltage. Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS") Cc: stable@vger.kernel.org # 6.6+ Signed-off-by: Tianling Shen <cnsztl@gmail.com> Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: Support poweroff on NanoPC-T6Hugh Cole-Baker
The RK806 on the NanoPC-T6 can be used to power on/off the whole board. Mark it as the system power controller. Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names cleanupTrevor Woerner
Perform the following cleanups on a previous patch: - indent lines after "gpio-line-names" - fix D0-D8 -> D0-D7 - sort phandle references Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s") Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVBAndy Yan
Cool Pi CM5 EVB works as a mother board connect with CM5. CM5 Specification: - Rockchip RK3588 - LPDDR4 2/4/8/16 GB - TF scard slot - eMMC 8/32/64/128 GB module - Gigabit ethernet x 1 with PHY YT8531 - Gigabit ethernet x 1 drived by PCIE with YT6801S CM5 EVB Specification: - HDMI Type A out x 2 - HDMI Type D in x 1 - USB 2.0 Host x 2 - USB 3.0 OTG x 1 - USB 3.0 Host x 1 - PCIE M.2 E Key for Wireless connection - PCIE M.2 M Key for NVME connection - 40 pin header Signed-off-by: Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20231212124407.1897604-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4BAndy Yan
CoolPi 4B is a rk3588s based SBC. Specification: - Rockchip RK3588S - LPDDR4 2/4/8/16 GB - TF scard slot - eMMC 8/32/64/128 GB module - Gigabit ethernet drived by PCIE with RTL8111HS - HDMI Type D out - Mini DP out - USB 2.0 Host x 2 - USB 3.0 OTG x 1 - USB 3.0 Host x 1 - WIFI/BT module AIC8800 - 40 pin header Signed-off-by: Andy Yan <andyshrk@163.com> arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B Link: https://lore.kernel.org/r/20231212124253.1897438-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24arm64: dts: rockchip: add gpio-line-names to rk3328-rock-pi-eTrevor Woerner
Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as 'gpioinfo'. Signed-off-by: Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20231213160556.14424-1-twoerner@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15arm64: dts: rockchip: make use gpio-keys for buttons on puma-haikouVahe Grigoryan
Haikou is an evaluation and development platform for System on Modules (SOMs). Haikou devkit exposes multiple buttons so let's register them as such so that the input subsystem can generate events when pressed or switched. Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com> Link: https://lore.kernel.org/r/20231214122801.3144180-3-vahe.grigoryan@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15arm64: dts: rockchip: expose BIOS Disable feedback pin on rk3399-pumaVahe Grigoryan
The Puma SoM allows to select in hardware directly which storage medium to try for loading the bootloader, either SPI-NOR followed by eMMC followed by SD card, or SD card only. This signal is exposed on the Q7 connector and allows carrierboards to control it however they want. This feedback pin allows to know in which state the SoM currently is and provided the current state isn't modified until next reboot, know from which storage medium the bootloader could be loaded from next time. Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com> Link: https://lore.kernel.org/r/20231214122801.3144180-2-vahe.grigoryan@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15arm64: dts: rockchip: fix misleading comment in rk3399-puma-haikou.dtsVahe Grigoryan
Haikou is an evaluation and development platform for System on Modules (SOMs). The GPIO0_B1 is routed to the Wake button instead of BIOS_DISABLE, update the comment to reflect that. Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com> Link: https://lore.kernel.org/r/20231214122801.3144180-1-vahe.grigoryan@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15arm64: dts: rockchip: Add vop on rk3588Andy Yan
Add vop dt node for rk3588. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Link: https://lore.kernel.org/r/20231211120004.1785616-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add Anbernic RG351VChris Morgan
Add support for the Anbernic RG351V, which is a handheld gaming console from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single analog joystick with several face buttons, two USB C ports, and internal WiFi over USB. All hardware has been tested as working except for the battery, which will require further modification to the mainline rk817 battery driver before it can be used (the device was built without a shunt resistor, and as such the battery cannot measure current; only voltage). Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231120230131.57705-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Split RG351M from Odroid Go AdvanceChris Morgan
Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid Go Advance, has no ADC joysticks, no GPIO buttons (except for volume on the RG351V), a PWM vibrator that interferes with an Odroid regulator, and different LEDs. Split the RG351M into a DTSI file that can then be imported into the DTS files for the RG351M and a new RG351V. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231120230131.57705-3-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3588(S) boardsDragan Simic
Add ethernet0 alias to the board dts files for a few supported RK3588 and RK3588S boards that had it missing. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/9af2026bf8a5538aff627381289cb06f2fab4263.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3566 boardsDragan Simic
Add ethernet0 alias to the board dts files for a few supported RK3566 boards that had it missing. Also, remove the ethernet0 alias from one RK3566 SoM dtsi file, which doesn't enable the GMAC, and add the ethernet0 alias back to the dependent board dts files, which actually enable the GMAC. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/d2a272e0ae0fff0adfab8bb0238243b11d348799.1702368023.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for PX30Dragan Simic
Not all supported boards actually use the PX30's built-in (G)MAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0d9da8959b4f567622676c34b5feb74c49489554.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernetX aliases from the SoC dtsi for RK3328Dragan Simic
Not all supported boards actually use the RK3328's built-in GMACs, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 and ethernet1 aliases from the RK3328 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. These changes also touch one RK3318-based board dts, because it actually depends on the RK3328 SoC dtsi and enables one of the GMACs. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0c14f2e354d32f5d45c718ce16643553ca72f6a5.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3368Dragan Simic
Not all supported boards actually use the RK3368's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3368 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/77115184d633190c917d868f883070e100d93dbc.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3399Dragan Simic
Not all supported boards actually use the RK3399's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20879826c01fb9ead71c339866846ea794669802.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: make dts use gpio-fan matrix instead of arrayDavid Heidelberg
No functional changes. Adjust to comply with dt-schema requirements and make possible to validate values. Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20231209171653.85468-2-david@ixit.cz Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add gpio alias for gpio dt nodesJohan Jonker
Rockchip SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board add the aliases to SoC dtsi files. Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/56daeead-1d35-44bb-00c0-614b84a986de@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: Add dynamic-power-coefficient to rk3399 GPULukasz Luba
Add dynamic-power-coefficient to the GPU node. That will create Energy Model for the GPU based on the coefficient and OPP table information. It will enable mechanism such as DTMP or IPA to work with the GPU DVFS. In similar way the Energy Model for CPUs in rk3399 is created, so both are aligned in power scale. The maximum power used from this coefficient is 1.5W at 600MHz. Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add rk3588 spi aliases to soc dtsiHeiko Stuebner
The spi controllers on rk3588 are named spi0 - spi4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace spi access is a thing afterall. To prevent each board repeating their list of spi aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-5-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add rk3588 gpio aliases to soc dtsiHeiko Stuebner
The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace gpio access is a thing afterall. To prevent each board repeating their list of gpio aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-4-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add rk3588 i2c aliases to soc dtsiHeiko Stuebner
The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace i2c access is a thing afterall. To prevent each board repeating their list of i2c aliases, define them in the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-3-heiko@sntech.de
2023-12-12arm64: dts: rockchip: move rk3588 serial aliases to soc dtsiHeiko Stuebner
The serial ports on rk3588 are named uart0 - uart9. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. To prevent each board repeating their list of serial aliases, move them to the soc dtsi, as all previous Rockchip soc do already. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de
2023-12-12arm64: dts: rockchip: add Theobroma Jaguar SBCHeiko Stuebner
Add a board dts for the Jaguar SBC from Theobroma-Systems JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR). It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Link: https://lore.kernel.org/r/20231201191103.343097-3-heiko@sntech.de
2023-12-12arm64: dts: rockchip: Add Powkiddy X55Chris Morgan
Add support for the Powkiddy X55. The Powkiddy X55 is a handheld gaming device with a 720p 5.5 inch screen powered by the Rockchip RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC joysticks powered by 4 dedicated ADC channels, and several GPIO face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), and an 8GB internal eMMC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231204185719.569021-11-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5aSebastian Reichel
Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add USB3 host to rock-5bSebastian Reichel
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12arm64: dts: rockchip: add missing tx/rx-fifo-depth for rk3328 gmacshironeko
Without fifo depths attempting to change the MTU will fail. These values are from the RK3328 Technical Reference Manual, gmac2io interface tested with Rock64. Signed-off-by: shironeko <shironeko@tesaguri.club> Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit (git 2.34.1) at 2024-05-09 22:59:58 +0000