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2019-11-03arm64: dts: qcom: db845c: Enable LVS 1 and 2Bjorn Andersson
vreg_lvs1a_1p8 and vreg_lvs2a_1p8 are both feeding pins in the low speed connectors and should as such alway be on, so enable them. Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-11-03Merge tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu into arm/dtOlof Johansson
mvebu dt64 for 5.5 (part 1) - Add new Marvell CN9130 SoC support (CN9130 is made of one AP807 and one internal CP115, similar to the Armada 7K/8K using AP806 and CP110). - Reorganize EspressoBin device tree to add new variant of the boards (Armada 3270 based) - Add firmware node for turris Mox (Armada 3720 based) * tag 'mvebu-dt64-5.5-1' of git://git.infradead.org/linux-mvebu: (23 commits) arm64: dts: armada-3720-turris-mox: add firmware node arm64: dts: marvell: add ESPRESSObin variants arm64: dts: marvell: Add support for Marvell CN9132-DB arm64: dts: marvell: Add support for Marvell CN9131-DB arm64: dts: marvell: Add support for Marvell CN9130-DB arm64: dts: marvell: Add support for Marvell CN9130 SoC support arm64: dts: marvell: Add support for CP115 arm64: dts: marvell: Externalize PCIe macros from CP11x file arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file arm64: dts: marvell: Prepare the introduction of CP115 arm64: dts: marvell: Fix CP110 NAND controller node multi-line comment alignment arm64: dts: marvell: Add AP807-quad cache description arm64: dts: marvell: Add AP806-quad cache description arm64: dts: marvell: Add AP806-dual cache description arm64: dts: marvell: Add support for AP807/AP807-quad dt-bindings: marvell: Declare the CN913x SoC compatibles dt-bindings: marvell: Convert the SoC compatibles description to YAML arm64: dts: marvell: Move clocks to AP806 specific file arm64: dts: marvell: Prepare the introduction of AP807 based SoCs MAINTAINERS: Add new Marvell CN9130-based files to track ... Link: https://lore.kernel.org/r/87zhhc3bo6.fsf@FE-laptop Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03Merge tag 'tegra-for-5.5-arm64-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.5-rc1 Adds support for DP and XUSB on various boards, enables SMMU support for more devices and fixes a couple of DTC warnings and inconsistencies that are reported at runtime. These changes along with some of the driver changes in other branches allow suspend/resume support on Tegra210 devices (e.g. Jetson TX1 and Jetson Nano). * tag 'tegra-for-5.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits) arm64: tegra: Add Jetson Nano SC7 timings arm64: tegra: Add Jetson TX1 SC7 timings arm64: tegra: Enable wake from deep sleep on RTC alarm arm64: tegra: Add PMU on Tegra210 arm64: tegra: Add blank lines for better readability arm64: tegra: Enable DisplayPort on Jetson AGX Xavier arm64: tegra: p2888: Rename regulators for consistency arm64: tegra: Enable DP support on Jetson TX2 arm64: tegra: Fix compatible for SOR1 arm64: tegra: Enable DP support on Jetson Nano arm64: tegra: Add SOR0_OUT clock on Tegra210 arm64: tegra: Assume no CLKREQ presence by default arm64: tegra: Enable SMMU for VIC on Tegra186 arm64: tegra: Enable XUSB host controller on Jetson TX2 arm64: tegra: Enable SMMU for XUSB host on Tegra186 arm64: tegra: Enable XUSB pad controller on Jetson TX2 arm64: tegra: Add ethernet alias on Jetson AGX Xavier arm64: tegra: Fix compatible string for EQOS on Tegra194 arm64: tegra: Hook up edp interrupt on Tegra210 SOCTHERM arm64: tegra: Fix base address for SOR1 on Tegra194 ... Link: https://lore.kernel.org/r/20191102144521.3863321-8-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-04arm64: dts: freescale: add initial support for colibri imx8xMarcel Ziswiler
This patch adds the device tree to support Toradex Colibri iMX8X a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8X family SoC (either i.MX 8DualX or 8QuadXPlus), a PF8100 PMIC, a FastEthernet PHY, 1 or 2 GB of LPDDR4 RAM, some level shifters, a Micron eMMC, a USB hub, an AD7879 resistive touch controller, an SGTL5000 audio codec and on-module CSI as well as DSI-LVDS FFC receptacles plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Colibri Evaluation Board includes the module's device tree and enables the supported peripherals of the carrier board (the Colibri Evaluation Board supports almost all of them). So far there is no display or USB functionality supported at all but basic console UART, eMMC and Ethernet functionality work fine. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-03Merge tag 'sunxi-dt-for-5.5-1' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual bunch of DT patches, with this time mostly: - Mali GPU support for the H6 - Two new crypto drivers enablement - A few fixes to our DTs, fixed through the validation effort - New boards: NanoPi Duo2 * tag 'sunxi-dt-for-5.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (22 commits) dt-bindings: arm: sunxi: add FriendlyARM NanoPi Duo2 ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 arm64: allwinner: h6: Enable GPU node for Tanix TX6 arm64: dts: allwinner: bluetooth for Emlid Neutis N5 ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins ARM: dts: sun9i: a80: Add Security System node ARM: dts: sun8i: a83t: Add Security System node arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6 arm64: dts: allwinner: sun50i: Add crypto engine node on H5 arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64 ARM: dts: sun8i: H3: Add Crypto Engine node ARM: dts: sun8i: R40: add crypto engine node dt-bindings: crypto: Add DT bindings documentation for sun8i-ce Crypto Engine arm64: dts: allwinner: Add mali GPU supply for H6 boards arm64: dts: allwinner: Add ARM Mali GPU node for H6 ARM: dts: sun8i: a83t: a711: Add touchscreen node ARM: dts: sun5i: olinuxino micro: Fix AT24 node name ARM: dts: sun9i: Add missing watchdog clocks arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3 arm64: dts: allwinner: orange-pi-3: Enable UART1 / Bluetooth ... Link: https://lore.kernel.org/r/1bf18c83-f41d-4353-9ca2-9585b8693df2.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03arm64: dts: lg1313: DT fix s/#interrupts-cells/#interrupt-cells/Geert Uytterhoeven
The standard DT property is called "#interrupt-cells". Link: https://lore.kernel.org/r/20191101160356.32034-2-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03arm64: dts: lg1312: DT fix s/#interrupts-cells/#interrupt-cells/Geert Uytterhoeven
The standard DT property is called "#interrupt-cells". Link: https://lore.kernel.org/r/20191101160356.32034-1-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03Merge tag 'renesas-arm64-dt-for-v5.5-tag2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM64 DT updates for v5.5 (take two) - Video-Input and Serial-ATA support on RZ/G2N, - Color Management Module support on various R-Car Gen3 SoCs, - Initial support for the R-Car M3-W+ (r8a77961) SoC on the Salvator-XS board. * tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+ arm64: dts: renesas: Add Renesas R8A77961 SoC support arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960 dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions arm64: dts: renesas: r8a774b1: Add SATA controller node arm64: dts: renesas: rcar-gen3: Add CMM units arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support Link: https://lore.kernel.org/r/20191101155842.31467-5-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03Merge tag 'hisi-arm64-dt-for-5.5' of git://github.com/hisilicon/linux-hisi ↵Olof Johansson
into arm/dt ARM64: DT: Hisilicon SoCs DT updates for 5.5 - add Mali450 MP4 GPU node in the hi6220 SoC * tag 'hisi-arm64-dt-for-5.5' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entry Link: https://lore.kernel.org/r/5DB95AAB.8060405@hisilicon.com Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-03Merge tag 'realtek-arm64-dt-for-5.5' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt Realtek ARM64 based SoC DT for v5.5 Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs. Add reset controllers for RTD129x and start using them for UARTs. * tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: arm64: dts: realtek: Add RTD129x UART resets arm64: dts: realtek: Add RTD129x reset controller nodes dt-bindings: reset: Add Realtek RTD1295 arm64: dts: realtek: Add watchdog node for RTD129x arm64: dts: realtek: Add oscillator for RTD129x arm64: dts: realtek: Add RTD1296 and Synology DS418 dt-bindings: arm: realtek: Document RTD1296 and Synology DS418 arm64: dts: realtek: Add RTD1293 and Synology DS418j arm64: dts: realtek: Change dual-license from MIT to BSD dt-bindings: arm: realtek: Document RTD1293 and Synology DS418j dt-bindings: arm: realtek: Tidy up conversion to json-schema Link: https://lore.kernel.org/r/20191030041000.31848-2-afaerber@suse.de Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-04arm64: dts: ls1028a: Fix tmu unit addressFabio Estevam
The following build warning is seen with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:531.20-581.5: Warning (simple_bus_reg): /soc/tmu@1f00000: simple-bus unit address format error, expected "1f80000" Fix it by adjusting the tmu unit address to match its reg entry. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04arm64: dts: ls1028a: Move thermal-zone out of SoCFabio Estevam
Move thermal-zone node from the soc node to the root node. thermal-zone node does not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:583.17-612.5: Warning (simple_bus_reg): /soc/thermal-zones: missing or empty reg/ranges property Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04arm64: dts: ls1028a-qds: Remove unnecessary #address-cells/#size-cellsFabio Estevam
The following build warning is seen with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts:196.10-208.4: Warning (avoid_unnecessary_addr_size): /soc/i2c@2000000/fpga@66: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Fix it by removing the unnecessary #address-cells/#size-cells. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04arm64: dts: imx8mn: Remove duplicated machine compatibleAnson Huang
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04arm64: dts: imx8mm: Remove duplicated machine compatibleAnson Huang
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-04arm64: dts: imx8mq-evk: Add remote controlRogerio Pimentel da Silva
Add remote control to i.MX8M EVK device tree. The rc protocol must be selected by writing to: /sys/devices/platform/ir-receiver/rc/rc0/protocols On my tests, I used "nec" rc protocol: echo nec > protocols Tested using evetest: evtest /dev/input/event0 Output log for each key pressed: Event: time 1568122608.267845, -------------- SYN_REPORT ------------ Event: time 1568122610.503835, type 4 (EV_MSC), code 4 (MSC_SCAN), value 440 Signed-off-by: Rogerio Pimentel da Silva <rpimentel.silva@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-02Merge tag 'socfpga_dts_updates_for_v5.5' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.5 - Arria10 - modify QSPI read-delay property - Agilex - Add QSPI support - Enable USB and LEDs - Add service layer, fpga manager support - Stratix10 - Update QSPI reg address * tag 'socfpga_dts_updates_for_v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: agilex: add service layer, fpga manager and fpga region arm64: agilex: enable USB and LEDs on agilex devkit arm64: dts: altera: update QSPI reg addresses for Stratix10 arm64: dts: agilex: add QSPI support for Intel Agilex ARM: dts: arria10: Modify QSPI read_delay for Arria10 Link: https://lore.kernel.org/r/20191029143737.24850-1-dinguyen@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-02Merge tag 'imx-fixes-5.4-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.4, 2nd round: - Get SNVS power key back to work for imx6-logicpd board. It was accidentally disabled by commit 770856f0da5d ("ARM: dts: imx6qdl: Enable SNVS power key according to board design"). - Fix sparse warnings in IMX GPC driver by making the initializers in imx_gpc_domains C99 format. - Fix an interrupt storm coming from accelerometer on imx6qdl-sabreauto board. This is seen with upstream version U-Boot where pinctrl is not configured for the device. - Fix sdma device compatible string for i.MX8MM and i.MX8MN SoC. - Fix compatible of PCA9547 i2c-mux on LS1028A QDS board to get the device probed correctly. * tag 'imx-fixes-5.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8mn: fix compatible string for sdma arm64: dts: imx8mm: fix compatible string for sdma ARM: dts: imx6-logicpd: Re-enable SNVS power key soc: imx: gpc: fix initialiser format ARM: dts: imx6qdl-sabreauto: Fix storm of accelerometer interrupts arm64: dts: ls1028a: fix a compatible issue Link: https://lore.kernel.org/r/20191029110334.GA20928@dragon Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-02arm64: allwinner: h6: Enable GPU node for Tanix TX6Clément Péron
Unlike other H6 boards, Tanix TX6 doesn't have a PMIC so we can enable the GPU without providing a specific power supply. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+Geert Uytterhoeven
Add initial support for the Renesas Salvator-X 2nd version development board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. The memory map is as follows: - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff 0x000480000000 -> 0x004ffffffff - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff Based on a patch in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-10-geert+renesas@glider.be
2019-11-01arm64: dts: renesas: Add Renesas R8A77961 SoC supportGeert Uytterhoeven
Add initial support for the Renesas R-Car M3-W+ (R8A77961) SoC. This includes: - Cortex-A57 and Cortex-A53 CPU cores (incl. L2 caches and power state definitions), - Power Management Unit, - PSCI firmware, - Pin Function Controller, - Clock, Reset, System, and Interrupt Controllers, - SCIF2 serial console, - Product Register, - ARM Architectured Timer, and various placeholders to allow to use salvator-xs.dtsi. Based on r8a7796.dtsi. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-9-geert+renesas@glider.be
2019-11-01arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960Geert Uytterhoeven
CONFIG_ARCH_R8A7796 for R-Car M3-W (R8A77960) will be renamed to CONFIG_ARCH_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961), which will use CONFIG_ARCH_R8A77961. Relax dependencies by handling both symbols. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023123342.13100-8-geert+renesas@glider.be
2019-11-01arm64: dts: allwinner: bluetooth for Emlid Neutis N5Georgii Staroselskii
The Emlid Neutis N5 board has AP6212 BT+WiFi chip. This patch is in line with 8558c6e21ceb ("ARM: dts: sun8i: h3: bluetooth for Banana Pi M2 Zero board") and other commits that add Bluetooth support for similar boards. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on H6Corentin Labbe
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. This patch enables the Crypto Engine on the Allwinner H6 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add crypto engine node on H5Corentin Labbe
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner H5 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-11-01arm64: dts: allwinner: sun50i: Add Crypto Engine node on A64Corentin Labbe
The Crypto Engine is a hardware cryptographic accelerator that supports many algorithms. It could be found on most Allwinner SoCs. This patch enables the Crypto Engine on the Allwinner A64 SoC Device-tree. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-10-31arm64: dts: qcom: msm8998: Disable coresight by defaultSai Prakash Ranjan
Boot failure has been reported on MSM8998 based laptop when coresight is enabled. This is most likely due to lack of firmware support for coresight on production device when compared to debug device like MTP where this issue is not observed. So disable coresight by default for MSM8998 and enable it only for MSM8998 MTP. Reported-and-tested-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Fixes: 783abfa2249a ("arm64: dts: qcom: msm8998: Add Coresight support") Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-31arm64: dts: qcom: msm8998-clamshell: Remove retention idle stateJeffrey Hugo
The retention idle state does not appear to be supported by the firmware present on the msm8998 laptops since the state is advertised as disabled in ACPI, and attempting to enable the state in DT is observed to result in boot hangs. Therefore, remove the state from use to address the observed issues. Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Fixes: 2c6d2d3a580a (arm64: dts: qcom: Add Lenovo Miix 630) Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-31arm64: dts: allwinner: Add mali GPU supply for H6 boardsClément Péron
Enable and add supply to the Mali GPU node on all the H6 boards. Regarding the datasheet the maximum time for supply to reach its voltage is 32ms. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-10-31arm64: dts: allwinner: Add ARM Mali GPU node for H6Clément Péron
Add the mali gpu node to the H6 device-tree. Signed-off-by: Clément Péron <peron.clem@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2019-10-29arm64: tegra: Add Jetson Nano SC7 timingsSowjanya Komatineni
Add platform specific SC7 timing configuration to the Jetson Nano device tree. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add Jetson TX1 SC7 timingsSowjanya Komatineni
Add platform specific SC7 timing configuration to the Jetson TX1 device tree. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable wake from deep sleep on RTC alarmSowjanya Komatineni
This patch updates device tree for RTC and PMC to allow system wake from deep sleep on RTC alarm. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add PMU on Tegra210Thierry Reding
The NVIDIA Tegra210 contains an ARM PMU v3 that can be used to gather statistics about the processors and their memory system. Add a device tree node so that this functionality can be exposed. Reported-by: William Cohen <giantklein@gmail.com> Tested-by: William Cohen <giantklein@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add blank lines for better readabilityThierry Reding
Separate the individual thermal zones by a blank line for improved readability. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable DisplayPort on Jetson AGX XavierThierry Reding
Enable both USB-C/DP ports on Jetson AGX Xavier and wire up the power supplies for the SORs that drive these outputs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: p2888: Rename regulators for consistencyThierry Reding
Some of the PMIC regulators had names that don't match the schematics. Rename them so that it is easier to cross-reference with the hardware documentation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable DP support on Jetson TX2Thierry Reding
If equipped with an E3320 display module, Jetson TX2 can support DisplayPort. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Fix compatible for SOR1Thierry Reding
It turns out that both SORs on Tegra186 are the same, so there's no need to distinguish between them in the compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable DP support on Jetson NanoThierry Reding
Add the AVDD_IO_EDP_1V05 and enable the SOR and DPAUX hardware blocks that are used to drive DisplayPort on Jetson Nano. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add SOR0_OUT clock on Tegra210Thierry Reding
This clock was not previously used because it is a fixed clock. However, adding it here allows operating systems to deal with SOR0 the same way as SOR1. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Assume no CLKREQ presence by defaultVidya Sagar
Although Tegra194 has support for CLKREQ sideband signal and P2972 has routing of the same till the slot, it is the case most of the time that the connected device doesn't have CLKREQ support. Hence, it makes sense to assume that there is no CLKREQ support by default and it can be enabled on need basis when a card with CLKREQ support is connected. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable SMMU for VIC on Tegra186Thierry Reding
Enable address translation for VIC via the SMMU on Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable XUSB host controller on Jetson TX2Nagarjuna Kristam
This enables the use of the USB ports found on the Jetson TX2 for input or external storage, for example. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable SMMU for XUSB host on Tegra186Nagarjuna Kristam
Enabling the SMMU for XUSB host allows buffers to be mapped through the ARM SMMU, which helps protecting the system from rogue memory accesses by the XUSB host. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Enable XUSB pad controller on Jetson TX2Nagarjuna Kristam
The XUSB pad controller is a prerequisite for enabling XUSB support. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Add ethernet alias on Jetson AGX XavierThierry Reding
The Tegra194 EQOS controller is used as primary Ethernet interface. Set the ethernet0 alias to reflect that. Generic bootloader code can use this to find the primary Ethernet device and set the MAC address, for example. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Fix compatible string for EQOS on Tegra194Thierry Reding
The EQOS Ethernet controller found on Tegra194 is compatible with its predecessor or Tegra186. However, it is an established practice to add a compatible string for the most recent generation of the SoC as well, just in case some incompatibilities or bugs are later discovered. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Hook up edp interrupt on Tegra210 SOCTHERMThierry Reding
For some reason this was never hooked up. Do it now so that over-current interrupts can be logged. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29arm64: tegra: Fix base address for SOR1 on Tegra194Thierry Reding
The SOR1 hardware block's registers start at physical address 0x15b40000 as correctly specified by the unit-address, but the reg property lists a wrong value, likely because it was copy-and-pasted from SOR0 but not correctly updated. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit (git 2.34.1) at 2024-06-13 12:52:08 +0000