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2022-07-02arm64: dts: qcom: adjust whitespace around '='Krzysztof Kozlowski
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: msm8998-mtp: correct board compatibleKrzysztof Kozlowski
Add qcom,msm8998 SoC fallback to the board compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521164550.91115-12-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: ipq6018-cp01-c1: fix Micron SPI NOR compatibleKrzysztof Kozlowski
The proper compatible for Micron n25q128a11 SPI NOR flash should include vendor-prefix. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521164550.91115-11-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sdm630: correct QFPROM byte offsetsKrzysztof Kozlowski
The NVMEM bindings expect that 'bits' property holds offset and size of region within a byte, so it applies a constraint of <0, 7> for the offset. Using 25 as HSTX trim offset is within 4-byte QFPROM word, but outside of the byte: sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: hstx-trim@240:bits:0:0: 25 is greater than the maximum of 7 sdm630-sony-xperia-nile-discovery.dtb: qfprom@780000: gpu-speed-bin@41a0:bits:0:0: 21 is greater than the maximum of 7 Align the offsets to match the bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-6-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: use dedicated QFPROM compatiblesKrzysztof Kozlowski
Use dedicated compatibles for QFPROM on MSM8916, MSM8996, MSM8998, QCS404 and SDM630 which is expected by the bindings: msm8996-mtp.dtb: qfprom@74000: compatible:0: 'qcom,qfprom' is not one of ['qcom,apq8064-qfprom', ... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505113802.243301-5-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: correct SPMI WLED register range encodingKrzysztof Kozlowski
On PM660L, PMI8994 and PMI8998, the WLED has two address spaces and with size-cells=0, they should be encoded as two separate items. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505154702.422108-2-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: add missing AOSS QMP compatible fallbackKrzysztof Kozlowski
The AOSS QMP bindings expect all compatibles to be followed by fallback "qcom,aoss-qmp" because all of these are actually compatible with each other. This fixes dtbs_check warnings like: sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-qmp'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-6-krzysztof.kozlowski@linaro.org
2022-07-02arm64: dts: qcom: sc7180: Add kingoftown dts filesJoseph S. Barrera III
Kingoftown is a trogdor-based board. These dts files are unchanged copies from the downstream Chrome OS 5.4 kernel. Signed-off-by: Joseph S. Barrera III <joebar@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220625183538.v14.5.Ib62291487a664a65066d18a3e83c5428a6d2cc6c@changeid
2022-07-02arm64: dts: qcom: sc7180: Add pazquel dts filesJoseph S. Barrera III
Pazquel is a trogdor-based board. These dts files are unchanged copies from the downstream Chrome OS 5.4 kernel. Signed-off-by: Joseph S. Barrera III <joebar@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220625183538.v14.4.I41e2c2dc12961fe000ebc4d4ef6f0bc5da1259ea@changeid
2022-07-02arm64: dts: qcom: sc7180: Add mrbland dts filesJoseph S. Barrera III
Mrbland is a trogdor-based board. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with downstream bits removed. Signed-off-by: Joseph S. Barrera III <joebar@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220625183538.v14.3.I71176ebf7e5aebddb211f00e805b32c08376d1be@changeid
2022-07-02arm64: dts: qcom: sc7180: Add quackingstick dts filesJoseph S. Barrera III
Quackingstick is a trogdor-based board. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with downstream bits removed. Signed-off-by: Joseph S. Barrera III <joebar@chromium.org> Tested-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220625183538.v14.2.I0977b1a08830d0caa8bfb1bdedb4ecceac709a7f@changeid
2022-07-02arm64: dts: qcom: sc7180: Add wormdingler dts filesJoseph S. Barrera III
Wormdingler is a trogdor-based board, shipping to customers as the Lenovo IdeaPad Chromebook Duet 3. These dts files are copies from the downstream Chrome OS 5.4 kernel, but with the camera (sc7180-trogdor-mipi-camera.dtsi) #include removed. Signed-off-by: Joseph S. Barrera III <joebar@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220625183538.v14.1.Id769ddc5dbf570ccb511db96da59f97d08f75a9c@changeid
2022-07-02arm64: dts: qcom: sc7280: Rename sar sensor labelsGwendal Grignou
To ease matching configuration of sysfs attributes for particular sensor, match label reported by iio 'label' attribute with the location label generated by ChromeOS config tool. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220623223119.1858863-1-gwendal@chromium.org
2022-07-02arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetreeJohan Hovold
Add an initial devicetree for the Lenovo Thinkpad X13s with support for USB, backlight, keyboard, touchpad, touchscreen (to be verified), PMICs and remoteprocs. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220622132617.24604-1-johan+linaro@kernel.org
2022-07-02arm64: dts: qcom: add SA8540P and ADPBjorn Andersson
Introduce the Qualcomm SA8540P automotive platform and the SA8295P ADP development board. The SA8540P and SC8280XP are fairly similar, so the SA8540P is built ontop of the SC8280XP dtsi to reduce duplication. As more advanced features are integrated this might be re-evaluated. This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh regulators, debug UART, PMICs, remoteprocs (NSPs crashes shortly after booting) and USB. The SA8295P ADP contains four PM8450 PMICs, which according to their revid are compatible with PM8150. They are defined within the ADP for now, to avoid creating additional .dtsi files for PM8150 with just addresses changed - and to allow using the labels from the schematics. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220629041438.1352536-6-bjorn.andersson@linaro.org
2022-07-02arm64: dts: qcom: sc8280xp: Add reference deviceBjorn Andersson
Add basic support for the SC8280XP reference device, which allows it to boot to a shell (using EFIFB) with functional storage (UFS), USB, keyboard, touchpad, touchscreen, backlight and remoteprocs. The PMICs are, per socinfo, reused from other platforms. But given that the address of the PMICs doesn't match other cases and that it's desirable to label things according to the schematics a new dtsi file is created to represent the reference combination of PMICs. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20220629041438.1352536-5-bjorn.andersson@linaro.org
2022-06-30arm64: dts: qcom: add SC8280XP platformBjorn Andersson
Introduce initial support for the Qualcomm SC8280XP platform, aka 8cx Gen 3. This initial contribution supports SMP, CPUfreq, CPU cluster idling, GCC, TLMM, SMMU, RPMh regulators, power-domains and clocks, interconnects, some QUPs, UFS, remoteprocs, USB, watchdog, LLCC and tsens. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220629041438.1352536-4-bjorn.andersson@linaro.org
2022-06-30arm64: dts: qcom: sm8450: Add interconnect requirements for SCMSibi Sankar
Add interconnects requirements for the SCM interface on SM8450 SoCs. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1653289258-17699-4-git-send-email-quic_sibis@quicinc.com
2022-06-30arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board supportDmitry Baryshkov
The IFC6560 is a board from Inforce Computing, built around the SDA660 SoC. This patch describes core clocks, some regulators from the two PMICs, debug uart, storage, bluetooth and audio DSP remoteproc. The regulator settings are inherited from prior work by Konrad Dybcio and AngeloGioacchino Del Regno. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-12-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board filesDmitry Baryshkov
This results in dts duplication, but per mutual agreement card detect pin configuration belongs to the board files. Move it from the SoC dtsi to the board DT files. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-10-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconfDmitry Baryshkov
Fix the device tree node in the &sdc2_state_on override. The sdm630 uses 'clk' rather than 'pinconf-clk'. Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-9-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: fix gpu's interconnect pathDmitry Baryshkov
ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream kernel sources, the GPU uses MASTER_OXILI here, which is equivalent to <&bimc 1 ...>. While we are at it, use defined names instead of the numbers for this interconnect path. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reported-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-8-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: add second (HS) USB host supportDmitry Baryshkov
Add DT entries for the second DWC3 USB host, which is limited to the USB2.0 (HighSpeed), and the corresponding QUSB PHY. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-7-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0Dmitry Baryshkov
In preparation to adding second USB host/PHY pair, change first USB PHY's label to qusb2phy0. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-6-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: fix the qusb2phy ref clockDmitry Baryshkov
According to the downstram DT file, the qusb2phy ref clock should be GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK. Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration") Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-5-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: disable GPU by defaultDmitry Baryshkov
The SoC's device tree file disables gpucc and adreno's SMMU by default. So let's disable the GPU too. Moreover it looks like SMMU might be not usable without additional patches (which means that GPU is unusable too). No board uses GPU at this moment. Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration") Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-4-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by defaultDmitry Baryshkov
Follow the typical practice and keep DSI1/DSI1 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-3-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by defaultDmitry Baryshkov
Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. They should be enabled in the board DT files. No existing boards use them at this moment. Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521202708.1509308-2-dmitry.baryshkov@linaro.org
2022-06-28arm64: dts: qcom: correct interrupt controller on PM8916 and PMS405Krzysztof Kozlowski
The PM8916 and PMS405 PMIC GPIOs are interrupt controllers, as described in the bindings and used by the driver. Drop the interrupts (apparently copied from downstream tree), just like in commit 61d2ca503d0b ("arm64: dts: qcom: fix pm8150 gpio interrupts"): qcs404-evb-4000.dtb: gpio@c000: 'interrupts' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' qcs404-evb-4000.dtb: gpio@c000: 'interrupt-controller' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508135932.132378-4-krzysztof.kozlowski@linaro.org
2022-06-28arm64: dts: qcom: add missing gpio-ranges in PMIC GPIOsKrzysztof Kozlowski
The new Qualcomm PMIC GPIO bindings require gpio-ranges property: sm8250-sony-xperia-edo-pdx203.dtb: gpio@c000: 'gpio-ranges' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508135932.132378-3-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order interrupts according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the interrupts ordered differently then specified in the bindings: sdm630-sony-xperia-nile-pioneer.dtb: camss@ca00000: interrupt-names:0: 'csid0' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-4-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order regs according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the regs ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:0: 'csi_clk_mux' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-3-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm630: order clocks according to bindingsKrzysztof Kozlowski
The CAMSS DTSI device node, which came after the bindings were merged, got the clocks ordered differently then specified in the bindings: sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected Reordering them to match bindings should not cause ABI issues, because the driver relies on names, not ordering. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: msm8994-msft-lumia-octagon: add PM8994 pin propertiesKrzysztof Kozlowski
The bindings require that every pin configuration comes with 'function' property. There is also no 'drive-strength' property but 'qcom,drive-strength': msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: amsel-high-state: 'oneOf' conditional failed, one must be fixed: 'drive-strength' does not match any of the regexes: 'pinctrl-[0-9]+' 'bias-pull-up', 'drive-strength', 'function', 'pins' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-9-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: apq8096-db820c: add PM8994 pin functionKrzysztof Kozlowski
The bindings require that every pin configuration comes with 'function' property. Add such to PM8994 GPIO5. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-8-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: add fallback compatible to PMIC GPIOsKrzysztof Kozlowski
The bindings require all PMIC GPIO nodes to have two compatibles - specific followed by SPMI or SSBI fallback. Add the fallback to fix warnings like: msm8916-samsung-serranove.dtb: gpios@c000: compatible: ['qcom,pm8916-gpio'] is too short Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-7-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: align PMIC GPIO pin configuration with DT schemaKrzysztof Kozlowski
DT schema expects PMIC GPIO pin configuration nodes to be named with '-state' suffix. Optional children should be either 'pinconf' or followed with '-pins' suffix. This fixes dtbs_check warnings like: sdm845-xiaomi-beryllium.dtb: gpios@c000: 'vol-up-active' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220507194913.261121-6-krzysztof.kozlowski@linaro.org
2022-06-27arm64: dts: qcom: sdm845-akatsuki: Round down l22a regulator voltageMarijn Suijten
2700000 is not a multiple of pmic4_pldo's step size of 8000 (with base voltage 1664000), resulting in pm8998-rpmh-regulators not probing. Just as we did with MSM8998's Sony Yoshino Poplar [1], round the voltages down to err on the cautious side and leave a comment in place to document this discrepancy wrt downstream sources. [1]: https://lore.kernel.org/linux-arm-msm/20220507153627.1478268-1-marijn.suijten@somainline.org/ Fixes: 30a7f99befc6 ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220620211212.269956-1-marijn.suijten@somainline.org
2022-06-27arm64: dts: qcom: msm8996: Add SDHCI resetsKonrad Dybcio
On MSM8996, the default bootloader configuration leaves the hosts in some weird state that never allows them to function properly under Linux. Add the hardware resets so that we can start clean and get them actually working. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162642.608106-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8996-tone: Rule out PM(I)8994 variantsKonrad Dybcio
It looks like all Tone devices out in the wild are using PMI8996, which suggests the PMI8994-variant DTs are not needed. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162525.607946-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8996-tone: Drop cont_splash_mem regionKonrad Dybcio
Tone does not have a functioning bootloader framebuffer and Linux allocates the DRM framebuffer dynamically. Free up 36 MiB of precious RAM by removing this reservation. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162319.607629-1-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-mtp: Merge and fix up the DTKonrad Dybcio
Merge the two DT files into one, sort the nodes and fix up a couple of style incoherencies by adding some newlines, removing some, sorting properties etc. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-14-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-fxtec: Decouple from 8998 MTPKonrad Dybcio
While the Pro-1 is based on MTP and is very close to it, it's really not great for it to include the MTP dtsi straight up, as any small change will affect both boards and not all of them will apply to the phone as well. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-13-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Clean up #includesKonrad Dybcio
Sort the includes and remove unused ones. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-12-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-oneplus: Add clocks & GDSC to simplefbKonrad Dybcio
This is required to keep the display working with MMCC enabled until proper panel support is in place. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-11-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998*: Keep MMCC & MMSS_SMMU enabled by defaultKonrad Dybcio
MMCC is a component of the SoC that should always be configured. It was kept off due to misconfiguration on clamshell machines. Keep it disabled on these ones and enable it by default on all the others. Exactly the same story applies to MMSS_SMMU, which directly depends on MMCC. Do note, that if a platform doesn't use neither EFIFB (only applies to WoA devices in this case) or simplefb (applies to precisely 2 msm8998 devices as of this commit), this will not cause any harm. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-10-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-fxtec: Use "okay" instead of "ok"Konrad Dybcio
This is the standard way. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-9-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-oneplus: Apply style fixesKonrad Dybcio
Add some newlines, reorder some properties, remove some indentation to make it more coherent. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-8-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino/oneplus: Use pm8005_regulators labelKonrad Dybcio
Now that a label is added, use it! Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-7-konrad.dybcio@somainline.org
2022-06-27arm64: dts: qcom: msm8998-yoshino: Remove simple-bus compatible from clocks{}Konrad Dybcio
It's not necessary and the SoC clocks{} node doesn't use it either. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220430162353.607709-6-konrad.dybcio@somainline.org
generated by cgit (git 2.34.1) at 2025-04-25 03:38:00 +0000