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2024-11-04arm64: signal: Remove unused macroKevin Brodsky
Commit 33f082614c34 ("arm64: signal: Allow expansion of the signal frame") introduced the BASE_SIGFRAME_SIZE macro but it has apparently never been used; just remove it. Reviewed-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Link: https://lore.kernel.org/r/20241029144539.111155-4-kevin.brodsky@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-11-04arm64: signal: Remove unnecessary check when saving POE stateKevin Brodsky
The POE frame record is allocated unconditionally if POE is supported. If the allocation fails, a SIGSEGV is delivered before setup_sigframe() can be reached. As a result there is no need to consider poe_offset before saving POR_EL0; just remove that check. This is in line with other frame records (FPMR, TPIDR2). Reviewed-by: Mark Brown <broonie@kernel.org> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Link: https://lore.kernel.org/r/20241029144539.111155-3-kevin.brodsky@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-11-04arm64/mm: Drop setting PTE_TYPE_PAGE in pte_mkcont()Anshuman Khandual
PTE_TYPE_PAGE bits were being set in pte_mkcont() because PTE_TABLE_BIT was being cleared in pte_mkhuge(). But after arch_make_huge_pte() modification in commit f8192813dcbe ("arm64/mm: Re-organize arch_make_huge_pte()"), which dropped pte_mkhuge() completely, setting back PTE_TYPE_PAGE bits is no longer necessary. Change pte_mkcont() to only set PTE_CONT. Cc: Will Deacon <will@kernel.org> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20241104041617.3804617-1-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-11-04arm64: dts: ti: k3-am62: use opp_efuse_table for opp-table sysconDhruva Gole
Add another entry in the wkup_conf for the syscon node, and then use that for the syscon in opp-table. Marking entire wkup_conf as "syscon", "simple-mfd" is wrong and needs to be addressed similar to how other child-nodes in wkup_conf are implemented in the same file. Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241104063707.3604302-1-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-04Merge tag 'memory-controller-drv-6.13' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.13 1. Freescale IFC: Split handling of child nodes in the bindings to fix dtbs_check warning. 2. ARM64 defconfig: Nothing selects CONFIG_FSL_IFC anymore since commit 9ba0cae3cac0 ("memory: fsl_ifc: Make FSL_IFC config visible and selectable") and actually CONFIG_MTD_NAND_FSL_IFC depends on it now. Enable CONFIG_FSL_IFC in ARM64 defconfig, so users of it won't lose these two drivers. * tag 'memory-controller-drv-6.13' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: arm64: defconfig: Update defconfig with now user-visible CONFIG_FSL_IFC dt-bindings: memory-controllers: fsl,ifc: split child node differences Link: https://lore.kernel.org/r/20241029075348.19580-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-11-04arm64/fpsimd: Fix a typoChristophe JAILLET
s/FPSMID/FPSIMD/ M and I swapped. Fix it. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/2cbcb42615e9265bccc9b746465d7998382e605d.1730539907.git.christophe.jaillet@wanadoo.fr Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2024-11-04arm64: dts: mediatek: mt8183-kukui: Drop bogus fixed regulatorsChen-Yu Tsai
A couple of the fixed regulators in the Kukui dtsi do not actually exist in the hardware design; they are simply power rails connected together with 0 ohm bridges. Drop them and assign their upstream supplies to their consumers instead. Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20241030070224.1006331-5-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-11-04arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add supplies for fixed regulatorsChen-Yu Tsai
When the fixed regulators for the LCD panel and DP bridge were added, their supplies were not modeled in. These, except for the 1.0V supply, are just load switches, and need and have a supply. Add the supplies for each of the fixed regulators. Fixes: cabc71b08eb5 ("arm64: dts: mt8183: Add kukui-jacuzzi-damu board") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20241030070224.1006331-4-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-11-04arm64: dts: mediatek: mt8183-kukui-jacuzzi: Fix DP bridge supply namesChen-Yu Tsai
Some of the regulator supplies for the MIPI-DPI-to-DP bridge and their associated nodes are incorrectly named. In particular, the 1.0V supply was modeled as a 1.2V supply. Fix all the incorrect names, and also fix the voltage of the 1.0V regulator. Fixes: cabc71b08eb5 ("arm64: dts: mt8183: Add kukui-jacuzzi-damu board") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20241030070224.1006331-3-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-11-04arm64: dts: mediatek: mt6358: fix dtbs_check errorMacpaul Lin
Fix DTBS check errors for 'mt6358codec' and 'mt6358regulator': Error message is: pmic: 'mt6358codec' and 'mt6358regulator' does not match any of the regexes: 'pinctrl-[0-9]+'. Rename these two device node to generic 'audio-codec' and 'regulators'. Fixes: 9f8872221674 ("arm64: dts: mt6358: add PMIC MT6358 related nodes") Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Link: https://lore.kernel.org/r/20241029064647.13370-1-macpaul.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-11-04arm64: dts: mediatek: mt8186-corsola: Fix IT6505 reset line polarityChen-Yu Tsai
The reset line of the IT6505 bridge chip is active low, not active high. It was incorrectly inverted in the device tree as the implementation at the time incorrectly inverted the polarity in its driver, due to a prior device having an inline inverting level shifter. Fix the polarity now while the external display pipeline is incomplete, thereby avoiding any impact to running systems. A matching fix for the driver should be included if this change is backported. Fixes: 8855d01fb81f ("arm64: dts: mediatek: Add MT8186 Krabby platform based Tentacruel / Tentacool") Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20241029100226.660263-1-wenst@chromium.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-11-04arm64: dts: freescale: imx8mp-verdin: Fix SD regulator startup delayFrancesco Dolcini
The power switch used to power the SD card interface might have more than 2ms turn-on time, increase the startup delay to 20ms to prevent failures. Fixes: a39ed23bdf6e ("arm64: dts: freescale: add initial support for verdin imx8m plus") Cc: stable@vger.kernel.org Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: freescale: imx8mm-verdin: Fix SD regulator startup delayFrancesco Dolcini
The power switch used to power the SD card interface might have more than 2ms turn-on time, increase the startup delay to 20ms to prevent failures. Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini") Cc: stable@vger.kernel.org Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mp-verdin: add single-master property to all i2c nodesStefan Eichenberger
By default we expect all i2c nodes to be single-master, we do not have any module or carrier board that uses multi-master mode on any i2c controller. With this property set, we benefit from optimisations made exclusively for single-masters. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mm-verdin: add single-master property to all i2c nodesStefan Eichenberger
By default we expect all i2c nodes to be single-master, we do not have any module or carrier board that uses multi-master mode on any i2c controller. With this property set, we benefit from optimisations made exclusively for single-masters. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx95: Add missing vendor string to SCMI propertyAlexander Stein
With commit 7bf46ec090b9e ("dt-bindings: firmware: arm,scmi: Add missing vendor string") this property has 'arm' vendor prefix. Fix the property name accordingly. Fixes: 61ed94cd54e3 ("arm64: dts: imx95: set max-rx-timeout-ms") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mp-navqp: Add HDMI supportGilles Talis
The HDMI connector on the board is a micro-HDMI (type "d") Signed-off-by: Gilles Talis <gilles.talis@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm-ss-hsio: fix PCI and SATA clock indicesFrank Li
The first argument of lpcg should indices, instead of index. Fix it by use predefined macro. Fixes: 9f7053f67c8a ("arm64: dts: imx8-ss-hsio: Add PCIe and SATA support") Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm-ss-hsio: fix interrupt-map indent under pci* nodesFrank Li
Fix interrupt-map indent under pci* nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qxp-mek: replace hardcode 0 with IMX_LPCG_CLK_0Frank Li
Update clock settings to use the macro IMX_LPCG_CLK_0 instead of the hardcoded value 0. The first argument of lpcg is indices, not index. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mn-tqma8mqnl-mba8mx-usbot: fix coexistence of output-low and ↵Frank Li
output-high in GPIO Fix the issue where both 'output-low' and 'output-high' exist under GPIO hog nodes (rst_usb_hub_hog and sel_usb_hub_hog) when applying device tree overlays. Since /delete-property/ is not supported in the overlays, setting 'output-low' results in both properties being present. The workaround is to disable these hogs and create new ones with 'output-low' as needed. Fix below CHECK_DTBS warning: arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx-usbotg.dtb: sel-usb-hub-hog: {'output-low': True, 'gpio-hog': True, 'gpios': [[1, 0]], 'output-high': True, 'phandle': 108, '$nodename': ['sel-usb-hub-hog']} is valid under each of {'required': ['output-low']}, {'required': ['output-high'] Fixes: 3f6fc30abebc ("arm64: dts: imx8mn: tqma8mqnl-mba8mx: Add USB DR overlay") Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: layerscape: remove en25s64 and only keep jedec,spi-nor ↵Frank Li
compatible string In jedec,spi-nor.yaml: SPI NOR flashes compatible with the JEDEC SFDP standard or which may be identified with the READ ID opcode (0x9F) do not deserve a specific compatible. They should instead only be matched against the generic "jedec,spi-nor" compatible. en25s64 already in drivers/mtd/spi-nor/eon.c. So remove it safely and fix below warning: arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: flash@2: compatible: 'oneOf' conditional failed, one must be fixed: ['en25s64', 'jedec,spi-nor'] is too long Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mp-kontron-dl: change touchscreen power-supply to AVDD28-supplyFrank Li
Update the touchscreen power-supply from 'power-supply' to 'AVDD28-supply' and 'VDDIO-supply' as per the binding documentation in goodix.yaml. Fix below warning: arch/arm64/boot/dts/freescale/imx8mp-kontron-dl.dtb: touchscreen@5d: 'power-supply' does not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/input/touchscreen/goodix.yaml Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8mp: Add Boundary Device Nitrogen8MP Universal SMARC Carrier ↵Bhavin Sharma
Board Adds the DTSI file for the Nitrogen8MP SMARC System on Module which is delivered with the Nitrogen8MP Universal SMARC Carrier Board. Initial support includes: - Serial console - eMMC - SD card Signed-off-by: Bhavin Sharma <bhavin.sharma@siliconsignals.io> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8: move samsung,burst-clock-frequency to imx8mn and imx8mm ↵Frank Li
mba8mx board file Move 'samsung,burst-clock-frequency' and 'samsung,esc-clock-frequency' properties to i.MX8MN and i.MX8MM mba8mx board file. These properties are not applicable to i.MX8MQ MIPI DSI, which uses the compatible string 'fsl,imx8mq-nwl-dsi'. The properties are only valid for i.MX8MM and i.MX8MN devices with the compatible string 'fsl,imx8mm-mipi-dsim', as described in samsung,mipi-dsim.yaml. Fix warning: arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtb: dsi@30a00000: Unevaluated properties are not allowed ('ports', 'samsung,burst-clock-frequency', 'samsung,esc-clock-frequency' were unexpected) from schema $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: mba8mx: remove undocumented 'data-lanes' at panelFrank Li
'data-lanes' is port0 of lvds bridge. Needn't set it for simple panel. Fix below CHECK_DTBS warning: arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx-lvds-tm070jvhg33.dtb: panel-lvds: port:endpoint: Unevaluated properties are not allowed ('data-lanes' was unexpected) from schema $id: http://devicetree.org/schemas/display/panel/panel-simple.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx: Add i.MX8M Plus Gateworks GW82XX-2X supportTim Harvey
The Gateworks GW82XX-2X is an ARM based single board computer (SBC) comprised of the i.MX8M Plus based gw702x SoM and the gw82xx baseboard featuring: - i.MX8M Plus SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (GSC) - microSD (1.8V/3.3V Capable) - panel status bi-color LED - pushbutton switch - fan controller with tachometer - USB Type-C connector - PCIe switch - 2x GbE RJ45 connectors - multi-protocol RS232/RS485/RS422 Serial ports - 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe (for M.2 and miniPCIe expansion) - 2x isolated CAN - GPS - accelerometer - magnetometer - off-board connectors for: SPI, GPIO, I2C, ADC - Wide range DC power input - support for 802.3at PoE (via adapter) Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8ulp-evk: Add spdif sound card supportShengjiu Wang
Add spdif sound card support, configure the pinmux. This sound card supports only playback sound through HDMI interface. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8ulp-evk: Add bt-sco sound card supportShengjiu Wang
Add bt-sco sound card, which is used by BT HFP case. It supports wb profile as default Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8ulp: Add audio device nodesShengjiu Wang
Add edma1, sai4, sai5 device nodes bus of in per_bridge3. Add edma2, sai6, sai7, spdif device nodes in bus of per_bridge5. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm-mek: enable dsp node for rproc usageLaurentiu Mihalcea
Set the status of the dsp node to "okay" and assign and add its reserved memory regions. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm: add node for VPU dspLaurentiu Mihalcea
Add DT node for i.MX8QM's DSP, which is found in the VPU subsystem. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qm: drop dsp node from audio_subsys busLaurentiu Mihalcea
On i.MX8QM, the DSP is in the VPU subsystem, which means that using the 'dsp' node from 'imx8-ss-audio.dtsi' is wrong as it's placed under the wrong bus. As such, drop it. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8qxp-mek: add dsp rproc-related mem regionsLaurentiu Mihalcea
Add missing dsp rproc-related reserved memory regions and assign them to the 'dsp' node. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04arm64: dts: imx8-ss-audio: configure dsp node for rproc usageLaurentiu Mihalcea
The 'dsp' node is currently configured for running an audio firmware. Since the firmware requires that some audio-related IPs be disabled in Linux, this will clash with the configurations from the imx8 board DTs (i.e: imx8qm-mek, imx8qxp-mek, etc...), thus making the dsp unusable (since the firmware won't function properly). To avoid this issue, configure the 'dsp' node for rproc. This way, users will be able to use the dsp alongside the board-level audio configuration as long as the firmware doesn't need the audio IPs. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-03arm64: defconfig: Enable VBATTB clock and Renesas RTCA-3Claudiu Beznea
Enable the Renesas VBATTB clock and RTCA-3 RTC drivers. These are available on the Renesas RZ/G3S SoC. VBATTB is the clock provider for the RTC counter. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-10-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: rzg3s-smarc-som: Enable RTCClaudiu Beznea
Enable RTC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-9-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTBClaudiu Beznea
Enable the VBATTB controller. It provides the clock for RTC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-8-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: r9a08g045: Add RTC nodeClaudiu Beznea
Add the DT node for the RTC IP available on the Renesas RZ/G3S SoC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-7-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: r9a08g045: Add VBATTB nodeClaudiu Beznea
Add the DT node for the VBATTB IP along with DT bindings for the clock it provides. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://lore.kernel.org/20241101095720.2247815-6-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQGeert Uytterhoeven
When the DSI to eDP bridge was added, pin control for the IRQ pin was left out, because the pin controller did not support INTC-EX pins yet. Commit 10544ec1b3436037 ("pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function") added support for these pins, so add the missing pin control description. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/89bab2008891be1f003a3c0dbcdf36af3b98da70.1729240573.git.geert+renesas@glider.be
2024-11-03arm64: dts: renesas: hihope: Drop #sound-dai-cellsLad Prabhakar
"#sound-dai-cells" is required if the board is using "simple-card". However, the HiHope board uses "audio-graph", thus remove the unneeded `#sound-dai-cells`. Commit 9e72606cd2db ("arm64: dts: renesas: #sound-dai-cells is used when simple-card") updated the comment regarding usage of "#sound-dai-cells" in the SoC DTSI but missed to remove "#sound-dai-cells" from board DTS files. Fixes: 9e72606cd2db ("arm64: dts: renesas: #sound-dai-cells is used when simple-card") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/20241010135332.710648-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-11-03arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entryBryan Brattlof
The AM62Px reference board is capable of supplying 0v85 to the VDD_CORE which allows the Cortex-A53s to operate at 1.4GHz according to chapter 6.6 of the SoC's data sheet[0] . Append the 1.4Ghz entry to the OPP table to enable this frequency [0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-5-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62p: add opp frequenciesBryan Brattlof
One power management technique available to the Cortex-A53s is their ability to dynamically scale their frequency across the device's Operating Performance Points (OPP) The OPPs available for the Cortex-A53s on the AM62Px can vary based on the silicon variant used. The SoC variant is encoded into the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit the OPP entries the SoC supports. A table of all these variants can be found in its data sheet[0] for the AM62Px processor family. Add the OPP table into the SoC's fdti file along with the syscon node to describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect the SoC variant. [0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-4-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62a7-sk: add 1.4ghz opp entryBryan Brattlof
The AM62Ax reference board is capable of supplying 0v85 to the VDD_CORE which allows the Cortex-A53s to operate at 1.4GHz according to chapter 7.5 of the SoC's data sheet[0]. Append the 1.4Ghz entry to the OPP table to enable this OPP [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-3-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62a: add opp frequenciesBryan Brattlof
One power management technique available to the Cortex-A53s is their ability to dynamically scale their frequency across the device's Operating Performance Points (OPP) The OPPs available for the Cortex-A53s on the AM62Ax can vary based on the silicon variant used. The SoC variant is encoded into the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit to only OPP entries the variant supports. A table of all these variants can be found in it's data sheet[0] for the AM62Ax family. Add the OPP table into the SoC's fdti file along with the syscon node to describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect the SoC variant. [0] https://www.ti.com/lit/ds/symlink/am62a3.pdf Signed-off-by: Bryan Brattlof <bb@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> Link: https://lore.kernel.org/r/20241008132052.407994-2-d-gole@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62-verdin: Add Ivy carrier boardJoão Paulo Gonçalves
Add Toradex Verdin Ivy carrier board support. One notable feature of Ivy is the analog inputs. These inputs are multiplexed, allowing the same input to measure either voltage or current. For current measurements, a GPIO switch enables or disables the shunt resistor. This process is automatically managed by the Linux kernel using the IIO and MUX subsystems. Voltage measurement is always enabled, but the voltage measured by the ADC is scaled by a cascade voltage divider. In the device tree, the equivalent gain of the voltage divider is used, which can be calculated as follows: ------------ + | .-. R1=30K | | | | '-' |------------------- Analog Input (AIN) | | .-. .-. R2=10K | | R3=30K | | | | | | '-' '-' | | | |-------- | .-. + | R4=10K | | | | | ADC Input (Channels 0 and 1) | '-' - | | - -----------| |-------- === === GND GND Vin = Analog Input (AIN) Vout = ADC Input Rth = Thevenin Equiv. Resistance Vth = Thevenin Equiv. Voltage RL = Load Resistor R1 = 30K, R2 = 10K, R3 = 30K, R4 = 10K RL = R4 = 10K Rth = (R1 // R2) + R3 = 37500 Ohms Vth = (Vin * R2) / (R1 + R2) = Vin/4; Vout = (Vth * RL)/ (Rth + RL) = Vth/4.75 = Vin/19 Gain = Vout/Vin = 1/19 https://www.toradex.com/products/carrier-board/ivy-carrier-board Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240924120044.130913-4-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03arm64: dts: ti: k3-am62-verdin: add label to som adc nodeJoão Paulo Gonçalves
Add a label to ti-ads1015 node to make it easier to reference it from other nodes. Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20240924120044.130913-3-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-02arm64: vdso: Use only one single vvar mappingThomas Weißschuh
The vvar mapping is the same for all processes. Use a single mapping to simplify the logic and align it with the other architectures. In addition this will enable the move of the vvar handling into generic code. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Will Deacon <will@kernel.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/all/20241010-vdso-generic-base-v1-5-b64f0842d512@linutronix.de
2024-11-02arm64: vdso: Drop LBASE_VDSOThomas Weißschuh
This constant is always "0", providing no value and making the logic harder to understand. Also prepare for a consolidation of the vdso linkerscript logic by aligning it with other architectures. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/all/20241010-vdso-generic-base-v1-4-b64f0842d512@linutronix.de
generated by cgit (git 2.34.1) at 2025-09-24 16:43:34 +0000