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2025-03-06ARM: tegra: Switch DSI-B clock parent to PLLD on Tegra114Svyatoslav Ryhel
PLLD is usually used as parent clock for internal video devices, like DSI for example, while PLLD2 is used as parent for HDMI. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Link: https://lore.kernel.org/r/20250226105615.61087-3-clamor95@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-03-06Merge tag 'renesas-dts-for-v6.15-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.15 - Add support for the second and third Ethernet interfaces on the Gray Hawk Single development board, - Add Image Signal Processor helper block (FCPVX and VSPX) support for the R-Car V3U and V4M SoCs, - Add Watchdog and System Controller support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II EVK development board, - Add initial support for the Yuridenki-Shokai Kakip and MYIR Remi Pi boards, - Add support for the spare UART and PMOD serial ports on the RZ/G3S SMARC Carrier II board, - Add a CPU Operating Performance Points table for the RZ/G3S SoC, - Add boot phase tags on R-Car Gen2/3/4 and RZ/G2 boards, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.15-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits) ARM: dts: renesas: r9a06g032: Fix UART dma channel order arm64: dts: renesas: rzg2: Add boot phase tags arm64: dts: renesas: rcar: Add boot phase tags ARM: dts: renesas: rcar-gen2: Add boot phase tags arm64: dts: renesas: white-hawk-csi-dsi: Use names for CSI-2 data line orders arm64: dts: renesas: ulcb/kf: Use TDM Split Mode for capture arm64: dts: renesas: Add initial support for MYIR Remi Pi arm64: dts: renesas: r9a08g045: Add OPP table arm64: dts: renesas: r9a09g057: Enable SYS node arm64: dts: renesas: r9a09g047: Add SYS node arm64: dts: renesas: r9a08g045: Enable SYS node arm64: dts: renesas: r8a779f0: Disable rswitch ports by default arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches arm64: dts: renesas: r8a779g0: Restore sort order arm64: dts: renesas: s4sk: Fix ethernet0 alias for rswitch arm64: dts: renesas: spider-ethernet: Add ethernetN aliases for rswitch arm64: dts: renesas: s4sk: Access rswitch ports via phandles arm64: dts: renesas: spider-ethernet: Access rswitch ports via phandles ... Link: https://lore.kernel.org/r/cover.1740156747.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-03-06ARM: OMAP1: select CONFIG_GENERIC_IRQ_CHIPArnd Bergmann
When GENERIC_IRQ_CHIP is disabled, OMAP1 kernels fail to link: arm-linux-gnueabi-ld: arch/arm/mach-omap1/irq.o: in function `omap1_init_irq': irq.c:(.init.text+0x1e8): undefined reference to `irq_alloc_generic_chip' arm-linux-gnueabi-ld: irq.c:(.init.text+0x228): undefined reference to `irq_setup_generic_chip' arm-linux-gnueabi-ld: irq.c:(.init.text+0x2a8): undefined reference to `irq_gc_set_wake' arm-linux-gnueabi-ld: irq.c:(.init.text+0x2b0): undefined reference to `irq_gc_mask_set_bit' arm-linux-gnueabi-ld: irq.c:(.init.text+0x2b4): undefined reference to `irq_gc_mask_clr_bit' This has apparently been the case for many years, but I never caught it in randconfig builds until now, as there are dozens of other drivers that also 'select GENERIC_IRQ_CHIP' and statistically there is almost always one of them enabled. Fixes: 55b447744389 ("ARM: OMAP1: Switch to use generic irqchip in preparation for sparse IRQ") Link: https://lore.kernel.org/r/20250205121151.289535-1-arnd@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-03-06Merge tag 'imx-fixes-6.14' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 6.14: - A tqma8mpql board fix from Alexander Stein to correct vqmmc-supply for usdhc3 - A change from Joe Hattori to fix OF node leak in imx-scu driver probe - A soc-imx8m driver fix from Peng Fan unregister cpufreq and soc device in cleanup path - A couple of changes from Stefan Eichenberger to fix iMX6 Apalis poweroff and iMX8M verdin-dahlia sound-card descriptions * tag 'imx-fixes-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: freescale: imx8mm-verdin-dahlia: add Microphone Jack to sound card arm64: dts: freescale: imx8mp-verdin-dahlia: add Microphone Jack to sound card soc: imx8m: Unregister cpufreq and soc dev in cleanup path ARM: dts: imx6qdl-apalis: Fix poweroff on Apalis iMX6 arm64: dts: freescale: tqma8mpql: Fix vqmmc-supply firmware: imx-scu: fix OF node leak in .probe() Link: https://lore.kernel.org/r/Z8A+rihFV4K3l8QR@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-03-05arm: pgtable: fix NULL pointer dereference issueQi Zheng
When update_mmu_cache_range() is called by update_mmu_cache(), the vmf parameter is NULL, which will cause a NULL pointer dereference issue in adjust_pte(): Unable to handle kernel NULL pointer dereference at virtual address 00000030 when read Hardware name: Atmel AT91SAM9 PC is at update_mmu_cache_range+0x1e0/0x278 LR is at pte_offset_map_rw_nolock+0x18/0x2c Call trace: update_mmu_cache_range from remove_migration_pte+0x29c/0x2ec remove_migration_pte from rmap_walk_file+0xcc/0x130 rmap_walk_file from remove_migration_ptes+0x90/0xa4 remove_migration_ptes from migrate_pages_batch+0x6d4/0x858 migrate_pages_batch from migrate_pages+0x188/0x488 migrate_pages from compact_zone+0x56c/0x954 compact_zone from compact_node+0x90/0xf0 compact_node from kcompactd+0x1d4/0x204 kcompactd from kthread+0x120/0x12c kthread from ret_from_fork+0x14/0x38 Exception stack(0xc0d8bfb0 to 0xc0d8bff8) To fix it, do not rely on whether 'ptl' is equal to decide whether to hold the pte lock, but decide it by whether CONFIG_SPLIT_PTE_PTLOCKS is enabled. In addition, if two vmas map to the same PTE page, there is no need to hold the pte lock again, otherwise a deadlock will occur. Just add the need_lock parameter to let adjust_pte() know this information. Link: https://lkml.kernel.org/r/20250217024924.57996-1-zhengqi.arch@bytedance.com Fixes: fc9c45b71f43 ("arm: adjust_pte() use pte_offset_map_rw_nolock()") Signed-off-by: Qi Zheng <zhengqi.arch@bytedance.com> Reported-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Closes: https://lore.kernel.org/lkml/CAM1KZSmZ2T_riHvay+7cKEFxoPgeVpHkVFTzVVEQ1BO0cLkHEQ@mail.gmail.com/ Acked-by: David Hildenbrand <david@redhat.com> Tested-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Cc: Hugh Dickins <hughd@google.com> Cc: Muchun Song <muchun.song@linux.dev> Cc: Qi Zheng <zhengqi.arch@bytedance.com> Cc: Russel King <linux@armlinux.org.uk> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-03-04ARM: dts: microchip: sama7g5: add ADC hw trigger edge typeNayab Sayed
Set ADC trigger edge type property as interrupt edge rising value. Signed-off-by: Nayab Sayed <nayabbasha.sayed@microchip.com> Link: https://lore.kernel.org/r/20250304-sama7g5-hw-trigger-enable-v1-1-61b5618285f0@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-04irqchip/davinci-cp-intc: Remove public headerBartosz Golaszewski
There are no more users of irq-davinci-cp-intc.h (da830.c doesn't use any of its symbols). Remove the header and make the driver stop using the config structure. [ tglx: Mop up coding style ] Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250304131815.86549-1-brgl@bgdev.pl
2025-03-03ARM: dts: microchip: sama7d65: Add watchdog for sama7d65Ryan Wanner
Add watchdog timer support for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/05785a34b9181b7debb57c1896cc733bd3088c56.1740675317.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Enable shutdown controllerRyan Wanner
Enable shutdown controller to support shutdown and wake up. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/c31c40eb388b2fc0ad6ee17ed2e23bcd04e8e1c8.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add SFRBU support to sama7d65Ryan Wanner
Add SFRBU support to the SAMA7D65 SoC. This is required to change the power source for backup mode for the SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/dbc51f95f301c106c031fb93f84d0d847e818d91.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add RTC support for sama7d65Ryan Wanner
Add RTC support for the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/fa1587ffef21a8198317062c15d8eb5c3ca6187c.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: fixed conflict, keep nodes sorted by their addresses] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add Shutdown controller supportRyan Wanner
Add shutdown controller support for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/ffc76b757cd1ba4ca38947f8b30525b848aa8ad7.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: dts: microchip: sama7d65: Add Reset Controller to sama7d65 SoCRyan Wanner
Add Reset Controller support to SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/a9620ff11456a1ddfb9c289421606602193ce5b6.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: at91: pm: Enable ULP0/ULP1 for SAMA7D65Ryan Wanner
New clocks are saved to enable ULP0/ULP1 for SAMA7D65 because this SoC has a total of 9 main clocks that need to be saved for ULP0/ULP1 mode. Add mcks member to at91_pm_data, this will be used to determine how many main clocks need to be saved. In the pm_mcks variable will also make sure that no unnecessary clock settings are written during mck_ps_restore. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: adjusted the entry in pmc_infos[] array] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: at91: pm: Add Backup mode for SAMA7D65Ryan Wanner
Add config check that enables Backup mode for SAMA7D65 SoC. Add SHDWC_SR read to clear the status bits once finished exiting backup mode. This is only for SAMA7D65 SoCs. The SHDWC status register needs to be cleared after exiting backup mode to clear the wake up pin status. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/3a1f59af1ac9322b0203694b535d5d13120a31eb.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: dropped extra blank lines, use {} for multi-line statements that includes comments, s/PM/pm in commit title to have the same pattern accross all commits] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: at91: pm: add DT compatible support for sama7d65Ryan Wanner
Add support for SAMA7D65 new compatible strings in pm.c file for wakeup source IDs and PMC. This is the first bits of PM for this new SoC. PM depends on other patches. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> [nicolas.ferre@microchip.com: split patch and address only the pm.c changes] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/06b64869f2de4b499835d153411ba30512409168.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: add proper entry in pmc_infos[] for SAMA7D65 instead of using wrong data and fixing it in the next commits] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02ARM: at91: pm: fix at91_suspend_finish for ZQ calibrationLi Bin
For sama7g5 and sama7d65 backup mode, we encountered a "ZQ calibrate error" during recalibrating the impedance in BootStrap. We found that the impedance value saved in at91_suspend_finish() before the DDR entered self-refresh mode did not match the resistor values. The ZDATA field in the DDR3PHY_ZQ0CR0 register uses a modified gray code to select the different impedance setting. But these gray code are incorrect, a workaournd from design team fixed the bug in the calibration logic. The ZDATA contains four independent impedance elements, but the algorithm combined the four elements into one. The elements were fixed using properly shifted offsets. Signed-off-by: Li Bin <bin.li@microchip.com> [nicolas.ferre@microchip.com: fix indentation and combine 2 patches] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Tested-by: Ryan Wanner <Ryan.Wanner@microchip.com> Tested-by: Durai Manickam KR <durai.manickamkr@microchip.com> Tested-by: Andrei Simion <andrei.simion@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/28b33f9bcd0ca60ceba032969fe054d38f2b9577.1740671156.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-03-02crypto: lib/Kconfig - Hide arch options from userHerbert Xu
The ARCH_MAY_HAVE patch missed arm64, mips and s390. But it may also lead to arch options being enabled but ineffective because of modular/built-in conflicts. As the primary user of all these options wireguard is selecting the arch options anyway, make the same selections at the lib/crypto option level and hide the arch options from the user. Instead of selecting them centrally from lib/crypto, simply set the default of each arch option as suggested by Eric Biggers. Change the Crypto API generic algorithms to select the top-level lib/crypto options instead of the generic one as otherwise there is no way to enable the arch options (Eric Biggers). Introduce a set of INTERNAL options to work around dependency cycles on the CONFIG_CRYPTO symbol. Fixes: 1047e21aecdf ("crypto: lib/Kconfig - Fix lib built-in failure when arch is modular") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Arnd Bergmann <arnd@kernel.org> Closes: https://lore.kernel.org/oe-kbuild-all/202502232152.JC84YDLp-lkp@intel.com/ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-03-02crypto: arm/ghash - use the new scatterwalk functionsEric Biggers
Use scatterwalk_next() which consolidates scatterwalk_clamp() and scatterwalk_map(), and use scatterwalk_done_src() which consolidates scatterwalk_unmap(), scatterwalk_advance(), and scatterwalk_done(). Remove unnecessary code that seemed to be intended to advance to the next sg entry, which is already handled by the scatterwalk functions. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-28ARM: dts: microchip: fix faulty ohci/ehci node namesWolfram Sang
They should be named "usb@". Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250226084938.3436-10-wsa+renesas@sang-engineering.com [claudiu.beznea: replace at91 w/ microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-28ARM: dts: microchip: usb_a9263: fix wrong vendorWolfram Sang
The board was made by Calao, not by Atmel. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20250226084938.3436-9-wsa+renesas@sang-engineering.com [claudiu.beznea: replaced at91 w/ microchip in commit title] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-28ARM: dts: amlogic: meson8b: switch to the new PWM controller bindingMartin Blumenstingl
Use the new PWM controller binding which now relies on passing all clock inputs available on the SoC (instead of passing the "wanted" clock input for a given board). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20241227212514.1376682-3-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-02-28ARM: dts: amlogic: meson8: switch to the new PWM controller bindingMartin Blumenstingl
Use the new PWM controller binding which now relies on passing all clock inputs available on the SoC (instead of passing the "wanted" clock input for a given board). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20241227212514.1376682-2-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-02-27ARM: dts: stm32: add usr3 LED node to stm32f769-discoDario Binacchi
As indicated by the board silkscreen, there are three user LEDs. Add the missing one. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250217114513.1098844-2-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-27ARM: dts: stm32: rename LEDs nodes for stm32f769-discoDario Binacchi
Associate the LED node name with the corresponding board silkscreen for more precise identification. In fact, the board has a total of seven LEDs, some of which are user-controllable (i. e. usr{1,2,3}), while others are directly controlled by hardware (e. g. power, overcurrent, ...). All these LEDs are either green or red, so using the names led-green and led-red for the two LEDs mapped in the DTS does not simplify their identification on the board. Moreover, this patch is a prerequisite for adding the usr3 LED, which has not been included in the DTS. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250217114513.1098844-1-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-27ARM: dts: stm32: add push button to stm32f746 Discovery boardDario Binacchi
Add node for user push button. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250217114332.1098482-2-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-27ARM: dts: stm32: add led to stm32f746 Discovery boardDario Binacchi
Add node for the user led. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/r/20250217114332.1098482-1-dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-26ARM: dts: stm32: Add Priva E-Measuringbox devicetreeRoan van Dijk
Introduce the devicetree for the Priva E-Measuringbox board (stm32mp133c-prihmb), based on the STM32MP133 SoC. Signed-off-by: Roan van Dijk <roan@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20250203085820.609176-5-o.rempel@pengutronix.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-26ARM: dts: stm32: Add thermal support for STM32MP131Roan van Dijk
Add thermal zone configuration and sensor node for STM32MP131 SoC. Signed-off-by: Roan van Dijk <roan@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20250203085820.609176-4-o.rempel@pengutronix.de Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-02-25ARM: dts: bcm2711: PL011 UARTs are actually r1p5Phil Elwell
The ARM PL011 UART instances in BCM2711 are r1p5 spec, which means they have 32-entry FIFOs. The correct periphid value for this is 0x00341011. Thanks to N Buchwitz for pointing this out. Signed-off-by: Phil Elwell <phil@raspberrypi.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250223125614.3592-2-wahrenst@gmx.net Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-02-25ARM: dts: bcm2711: Fix xHCI power-domainStefan Wahren
During s2idle tests on the Raspberry CM4 the VPU firmware always crashes on xHCI power-domain resume: root@raspberrypi:/sys/power# echo freeze > state [ 70.724347] xhci_suspend finished [ 70.727730] xhci_plat_suspend finished [ 70.755624] bcm2835-power bcm2835-power: Power grafx off [ 70.761127] USB: Set power to 0 [ 74.653040] USB: Failed to set power to 1 (-110) This seems to be caused because of the mixed usage of raspberrypi-power and bcm2835-power at the same time. So avoid the usage of the VPU firmware power-domain driver, which prevents the VPU crash. Fixes: 522c35e08b53 ("ARM: dts: bcm2711: Add BCM2711 xHCI support") Link: https://github.com/raspberrypi/linux/issues/6537 Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250201112729.31509-1-wahrenst@gmx.net Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-02-25ARM: dts: imx7d-sdb: Complete WM8960 power suppliesChancel Liu
WM8960 has the following power supplies: - AVDD - DBVDD - DCVDD - SPKVDD1 - SPKVDD2 Add new audio regulators to reflect the schematic and complete missed power supplies. Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-25ARM: dts: imx6ul-14x14-evk: Complete WM8960 power suppliesChancel Liu
WM8960 has the following power supplies: - AVDD - DBVDD - DCVDD - SPKVDD1 - SPKVDD2 Add new audio regulators to reflect the schematic and complete missed power supplies. Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-24ARM: dts: microchip: sama7d65: Enable DMAsRyan Wanner
Enable DMA interface for sama7d65_curiosity board. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/e233ab028123bd91b1de7b0f02eb966d719cc0af.1739555984.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24ARM: dts: microchip: sama7d65: Add DMAs to sama7d65 SoCRyan Wanner
Add DMAs to the SAMA7D65 SoC device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com [claudiu.beznea: dropped extra space in reg property of dma0] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24ARM: dts: microchip: sama7d65: Add chipID for sama7d65Ryan Wanner
Add chipID for the sama7d65 SoC to the device tree. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/14e6cafb64df345e6bd79ac96961248cc266770c.1739555984.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-23ARM: dts: imx28-sps1: Fix GPIO LEDs descriptionFabio Estevam
According to leds-gpio.yaml, the LED nodes should not contain unit addresses. Remove them. Also, 'default-trigger' is not a valid property. Change it to 'linux,default-trigger'. These changes fix the following dt-schema warnings: led@1: Unevaluated properties are not allowed ('reg' was unexpected) led@2: Unevaluated properties are not allowed ('reg' was unexpected) led@3: Unevaluated properties are not allowed ('default-trigger', 'reg' were unexpected) leds: '#address-cells', '#size-cells' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-23ARM: dts: vf610-bk4: Use the more specific "lwn,bk4-spi"Fabio Estevam
Currently, the compatible string used for the spidev device is "lwn,bk4", which is the same as the board compatible string documented at fsl.yaml. This causes several dt-schema warnings: make dtbs_check DT_SCHEMA_FILES=fsl.yaml ... ['lwn,bk4'] is too short 'lwn,bk4' is not one of ['tq,imx8dxp-tqma8xdp-mba8xx'] 'lwn,bk4' is not one of ['tq,imx8qxp-tqma8xqp-mba8xx'] 'lwn,bk4' is not one of ['armadeus,imx1-apf9328', 'fsl,imx1ads'] Use a more specific "lwn,bk4-spi" compatible string to fix the problem. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-22ARM: dts: mba6ul: change sound card model nameMarkus Niebel
The card name for ALSA is generated from the model name string and is limited to 16 characters. Use a shorter name to prevent cutting the name. Since nearly all starter kit mainboards for i.MX based SoM by TQ-Systems use the same codec with the same routing on board it is a good idea to use the same mode name for the sound card. This allows sharing a default asound.conf in BSP over all the kits. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-22ARM: dts: imx7-mba7: change sound card model nameMarkus Niebel
The card name for ALSA is generated from the model name string and is limited to 16 characters. Use a shorter name to prevent cutting the name. Since nearly all starter kit mainboards for i.MX based SoM by TQ-Systems use the same codec with the same routing on board it is a good idea to use the same mode name for the sound card. This allows sharing a default asound.conf in BSP over all the kits. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-22ARM: dts: imx6qdl-mba6: change sound card model nameMarkus Niebel
The card name for ALSA is generated from the model name string and is limited to 16 characters. Use a shorter name to prevent cutting the name. Since nearly all starter kit mainboards for i.MX based SoM by TQ-Systems use the same codec with the same routing on board it is a good idea to use the same mode name for the sound card. This allows sharing a default asound.conf in BSP over all the kits. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-22crypto: lib/Kconfig - Fix lib built-in failure when arch is modularHerbert Xu
The HAVE_ARCH Kconfig options in lib/crypto try to solve the modular versus built-in problem, but it still fails when the the LIB option (e.g., CRYPTO_LIB_CURVE25519) is selected externally. Fix this by introducing a level of indirection with ARCH_MAY_HAVE Kconfig options, these then go on to select the ARCH_HAVE options if the ARCH Kconfig options matches that of the LIB option. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202501230223.ikroNDr1-lkp@intel.com/ Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-21ARM: dts: renesas: r9a06g032: Fix UART dma channel orderGeert Uytterhoeven
make dtbs_check: arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:0: 'tx' was expected from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dtb: serial@50000000: dma-names:1: 'rx' was expected from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# ... The DT bindings specify a fixed order of the channels in the dmas and dma-names properties, while the Linux driver does not care. Get rid of the warnings by changing the order in the DTS to match the bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/bcb604ad6e567de4e0410756ba840c82a32ff7d3.1739525488.git.geert+renesas@glider.be
2025-02-21ARM: dts: renesas: rcar-gen2: Add boot phase tagsMarek Vasut
bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to describe various node usage during boot phases with DT. Add bootph-all for all nodes that are used in the bootloader on Renesas R-Car Gen2 SoCs. All SoC require CPG clock and its input clock, RST Reset, PFC pin control and PRR ID register access during all stages of the boot process, those are marked using bootph-all property, and so is the SoC bus node which contains these IP. Each board console UART is also marked as bootph-all to make it available in all stages of the boot process. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250209180616.160253-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-21mm/memremap: Pass down MEMREMAP_* flags to arch_memremap_wb()Kirill A. Shutemov
x86 version of arch_memremap_wb() needs the flags to decide if the mapping has to be encrypted or decrypted. Pass down the flag to arch_memremap_wb(). All current implementations ignore the argument. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: linux-mm@kvack.org Link: https://lore.kernel.org/r/20250217163822.343400-2-kirill.shutemov@linux.intel.com
2025-02-21arm: vdso: Switch to generic storage implementationThomas Weißschuh
The generic storage implementation provides the same features as the custom one. However it can be shared between architectures, making maintenance easier. Co-developed-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Nam Cao <namcao@linutronix.de> Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250204-vdso-store-rng-v3-11-13a4669dfc8c@linutronix.de
2025-02-21vdso: Rename included MakefileThomas Weißschuh
As the Makefile is included into other Makefiles it can not be used to define objects to be built from the current source directory. However the generic datastore will introduce such a local source file. Rename the included Makefile so it is clear how it is to be used and to make room for a regular Makefile in lib/vdso/. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250204-vdso-store-rng-v3-4-13a4669dfc8c@linutronix.de
2025-02-20ARM: dts: nxp: vf: Align GPIO hog name with bindingsKrzysztof Kozlowski
Bindings expect GPIO hog names to end with 'hog' suffix, so correct it to fix dtbs_check warning: vf610-zii-dev-rev-c.dtb: eth0_intrp: $nodename:0: 'eth0_intrp' does not match '^.+-hog(-[0-9]+)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-18ARM: dts: imx5: Fix the CCM interrupts descriptionFabio Estevam
On the i.MX5 chips the peripheral interrupts are represented directly only by their interrupt numbers. The CCM nodes are not following this format and cause the following dt-schema warnings: ccm@73fd4000: interrupts: [[0], [71], [4], [0], [72], [4]] is too long Fix it by passing only the two interrupt numbers. Run-time tested in on an imx53-qsb board. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-02-18ARM: dts: vfxxx: Fix the CAAM job ring node namesFabio Estevam
According to fsl,sec-v4.0.yaml, the job ring node names should be 'jr'. Change them to fix the following dt-schema warnings: crypto@400f0000: 'jr0@1000', 'jr1@2000' do not match any of the regexes: '^jr@[0-9a-f]+$', '^rtic@[0-9a-f]+$', 'pinctrl-[0-9]+' Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
generated by cgit (git 2.34.1) at 2025-07-24 16:14:14 +0000