summaryrefslogtreecommitdiff
path: root/arch/microblaze/kernel/hw_exception_handler.S
AgeCommit message (Collapse)Author
2014-01-27microblaze: Fix compilation error for BS=0Michal Simek
This bug was introduced by: "microblaze: Do not used hardcoded value in exception handler" (sha1: 9f78d3b5ab97a22a7e836312c495804ee4bca4ab) System without barrel shifter are pretty rare that's why this bug has been fixed so late. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2013-11-06microblaze: Remove unused NO_MMU Kconfig parameterMichael Opdenacker
This removes the NO_MMU Kconfig parameter, which was no longer used anywhere in the source code and Makefiles. This also updates a comment refering to this parameter. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2012-10-04microblaze: Remove additional andi which has been already doneMichal Simek
Remove one additional step. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-10-04microblaze: Use predefined macro for ESR_DIZMichal Simek
Just use macro instead of hardcoded value. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-10-04microblaze: Support 4k/16k/64k pagesMichal Simek
Add support for page size which is supported by MMU. Remove 8k and 32k page size because they are not supported by MMU. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-10-04microblaze: Do not used hardcoded value in exception handlerMichal Simek
Use predefined macros to support more page sizes. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-03-23microblaze: Handle TLB skip size dynamicallyMichal Simek
This patch fix the problem with rootfs on JFFS2 with early printk console turned on. The origin version used TLB63 for temporary early printk mapping. The code expect that kernel is not able to use all 64 TLB entries till early printk console is remapped by ioremap. After that temporary mapping on TLB63 is silently lost. This expectation give the opportunity to have early console pretty early. Microblaze systems with JFFS2 rootfs with early printk console turned on used more than 64 TLB entries before kernel can remap early console. Based on that kernel does access to bad area because early printk mapping is rewritten. This patch introduces tlb_skip variable which dynamically stores number of skipped TLB entries from the TLB0. skip_tlb=2 means that TLB0 and TLB1 should be skipped. MICROBLAZE_TLB_SKIP defines how many TLB is skipped at the kernel start. They can be used for user purpose. TLB 63 is used for temporary LMB mapping (MICROBLAZE_LMB_TLB_ID). Also clean TLBLO when kernel starts. For specific kernel sizes kernel can use just one TLB. Detect this case and use the second TLB for general purpose. Change _tlbia function to flush TLB entries from tlb_skip to TLB_SIZE. Export tlb_skip size through debugfs. Signed-off-by: Michal Simek <monstr@monstr.eu>
2012-03-23microblaze: Introduce TLB skip sizeMichal Simek
TLB skip size direct how many TLBs is skipped. Currently TLB0 and TLB1 are used for Linux kernel mapping that's why their are skipped. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-07-25microblaze: Fix unaligned value saving to the stack for system with MMUMichal Simek
Several registers weren't saved correctly to the stack. Unaligned expection for system with MMU stores value in ex_tmp_data_loc_X address which is load to registers r3. The next step is to move this value from r3 to a destination register which caused unaligned exception. For several registers this value was directly moved to the register. For example for r28: by "or r28, r0, r3" but register r28 was rewritten when kernel returns from exception handler by value saved on stack. This patch changed r3 saving to the correct address on the stack. For example for r28: by "swi r3, r1, 4 * 28" When kernel returns from the exception handler, correct value is restored. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Do not use "la" pseudo instruction - use addik insteadMichal Simek
"la" pseudo instruction is only translation to "addik". Use directly "addik" which is described in the MB reference guide. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Remove r0_ram pointer and PTO alignmentMichal Simek
r0_ram pool was used for saving/restoring register content if hw exception happen. This poll was replaced by pt_pool_space with PT_SIZE size. Based on this change SAVE_STATE_ARG_SPACE was removed which caused that PTO offset is zero that's why is also removed. r0_ram space was used as scratchpad by v850. In early Microblaze Linux developing phase was this part of code blindly copied. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Do not use r0_ram space for hw exception debuggingMichal Simek
Remove hw exception counting space from r0_ram. Use special exception_debug_table poll for exception statistic. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-01-28microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1Michal Simek
Unaligned code use shift for finding register operand. There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1 by ori rD, r0, (1 << imm); \ idivu rD, rD, rA but if rD is equal rA then ori instruction rewrite value which should be devide. The patch remove this macro which use idivu instruction because idivu takes 32/34 cycles. The highest shifting is 20 which takes 20 cycles. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-01-03microblaze: Fix unaligned exception for little endian platformMichal Simek
Half word unaligned accesses need to be fixed. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04microblaze: Add stack unwinderSteven J. Magnani
Implement intelligent backtracing by searching for stack frame creation, and emitting only return addresses. Use print_hex_dump() to display the entire binary kernel stack. Limitation: MMU kernels are not currently able to trace beyond a system trap (interrupt, syscall, etc.). It is the intent of this patch to provide infrastructure that can be extended to add this capability later. Changes from V1: * Removed checks in find_frame_creation() that prevented location of the frame creation instruction in heavily optimized code * Various formatting/commenting/file location tweaks per review comments * Dropped Kconfig option to enable STACKTRACE as something logically separate Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
2010-04-01microblaze: Use instruction with delay slotMichal Simek
Sync labels. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01microblaze: Remove additional resr and rear loadingMichal Simek
RESR and REAR uses the same regs in whole file. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01microblaze: Change register usage for ESR and EARMichal Simek
This change synchronize register usage in code. ESR = R4 EAR = R3 Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01microblaze: Prepare work for optimization in exception codeMichal Simek
Any sync branch must follow mts instructions not mfs. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-04-01microblaze: Add DEBUG optionMichal Simek
Disable debug option in asm code. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-05microblaze: Clear sticky FSR register after saving it to func parametrMichal Simek
Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear it for noMMU kernel. This one do it for MMU. Correct noMMU version Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-09-22microblaze: Clear sticky FSR register after generating exception signalsJohn Williams
FSR is sticky, so after the userspace exception/signal generation, clear it ready for next time. Signed-off-by: John Williams <john.williams@petalogix.com>
2009-09-22microblaze: Save and restore msr in hw exceptionMichal Simek
I thought that this part of code could be removed because just save and restore MSR but any code can't change it. But seems to that any part of code works with this information. This patch solved problem with allocation. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Support unaligned address for put/get_user macrosMichal Simek
This patch add support for cases where load/store instruction in put/get_user macro gets unaligned pointer to data and this address is not valid. I prevent all cases which can failed. I had to disable first stage of unaligned handler which is used only for noMMU kernel and the whole work is done when interrupt is enabled. You have enable HW support for detect unaligned access in Microblaze. This patch fixed three LTP tests: getpeername01, getsockname01, socketpair01 Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-05-26microblaze_mmu_v2: Update exception handling - MMU exceptionMichal Simek
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27microblaze_v8: exception handlingMichal Simek
Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
generated by cgit (git 2.34.1) at 2024-06-26 23:57:54 +0000