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2013-02-17MIPS: ath79: simplify ath79_gpio_function_* routinesGabor Juhos
Make ath79_gpio_function_{en,dis}able to be wrappers around ath79_gpio_function_setup. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4871/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17MIPS: ath79: fix GPIO function selection for AR934x SoCsGabor Juhos
GPIO function selection is not working on the AR934x SoCs because the offset of the function selection register is different on those. Add a helper routine which returns the correct register address based on the SoC type, and use that in the 'ath79_gpio_function_*' routines. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4870/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-31USB: EHCI: remove ehci_port_power() routineAlan Stern
This patch (as1623) removes the ehci_port_power() routine and all the places that call it. There's no reason for ehci-hcd to change the port power settings; the hub driver takes care of all that stuff. There is one exception: When the controller is resumed from hibernation or following a loss of power, the ports that are supposed to be handed over to a companion controller must be powered on first. Otherwise the handover won't work. This process is not visible to the hub driver, so it has to be handled in ehci-hcd. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-01MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLsGabor Juhos
Besides the CPU and DDR PLLs, the CPU and DDR frequencies can be derived from other PLLs in the SRIF block on the AR934x SoCs. The current code does not checks if the SRIF PLLs are used and this can lead to incorrectly calculated CPU/DDR frequencies. Fix it by calculating the frequencies from SRIF PLLs if those are used on a given board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: <stable@vger.kernel.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-01MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934xGabor Juhos
The current dividers in the code are wrong and this leads to broken CPU frequency calculation on boards where the fractional part is used. For example, if the SoC is running from a 40MHz reference clock, refdiv=1, nint=14, outdiv=0 and nfrac=31 the real frequency is 579.375MHz but the current code calculates 569.687MHz instead. Because the system time is indirectly related to the CPU frequency the broken computation causes drift in the system time. The correct divider is 2^6 for the CPU PLL and 2^10 for the DDR PLL. Use the correct values to fix the issue. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4305/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-28MIPS: ath79: register USB host controller on the DB120 boardGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4173/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28MIPS: ath79: add USB platform setup code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4172/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28MIPS: ath79: use a helper function for USB resource initializationGabor Juhos
This improves code readability, and ensures that all resource fields will be initialized correctly. Additionally, it helps to reduce the size of the kernel image by using uninitialized resource variables. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4171/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-17MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240Gabor Juhos
The currently assigned IRQ number to the OHCI controller is incorrect for the AR7240 SoC, and that leads to the following error message from the OHCI driver: ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ath79-ohci ath79-ohci: Atheros built-in OHCI controller ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1 ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000 hub 1-0:1.0: USB hub found hub 1-0:1.0: 1 port detected usb 1-1: new full-speed USB device number 2 using ath79-ohci ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ. Fix this by using the correct IRQ number. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4168/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: ath79: Fix number of GPIO lines for AR724[12]Gabor Juhos
The AR724[12] SoCs have more GPIO lines than the AR7240. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Cc: linux-mips@linux-mips.org Patchwork: https://http://patchwork.linux-mips.org/patch/4167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add initial support for the Atheros DB120 boardGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3517/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add PCI registration code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3516/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add PCI_AR724X Kconfig symbolGabor Juhos
The AR724X specific PCI code can be used for the AR934X SoCs, however it can be selected only if SOC_AR724X is set. Introduce a new Kconfig symbol in order to be able to use the code for AR934X as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3514/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add WMAC registration code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3513/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: register UART device for AR934X SoCsGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3512/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3511/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add IRQ handling code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3510/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: rework IP2/IP3 interrupt handlingGabor Juhos
The current implementation assumes that flushing the DDR writeback buffer is required for IP2/IP3 interrupts, however this is not true for all SoCs. Use SoC specific IP2/IP3 handlers instead of flushing the buffers in the dispatcher code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add GPIO support code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3508/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add clock initialization code for AR934XGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add SoC detection code for AR934XGabor Juhos
Also add 'soc_is_ar934[124x]' helper functions and a Kconfig symbol for the AR934X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: sort case statements in ath79_detect_sys_typeGabor Juhos
Sort the case statements alphabetically in order to improve readability. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3505/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add early_printk support for AR934XGabor Juhos
The patch allows to see kernel messages on AR934X SoCs in early boot stage. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Cc: linux-mips@linux-mips.org Cc: mcgrof@infradead.org Patchwork: https://patchwork.linux-mips.org/patch/3504/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: update copyright headers of PCI related filesGabor Juhos
Add copyright records according to the recent changes in the PCI code. Also fix up the descriptions. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3503/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: register PCI controller on the PB44 boardGabor Juhos
The PB44 reference board has two miniPCI slots. Register the PCI controller to make those usable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: remove ar724x_pci_add_data functionGabor Juhos
The variables set by this function are not used anymore. Remove the function and the relevant variables as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3501/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: allow to use SoC specific PCI IRQ mapsGabor Juhos
The PCI controllers in the AR71XX and in the AR724X SoCs are different, and both of them uses different IRQ wiring. The patch modifies the 'pcibios_map_irq' function in order to allow to use different IRQ maps for the different SoCs. The patch also adds a function, which lets the board setup code to override the default IRQ map. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add support for the PCI host controller of the AR71XX SoCsGabor Juhos
The Atheros AR71XX SoCs have a built-in PCI Host Controller. This patch adds a driver for that, and modifies the relevant files in order to allow to register the PCI controller from board specific setup. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3498/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: allow to use board specific pci_plat_dev_init functionsGabor Juhos
Th current implementation causes NULL pointer dereference if 'pci_data' is not set: pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit] pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI address [0x10000000-0x1000ffff]) CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4 Oops[#1]: Cpu 0 $ 0 : 00000000 80420000 00000000 00000000 $ 4 : 00000000 00000000 00000001 00000001 $ 8 : 00000001 0000032c 81c54700 00000001 $12 : 0000032d 0000000f 00000000 ffffffff $16 : 81c14c00 00000001 802dac74 80195f98 $20 : 802ea050 00000000 00000000 00000000 $24 : 00000003 800617f0 $28 : 81c20000 81c21e70 00000000 802e78a4 Hi : 00000000 Lo : 4190ab00 epc : 802daca0 0x802daca0 Not tainted ra : 802e78a4 0x802e78a4 Status: 1000c003 KERNEL EXL IE Cause : 00800008 BadVA : 00000000 PrId : 00019374 (MIPS 24Kc) Modules linked in: Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000) Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000 802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290 80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000 00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000 00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000 This can be avoided by calling the 'ar724x_pci_add_data' function from the board specific setup code. However it makes no sense to use that function for every board, especially when the board does not needs to set the platform_data field of any PCI device. The patch allows the board setup code to specify a board specific function if that is required. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.cGabor Juhos
Remove a superfluous ifdef around an include. Also reorganize the board setup code a bit, so another ifdef can be removed. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3497/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add PCI IRQ handling code for AR724X SoCsGabor Juhos
The PCI Host Controller of the AR724x SoC has a built-in IRQ controller. The current code does not supports that, so the IRQ lines wired to this controller are not usable. This leads to failed 'request_irq' calls: ath9k 0000:00:00.0: request_irq failed ath9k: probe of 0000:00:00.0 failed with error -89 This patch adds support for the IRQ controller in order to make PCI IRQs work. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: fix a wrong IRQ numberGabor Juhos
The Ubiquiti XM board setup code uses an invalid IRQ number, because it if above of NR_IRQS. This leads to failed 'request_irq' calls: ath9k 0000:00:00.0: request_irq failed ath9k: probe of 0000:00:00.0 failed with error -22 Preserve some IRQ numbers for the built-in IRQ controller of PCI host controllers in the AR71XX/AR724X SoCs, and use the correct IRQ number in the board setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: replace ath724x to ar724xGabor Juhos
Replace the 'ath724x' to 'ar724x' in function, variable and structure names to reflect the name of the real SoC. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: René Bolldorf <xsecute@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3490/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: add a common PCI registration functionGabor Juhos
The current code unconditionally registers the AR724X specific PCI controller, even if the kernel is running on a different SoC. Add a common function for PCI controller registration, and only register the AR724X PCI controller if the kernel is running on an AR724X SoC. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3488/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: rename pci-ath724x.hGabor Juhos
The declared function in this header file is used by the ath79 platform code only. Move the header to the platform directory. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: René Bolldorf <xsecute@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3486/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: separate common PCI codeGabor Juhos
The 'pcibios_map_irq' and 'pcibios_plat_dev_init' are common functions and only instance one of them can be present in a single kernel. Currently these functions can be built only if the CONFIG_SOC_AR724X option is selected. However the ath79 platform contain support for the AR71XX SoCs,. The AR71XX SoCs have a differnet PCI controller, and those will require a different code. Move the common PCI code into a separeate file in order to be able to use that with other SoCs as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: René Bolldorf <xsecute@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15MIPS: ath79: Use kmemdup rather than duplicating its implementationThomas Meyer
The semantic patch that makes this change is available in scripts/coccinelle/api/memdup.cocci. Signed-off-by: Thomas Meyer <thomas@m3y3r.de> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3483/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-04-27MIPS: ath79: fix AR933X WMAC reset codeGabor Juhos
The current code puts the built-in WMAC device of the AR933X SoCs into reset instead of starting it. This causes a hard lock on AR933X based boards when the wireless driver tries to access the device. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: stable@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3484/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-03-15USB: use generic platform driver on ath79Hauke Mehrtens
The ath79 usb driver doesn't do anything special and is now converted to the generic ehci and ohci driver. This was tested on a TP-Link TL-WR1043ND (AR9132) Acked-by: Gabor Juhos <juhosg@openwrt.org> CC: Imre Kaloz <kaloz@openwrt.org> CC: linux-mips@linux-mips.org CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-20MIPS: ATH79: Avoid a kernel bug on AR913XGabor Juhos
Wireless mac registration causes a BUG on AR913X SoCs due to a missing 'else'. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3182/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-01-11Merge branches 'next/ar7', 'next/ath79', 'next/bcm63xx', 'next/bmips', ↵Ralf Baechle
'next/cavium', 'next/generic', 'next/kprobes', 'next/lantiq', 'next/perf' and 'next/raza' into mips-for-linux-next
2011-12-07MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.cGabor Juhos
Rename the file as a last step of the 'ar913x' removal changes. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3034/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.hGabor Juhos
The 'ar913x' part was removed from the common variable and function names, so remove that from the relevant header file name as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3033/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Register the wireless MAC device on the AP121 boardGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3032/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMACGabor Juhos
The ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific wireless MAC registration code. The registration code now supports the AR933X SoCs as well. Rename the option to reflect the changes. Also make the new option depends on SOC_AR933X. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3031/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Add AR933x specific WMAC setup codeGabor Juhos
The wireless MAC of the AR933x SoCs uses different base address, and requires different setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3030/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Separate AR913x SoC specific WMAC setup codeGabor Juhos
The device registration code can be shared between the different SoCs, but the required setup code varies Move AR913x specific setup code into a separate function in order to make adding support for another SoCs easier. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3029/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Remove 'ar913x' from common variable and function namesGabor Juhos
The wireless MAC specific variables and the registration code can be shared between multiple SoCs. Remove the 'ar913x' part from the function and variable names to avoid confusions. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3028/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07MIPS: ath79: Store the SoC revision in a global variableGabor Juhos
Knowing the exact revision of the SoC is required to make runtime decisions in various code paths. We have determined the SoC revision already, so we only need to store that in a global variable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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