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2024-06-21MIPS: dts: loongson: Add ISA nodeJiaxun Yang
ISA node is required by Loongson64 platforms to initialize PIO support. Kernel will hang at boot without ISA node. Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-21MIPS: dts: loongson: Fix GMAC phy nodeJiaxun Yang
phy-mode should be rgmii-id to match hardware configuration. Also there should be a phy-handle to reference phy node. Fixes: f8a11425075f ("MIPS: Loongson64: Add GMAC support for Loongson-2K1000") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-21MIPS: dts: loongson: Fix ls2k1000-rtc interruptJiaxun Yang
The correct interrupt line for RTC is line 8 on liointc1. Fixes: e47084e116fc ("MIPS: Loongson64: DTS: Add RTC support to Loongson-2K1000") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-21MIPS: dts: loongson: Fix liointc IRQ polarityJiaxun Yang
All internal liointc interrupts are high level triggered. Fixes: b1a792601f26 ("MIPS: Loongson64: DeviceTree for Loongson-2K1000") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-21MIPS: Loongson64: Remove memory node for builtin-dtbJiaxun Yang
Builtin DTBS should never contain memory node as memory is going to be managed by LEFI interface. Remove memory node to prevent confliction. Fixes: b1a792601f26 ("MIPS: Loongson64: DeviceTree for Loongson-2K1000") Cc: stable@vger.kernel.org Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-11MIPS: Loongson64: DTS: Fix PCIe port nodes for ls7aJiaxun Yang
Add various required properties to silent warnings: arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:116.16-297.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider arch/mips/boot/dts/loongson/loongson64_2core_2k1000.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2024-06-11MIPS: Loongson64: DTS: Fix msi node for ls7aJiaxun Yang
Add it to silent warning: arch/mips/boot/dts/loongson/ls7a-pch.dtsi:68.16-416.5: Warning (interrupt_provider): /bus@10000000/pci@1a000000: '#interrupt-cells' found, but node is not an interrupt provider arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts:32.31-40.4: Warning (interrupt_provider): /bus@10000000/msi-controller@2ff00000: Missing '#interrupt-cells' in interrupt provider arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dtb: Warning (interrupt_map): Failed prerequisite 'interrupt_provider' Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-12-13MIPS: dts: loongson: drop incorrect dwmac fallback compatibleKrzysztof Kozlowski
Device binds to proper PCI ID (LOONGSON, 0x7a03), already listed in DTS, so checking for some other compatible does not make sense. It cannot be bound to unsupported platform. Drop useless, incorrect (space in between) and undocumented compatible. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-06-26MIPS: Loongson64: DTS: Add RTC support to Loongson-2K1000Binbin Zhou
The module is now supported, enable it. Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-06-26MIPS: Loongson64: DTS: Add RTC support to LS7A PCHBinbin Zhou
The RTC module is now supported, enable it. Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-01-02MIPS: Loongson64: DTS: Add pm block node for Loongson-2K1000Qing Zhang
The module is now supported, enable it. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-07-01Merge tag 'mips_5.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for OpeneEmbed SOM9331 board - Ingenic fixes/improvments - other fixes and cleanups * tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (39 commits) MIPS: Fix PKMAP with 32-bit MIPS huge page support MIPS: CI20: Add second percpu timer for SMP. MIPS: CI20: Reduce clocksource to 750 kHz. MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. dt-bindings: clock: Add documentation for MAC PHY control bindings. MIPS: X1830: Respect cell count of common properties. MIPS: set mips32r5 for virt extensions MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops MIPS: MT extensions are not available on MIPS32r1 mips/kvm: Use BUG_ON instead of if condition followed by BUG MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource() MIPS: add PMD table accounting into MIPS'pmd_alloc_one MIPS: Loongson64: fix spelling of SPDX tag MIPS: ingenic: rs90: Add dedicated VRAM memory region MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B) MIPS: boot: Support specifying UART port on Ingenic SoCs ...
2021-06-21MIPS: Loongson64: fix spelling of SPDX tagTom Rix
checkpatch looks for SPDX-License-Identifier. So change the '_' to '-' Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-06-18MIPS: Loongson64: DTS: Add GMAC support for LS7A PCHQing Zhang
The GMAC module is now supported, enable it. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-06-18MIPS: Loongson64: Add GMAC support for Loongson-2K1000Qing Zhang
The GMAC module is now supported, enable it. Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-05-27mips: dts: loongson: fix DTC unit name warningszhaoxiao
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-05-27mips: dts: loongson: fix DTC unit name warningszhaoxiao
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-05-27mips: dts: loongson: fix DTC unit name warningszhaoxiao
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-05-27mips: dts: loongson: fix DTC unit name warningszhaoxiao
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64g-package.dtsi:42.30-49.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e0: simple-bus unit address format error, expected "1fe00100" arch/mips/boot/dts/loongson/loongson64g-package.dtsi:51.30-59.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e8: simple-bus unit address format error, expected "1fe00110" Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-05-27mips: dts: loongson: fix DTC unit name warningszhaoxiao
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:26.9-32.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-05-11MIPS:DTS:Correct device id of pcie for Loongnon-2KXiaochuan Mao
from Loongson-2K user manual know that Loongson-2K have two pcie controller pcie0 and pcie1, pcie0 have four port named port0~port3 and pcie1 have 2 port named port0~port1. the device id of port0 is 7a19 in each pcie controller and others are 7a09. Signed-off-by: Xiaochuan Mao <maoxiaochuan@loongson.cn> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-23MIPS:DTS:Correct the license for Loongson-2Kxiaochuan mao
make license from GPL3.0 to GPL2.0 Signed-off-by: xiaochuan mao <maoxiaochuan@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-23MIPS:DTS:Fix label name and interrupt number of ohci for Loongson-2Kxiaochuan mao
from Loongson-2K1000 user manual know that under pci bus the device num is 4, function number is 2 and register is 0x2200 is ohci. the ohci interrupt number is 51. because Loongson-2K1000 has 64 interrupt sources, 0-31 correspond to the device tree liointc0 device node, and the other correspond to liointc1 node. so it should be number 19 correspon to liointc1. Signed-off-by: xiaochuan mao <maoxiaochuan@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-03-25MIPS: Loongson64: DeviceTree for Loongson-2K1000Qing Zhang
Add DeviceTree files for Loongson-2K1000 processor, currently only supports single-core boot. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Tested-by: Ming Wang <wangming01@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-21MIPS: Loongson64: Add UART node for LS7A PCHTiezhu Yang
When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-08-04MIPS: KVM: Add kvm guest support for Loongson-3Huacai Chen
Loongson-3 KVM guest is based on virtio, it use liointc as its interrupt controller and use GPEX as the pci controller. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-30MIPS: DTS: Fix number of msi vectors for Loongson64GHuacai Chen
HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192). Fixes: 24af105962c8004edb9f5bf84 ("MIPS: Loongson64: DeviceTree for LS7A PCH") Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: Loongson64: Add ISA node for LS7A PCHJiaxun Yang
Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved for ISA. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCHJiaxun Yang
Ranges should express the actual physical address on bus. Also enlarge the PCI I/O size to the actual hardware limit. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: Loongson64: DeviceTree for LS7A PCHJiaxun Yang
Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-16MIPS: Loongson64: Fix machine namingHuacai Chen
From previous commits, the machine names with "loongson3-" prefix have renamed to "loongson64c-" prefix in documents, but the .dts files have not been updated as well. So fix it. Signed-off-by: Huacai Chen <chenhc@lemote.com> Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-08MIPS: Loongson: Update dts file for RS780EHuacai Chen
The size of ioports in the current RS780E dts file is not enough, which sometimes causes device initialize fail. So we increase the size of ISA/ LPC ioports to 0x4000, and increase the size of PCI ioports to 0x8000. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-08MIPS: Loongson: Rename CPU device-tree bindingHuacai Chen
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit Loongson processors are called Loongson64C (C for classic, pre Loongson- 3A R4), and the new 64bit Loongson processors are called Loongson64G (G for generic, Loongson-3A R4+). To keep consistency and make extensible, we rename the classic "loongson3" prefix to "loongson64c", and the new prefix for Loongson-3A R4+ will be "loongson64g". Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-27MIPS: DTS: Loongson64: Add PCI Controller NodeJiaxun Yang
Add PCI Host controller node for Loongson64 with RS780E PCH dts. Note that PCI interrupts are probed via legacy way, as different machine have different interrupt arrangement, we can't cover all of them in dt. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-20MIPS: DTS: Loongson64: Add ACPI Controller NodeJiaxun Yang
Add ACPI Controller Node for RS780E PCH to fit newly added driver. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-25MIPS: Loongson64: Add generic dtsJiaxun Yang
Add generic device dts for Loongson-3 devices. They are currently almost identical but will be different later. Some PCH devices like PCI Host Bridge is still enabled by platform code for now. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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