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path: root/arch/mips/include/asm/mach-ip30
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2022-05-04MIPS: IP30: Remove incorrect `cpu_has_fpu' overrideMaciej W. Rozycki
Remove unsupported forcing of `cpu_has_fpu' to 1, which makes the `nofpu' kernel parameter non-functional, and also causes a link error: ld: arch/mips/kernel/traps.o: in function `trap_init': ./arch/mips/include/asm/msa.h:(.init.text+0x348): undefined reference to `handle_fpe' ld: ./arch/mips/include/asm/msa.h:(.init.text+0x354): undefined reference to `handle_fpe' ld: ./arch/mips/include/asm/msa.h:(.init.text+0x360): undefined reference to `handle_fpe' where the CONFIG_MIPS_FP_SUPPORT configuration option has been disabled. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Reported-by: Stephen Zhang <starzhangzsd@gmail.com> Fixes: 7505576d1c1a ("MIPS: add support for SGI Octane (IP30)") Cc: stable@vger.kernel.org # v5.5+ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2022-03-01MIPS: Remove TX39XX supportThomas Bogendoerfer
No (active) developer owns this hardware, so let's remove Linux support. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2020-09-21MIPS: SGI-IP30: Move irq bits to better header filesThomas Bogendoerfer
Move HEART specific parts of mach-ip30/irq.h to asm/sgi/heart.h and IP30 specific parts to sgi-ip30/ip30-common.h. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Remove mach-*/war.hThomas Bogendoerfer
After conversion of all WAR defines we can now remove all mach-*/war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Get rid of BCM1250_M3_WARThomas Bogendoerfer
BCM1250_M3_WAR is depending on CONFIG_CONFIG_SB1_PASS_2_WORKAROUNDS. So using this option directly lets and remove define. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDSThomas Bogendoerfer
SB1250 uart bug is related to PASS 2 workarounds. Use config CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config optionThomas Bogendoerfer
Use a new config option to enable MIPS 34K ITLB workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert R10000_LLSC_WAR info a config optionThomas Bogendoerfer
Use a new config option to enabel R1000_LLSC workaound and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config optionThomas Bogendoerfer
Use a new config option to enable I-cache refill workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config optionThomas Bogendoerfer
Use a new config option to enable TX49XX I-cache index invalidate workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WARThomas Bogendoerfer
Neither MIPS4K_ICACHE_REFILL_WAR nor MIPS_CACHE_SYNC_WAR are implemented, so removing defines for it won't change anything. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert R4600_V2_HIT_CACHEOP into a config optionThomas Bogendoerfer
Use a new config option to enable R4600 V2 cacheop hit workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert R4600_V1_HIT_CACHEOP into a config optionThomas Bogendoerfer
Use a new config option to enable R4600 V1 cacheop hit workaround and remove define from the different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-07MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config optionThomas Bogendoerfer
Use a new config option to enable R4600 V1 index I-cacheop workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-07-28MIPS: cpu-feature-overrides: Remove not needed overridesThomas Bogendoerfer
Clean up cpu-feature-overrides, which only repeat the default. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25MIPS: io: fix sparse flood on asm/io.hAlexander Lobakin
MIPS MMIO macros for byteswapping from/to hardware endianness are a bit tricky because they use cpu_to_le{16,32,64}() in both directions. This generates a lot of questions from sparse as __le{16,32,64} types are 'restricted' and direct cast is forbidden in order to prevent messing up the byteorder. As MMIO ops are used in almost every single driver, this leads to console flooding and complicates bug hunting. We could fix it in a more proper way, i.e. separate from device / to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems redundant and will produce code duplication. Instead, just expand the existing *ioswab*() macros with forced typecasting to stop floods. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-24MIPS: SGI-IP30: Reorder the macros in war.hJoshua Kinard
Fix the ordering of the macros in arch/mips/mach-ip30/war.h to match those in arch/mips/mach-ip27/war.h. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-18MIPS: SGI-IP30: Remove R5432_CP0_INTERRUPT_WAR from war.hJoshua Kinard
Remove an old macro that no longer exists anywhere else in the tree that snuck in when IP30 support was added Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-19MIPS: Add header files reference with path prefixbibo mao
There are some common header files which are referenced locally with #includenext method, includenext is tricky method and only used on mips platform. This patech removes includenext method, replace it with defailed pathname prefix for header files. This patch passes to compile on all mips platform with defconfig, and is verified on my loongson64 box. Changes: -------- v2: - Fix compiling issue on malta platform Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: bibo mao <maobibo@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2019-11-01MIPS: add support for SGI Octane (IP30)Thomas Bogendoerfer
This changeset adds support for SGI Octane/Octane2 workstations. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Paul Burton <paul.burton@mips.com> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
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