linux-arm.git - Russell King's ARM Linux kernel tree

Age	Commit message (Expand)	Author
2020-09-07	MIPS: Remove mach-*/war.h	Thomas Bogendoerfer
2020-09-07	MIPS: Get rid of BCM1250_M3_WAR	Thomas Bogendoerfer
2020-09-07	MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS	Thomas Bogendoerfer
2020-09-07	MIPS: Convert MIPS34K_MISSED_ITLB_WAR into a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Convert R10000_LLSC_WAR info a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Remove MIPS4K_ICACHE_REFILL_WAR and MIPS_CACHE_SYNC_WAR	Thomas Bogendoerfer
2020-09-07	MIPS: Convert R4600_V2_HIT_CACHEOP into a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Convert R4600_V1_HIT_CACHEOP into a config option	Thomas Bogendoerfer
2020-09-07	MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config option	Thomas Bogendoerfer
2019-07-23	MIPS: Remove unused R5432_CP0_INTERRUPT_WAR	Paul Burton
2017-07-11	MIPS16e2: Provide feature overrides for non-MIPS16 systems	Maciej W. Rozycki
2015-07-14	MIPS: SB1: Remove support for Pass 1 parts.	Ralf Baechle
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle
2012-12-13	MIPS: PMC-Sierra Yosemite: Remove support.	Ralf Baechle
2012-10-11	MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.	Ralf Baechle
2010-04-12	MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.	Ralf Baechle
2008-10-11	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle