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2010-08-05MIPS: BCM47xx: Fix nvram_getenv return value.Hauke Mehrtens
Nvram_getenv should behave like cfe_getenv. cfe_getenv returns 0 on success and -9 if the value was not found. If the input was wrong -8 will be returned by cfe_getenv. Change nvram_getenv to do the same. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: Waldemar Brodkorb <wbx@openadk.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1520/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: Allow more than 3.75GB of memory with PCIeDavid Daney
We reserve the 3.75GB - 4GB region of PCIe address space for device to device transfers, making the corresponding physical memory under direct mapping unavailable for DMA. To allow for PCIe DMA to all physical memory we map this chunk of physical memory with BAR1. Because of the resulting discontinuity in the mapping function, we remove a page of memory at each end of the range so multi-page DMA buffers can never be allocated that span the range. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Remove unused task_struct.trap_no field.David Daney
It is initialized to zero and only ever read. Remove it, and pass zero in its place. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1531/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: kprobe: Add support.David Daney
This patch is based on previous work by Sony and Himanshu Chauhan. I have done some cleanup and implemented JProbes and KRETPROBES. The KRETPROBES part is pretty much copied verbatim from powerpc. A possible future enhance might be to factor out the common code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Himanshu Chauhan <hschauhan@nulltrace.org> To: linux-mips@linux-mips.org To: ananth@in.ibm.com, To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1525/ Patchwork: https://patchwork.linux-mips.org/patch/1530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Add instrunction format for BREAK and SYSCALLDavid Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: kprobes: Define regs_return_value()David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org, Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts.Chandrakala Chavva
MSI-X interrupts are not supported yet for Octeon, return error if MSI-X interrupts are requested by driver so that the driver will fall back to use MSI interrupts. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
2010-08-05MIPS: Octeon: Support 256 MSI on PCIeDavid Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Loongson: Oprofile: add a new do_perfcnt_IRQ()Wu Zhangjin
On FuLoong-2F IP6 is shared by the performance counter overflow interrupt and the Bonito northbridge interrupt. To reduce overhead only call do_IRQ() when oprofile is enabled to reduce overhead. This patch adds an inline function do_perfcnt_IRQ() to hide the #if's , which can be shared by the other Loongson machines, i.e. gdium. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1492/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Loongson: Remove set_irq_trigger_mode()Wu Zhangjin
set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Define ST0_NMI in asm/mipsregs.hDavid Daney
This is used by the forthcoming OCTEON watchdog patch. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1498/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: uasm: Add option to export uasm API.David Daney
A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported for use in modules. When it is exported, all the uasm data and code cease to be __init and __initdata. Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The cleanest thing is to just make it normal data. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: uasm: Add BBIT0 and BBIT1 instructionsDavid Daney
These are OCTEON specific instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: Implement delays with cycle counter.David Daney
Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MMC: Add support for the controller on JZ4740 SoCs.Lars-Peter Clausen
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Matt Fleming <matt@console-pimps.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Matt Fleming <matt@console-pimps.org> Cc: linux-mmc@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1463/ Patchwork: https://patchwork.linux-mips.org/patch/1523/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MTD: Nand: Add JZ4740 NAND driverLars-Peter Clausen
Add support for the NAND controller on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1470/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05FBDEV: JZ4740: Add framebuffer driverLars-Peter Clausen
Add support for the LCD controller on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-fbdev@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1470/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add platform devicesLars-Peter Clausen
Add platform devices for all the JZ4740 platform drivers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1469/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add DMA support.Lars-Peter Clausen
Add support for DMA transfers on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1401/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add GPIO supportLars-Peter Clausen
Add gpiolib support for JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1467/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add timer supportLars-Peter Clausen
Add support for the timer/counter unit on a JZ4740 SoC. This code is used as a common base for the JZ4740 clocksource/clockevent implementation and PWM support. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1396/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add IRQ handler codeLars-Peter Clausen
Add support for IRQ handling on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1465/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add clock API support.Lars-Peter Clausen
Add support for managing the clocks found on JZ4740 SoC through the Linux clock API. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1466/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-ChipLars-Peter Clausen
Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code. It also adds the iomem addresses for the different components found on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: HOTPLUG_CPU fixes.David Daney
* Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr. * Convert calls to cvmx_read64_uint32(), to simple pointer dereferences. * Set proper ebase. * Don't confuse coreid and cpu numbers. * Try to maintain consistent bootloader coremask. * Update the signature and boot_init_vector of supported bootloaders. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1491/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.David Daney
MSI IRQ numbers are allocated dynamically, so there is no reason to have all these static definitions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1487/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: au1000_eth: Get ethernet address from platform_dataManuel Lauss
au1000_eth uses firmware calls to get a valid MAC address, and changes it depending on platform device id. This patch moves this logic out of the driver into the platform device registration part, where boards with supported chips can use whatever firmware interface they need; the default implementation maintains compatibility with existing, YAMON-based firmware. Tested-by: Wolfgang Grandegger <wg@denx.de> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1481/ Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMYManuel Lauss
Remove the CONFIG_SOC_AU1X00 Kconfig symbol since its job can also be done by MACH_ALCHEMY, now renamed to MIPS_ALCHEMY. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1461/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: RM7000: Add support for tertiary cacheRicardo Mendoza
Add support for the external T-cache interface. Allow for platform independent size probing from 512KB to 8MB in powers of two. Signed-off-by: Ricardo Mendoza <ricmm@gentoo.org> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1477/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Enable heap randomization.David Daney
Based somewhat on the PPC implementation. 32-bit processes have the heap randomized in an 8MB space, 256MB for 64-bit processes. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1479/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Randomize mmap if randomize_va_space is setDavid Daney
Fairly straight forward: For 32-bit address spaces randomize within a 16MB space, for 64-bit within a 256MB space. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1480/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: EMMA2RH: Replace EMMA2RH_SW_IRQ_INTxx with EMMA2RH_SW_IRQ(n)Shinya Kuribayashi
Don't duplicate worthless lines. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1390/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: EMMA2RH: Replace EMMA2RH_IRQ_INTxx with EMMA2RH_IRQ_INT(n)Shinya Kuribayashi
Don't duplicate worthless lines. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1389/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: EMMA2RH: Remove EMMA2RH_CPU_CASCADEShinya Kuribayashi
Although all EMMAxxx SoCs can support IP2 and IP3 hardware interrupts, current EMMA2RH plat_irq_dispatch() supports IP2 only. We can make it configurable in the future, but for the time being, would like to make things explicitly allcated to IP2 in accordance with plat_irq_dispatch(). Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1388/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: EMMA2RH: Remove useless CPU_IRQ_BASEShinya Kuribayashi
For historical reasons, we used to put MIPS CPU IRQs behind SoC-specific IRQs in the queue, and have been using CPU_IRQ_BASE as MIPS_CPU_IRQ_BASE. In recent years, however, we've brought it back to normal order, and now CPU_IRQ_BASE just redefines the generic MIPS_CPU_IRQ_BASE. At the same time, NUM_CPU_IRQ is also removed as useless. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1387/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Octeon: Define ARCH_HAS_USABLE_BUILTIN_POPCOUNT for OCTEON.David Daney
OCTEON implements __builtin_popcount with a single instruction, so lets use it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1431/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Create and use asm/arch_hweight.hDavid Daney
Some MIPS ISA processor varients can do hweight operations efficiently. Split arch_hweight.h into a seperate file, and implement the operations with __builtin_popcount{,ll} if supported. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1430/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Update comment for cpu_has_clo_clzRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: MSP71xx: Remove dead CONFIG_MTD_PMC_MSP_RAMROOTChristoph Egger
CONFIG_MTD_PMC_MSP_RAMROOT doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> To: Ralf Baechle <ralf@linux-mips.org>, Yoichi Yuasa <yuasa@linux-mips.org>, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org Cc: vamos@i4.informatik.uni-erlangen.de Acked-by: Shane McDonald <mcdonald.shane@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1375/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Remove dead CONFIG_MTD_PB1550_BOOT, CONFIG_MTD_PB1550_USERChristoph Egger
CONFIG_MTD_PB1550_BOOT, CONFIG_MTD_PB1550_USER doesn't exist in Kconfig, therefore removing all references for it from the source code. Signed-off-by: Christoph Egger <siccegge@cs.fau.de> To: Manuel Lauss <manuel.lauss@gmail.com>, To: linux-mips@linux-mips.org To: linux-kernel@vger.kernel.org Cc: vamos@i4.informatik.uni-erlangen.de Patchwork: https://patchwork.linux-mips.org/patch/1370/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Provide more elevant interface cu2_notifier for CP2 extensions.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1504/
2010-08-05MIPS: PowerTV: Correct ASIC device register names and locationsDavid VomLehn
Correct ASIC device register names and addresses for USB devices. Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1258/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: PowerTV: Use O(1) algorthm for phys_to_dma/dma_to_physDavid VomLehn
Replace phys_to_dma()/dma_to_phys() looping algorithm with an O(1) algorithm The approach taken is inspired by the sparse memory implementation: take a certain number of high-order bits off the address them, use this as an index into a table containing an offset to the desired address and add it to the original value. There is a table for mapping physical addresses to DMA addresses and another one for the reverse mapping. The table sizes depend on how fine-grained the mappings need to be; Coarser granularity less to smaller tables. On a processor with 32-bit physical and DMA addresses, with 4 MIB granularity, memory usage is two 2048-byte arrays. Each 32-byte cache line thus covers 64 MiB of address space. Also, renames phys_to_bus() to phys_to_dma() and bus_to_phys() to dma_to_phys() to align with kernel usage. [Ralf: Fixed silly build breakage due to stackoverflow warning caused by huge array on stack.] Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1257/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: IP27: Don't include <linux/topology.h> into <asm/sn/agent.h>.Ralf Baechle
The include is unecessary and will when building the IP35 result in recursive header inclusion spaghetti. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: TX49xx: Define ARCH_KMALLOC_MINALIGNAtsushi Nemoto
With SLAB, it works without ARCH_KMALLOC_MINALIGN, but with SLOB/SLUB, ARCH_KMALLOC_MINALIGN is required to ensure alignment of kmalloced buffer. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1248/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-02Merge commit 'v2.6.35' into perf/coreIngo Molnar
Conflicts: tools/perf/Makefile tools/perf/util/hist.c Merge reason: Resolve the conflicts and update to latest upstream. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2010-07-26MIPS: Quit using undefined behavior of ADDU in 64-bit atomic operations.David Daney
For 64-bit, we must use DADDU and DSUBU. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1483/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-26MIPS: N32: Define getdents64.Ralf Baechle
As a relativly new ABI N32 should only have received the getdents64(2) but instead it only had getdents(2). This was noticed as a performance anomaly in glibc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-21Merge branch 'linus' into perf/coreIngo Molnar
Merge reason: Pick up the latest perf fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
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