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Q: Do we have really have write buffer
A: Yes, on newer Loongson processors there is a "store fill buffer"
that will collect *cached* writes, on all Loongson processors
AXI crossbar will buffer all writes.
Q: Then why do we want to remove CPU_HAS_WB?
A: Because CPU_HAS_WB introduces wbflush, which intends to flush
all write reuqests to mmio device. We won't be affected by store
fill buffer because it won't buffer uncached writes. And a regular
memory barrier is sufficient to flush crossbar write buffer.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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There exists many same definitions of device_tree_init() for various
platforms, add a weak function in arch/mips/kernel/prom.c to clean
up the related code.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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In device_tree_init(), unflatten_and_copy_device_tree() checks
initial_boot_params, so remove the redundant check.
drivers/of/fdt.c
void __init unflatten_and_copy_device_tree(void)
{
int size;
void *dt;
if (!initial_boot_params) {
pr_warn("No valid device tree found, continuing without\n");
return;
}
...
}
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Load proper dtb according to firmware passed parameters and
CPU PRID.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Current Loongson-3 code can share among all Loongson64 processors.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
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