linux-arm.git - Russell King's ARM Linux kernel tree

Age	Commit message (Expand)	Author
2016-05-13	MIPS: remove aliasing alignment if HW has antialising support	Leonid Yegoshin
2016-05-13	MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT	Huacai Chen
2016-05-13	MIPS: Loongson-3: Set cache flush handlers to cache_noop	Huacai Chen
2016-05-13	MIPS: Loongson: Add Loongson-3A R2 basic support	Huacai Chen
2016-05-13	MIPS: BMIPS: local_r4k___flush_cache_all needs to blast S-cache	Florian Fainelli
2016-05-13	MIPS: BMIPS: Clear MIPS_CACHE_ALIASES earlier	Florian Fainelli
2016-05-13	MIPS: BMIPS: BMIPS5000 has I cache filing from D cache	Florian Fainelli
2016-05-13	MIPS: Add M6250 cases to CPU switch statements	Paul Burton
2016-05-13	MIPS: Add P6600 cases to CPU switch statements	Paul Burton
2016-05-09	MIPS: I6400: Icache fills from dcache	James Hogan
2016-05-09	MIPS: c-r4k: Sync icache when it fills from dcache	James Hogan
2016-01-15	mm: differentiate page_mapped() from page_mapcount() for compound pages	Kirill A. Shutemov
2015-08-26	MIPS: Add cases for CPU_I6400	Markos Chandras
2015-07-10	MIPS: c-r4k: Extend way_string array	Paul Burton
2015-07-10	MIPS: c-r4k: Fix cache flushing for MT cores	Markos Chandras
2015-06-21	MIPS: c-r4k: Remove legacy __cpuinit section that crept in	Paul Gortmaker
2015-06-06	MIPS: c-r4k: Fix typo in probe_scache()	Joshua Kinard
2015-04-02	MIPS: c-r4k.c: Fix the 74K D-cache alias erratum workaround	Maciej W. Rozycki
2015-04-01	MIPS: Add R16000 detection	Joshua Kinard
2015-02-17	MIPS: mm: scache: Add secondary cache support for MIPS R6 cores	Markos Chandras
2015-02-17	MIPS: mm: c-r4k: Set the correct ISA level	Markos Chandras
2015-02-16	MIPS: Add cases for CPU_QEMU_GENERIC	Leonid Yegoshin
2014-11-24	MIPS: BMIPS: Add special cache handling in c-r4k.c	Kevin Cernekee
2014-07-30	MIPS: c-r4k: Avoid duplicate CPU_74K/CPU_1074K checks	Maciej W. Rozycki
2014-05-30	MIPS: Add minimal support for OCTEON3 to c-r4k.c	David Daney
2014-05-29	Merge branch 'wip-mips-pm' of https://github.com/paulburton/linux into mips-f...	Ralf Baechle
2014-05-24	MIPS: MT: Remove SMTC support	Ralf Baechle
2014-05-23	MIPS: c-r4k: Call R4600_HIT_CACHEOP_WAR_IMPL only for 32 byte cache lines.	Ralf Baechle
2014-05-02	MIPS: c-r4k: Add CPU PM callback for coherency	James Hogan
2014-03-31	MIPS: Loongson: Add basic Loongson-3 CPU support	Huacai Chen
2014-03-26	MIPS: Add support for the M5150 processor	Leonid Yegoshin
2014-03-26	MIPS: Extend DMA_MAYBE_COHERENT logic to DMA_NONCOHERENT use	Manuel Lauss
2014-03-26	MIPS: mm: c-r4k: Flush scache to avoid cache aliases	Leonid Yegoshin
2014-03-26	MIPS: mm: c-r4k: Add support for flushing user pages from cache	Markos Chandras
2014-03-26	MIPS: mm: c-r4k: Build EVA {d,i}cache flushing functions	Leonid Yegoshin
2014-03-26	MIPS: Add cases for CPU_P5600	James Hogan
2014-03-26	MIPS: Coherent Processing System SMP implementation	Paul Burton
2014-03-06	MIPS: Add 1074K CPU support explicitly.	Steven J. Hill
2014-03-06	MIPS: mm: c-r4k: Detect instruction cache aliases	Markos Chandras
2014-01-30	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds
2014-01-22	MIPS: Add support for interAptiv cores	Leonid Yegoshin
2014-01-22	MIPS: Add support for the proAptiv cores	Leonid Yegoshin
2014-01-22	MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved value	Markos Chandras
2014-01-15	MIPS: fix blast_icache32 on loongson2	Aaro Koskinen
2014-01-15	MIPS: fix case mismatch in local_r4k_flush_icache_range()	Huacai Chen
2013-10-29	MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.	Ralf Baechle
2013-10-02	MIPS: Fix forgotten preempt_enable() when CPU has inclusive pcaches	Yoichi Yuasa
2013-09-18	MIPS: 74K/1074K: Correct erratum workaround.	Maciej W. Rozycki
2013-09-18	MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks	Maciej W. Rozycki
2013-09-17	MIPS: Optimize current_cpu_type() for better code.	Ralf Baechle