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2014-05-21MIPS: math-emu: Remove most ifdefery.Ralf Baechle
Most of these tests should be runtime tests. This also finally means that on a MIPS III systems MIPS IV opcodes are going to result in an exception as they're supposed to. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Turn macros into functions where possible.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Harden ieee754int.h against multiple inclusion.Ralf Baechle
The header file had no include guards; this only happened to work because the file only contains macro definitions and protypes. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Reformat code according to coding style.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Move all debug fs code to a separate file.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Remove fine example of cargo cult programming.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Header file weeding.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: branch: Make inclusion of <asm/branch.h> safe.Ralf Baechle
It was relying on other headers having been included before. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Use helpers to manipulate CAUSEF_BD flag.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: branch: New helpers to modify branch delay slot flag in struct pt_regsRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Get rid of typedefs.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Use English spelling of `constant' rather than Danish.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Mark exception handling functions as __cold.Ralf Baechle
Optimizes the code flow and shaves of half a percent of the math-emu code size. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: math-emu: Use __BITFIELD_FIELD to eleminate redundant definitions.Ralf Baechle
Union _ieee754sp was even duplicated even though there are no endian dependencies in it all. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21MIPS: Move definition of __BITFIELD_FIELD to sharable header.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-21Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds
Pull device tree fixes from Grant Likely: "Drivercore bugfixes for v3.15 This branch contains bug fixes important to get into v3.15. There is a fix for modifying properties seen during early boot, a fix for an incorrect prototype when CONFIG_OF=n, and a couple of corrections to device tree memory nodes on a few platforms" * tag 'dt-for-linus' of git://git.secretlab.ca/git/linux: mips: dts: Fix missing device_type="memory" property in memory nodes arm: dts: Fix missing device_type="memory" for ste-ccu8540 of: fix CONFIG_OF=n prototype of of_node_full_name() of: make of_update_property() usable earlier in the boot process
2014-05-19ssb: sprom: add dev_id field for value overriding standard IDRafał Miłecki
Some devices may have different features despite sharing the same ID (e.g. PCI ID). For example 14e4:4331 is usually a dual band, but this can be "limited". Device with "pci/x/y/devid=0x4332" supports 2.4 GHz only. Similarly 0x4333 will mean support for 5 GHz only. Add entry in SPROM so info described above can be extracted and stored. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-05-16mips: dts: Fix missing device_type="memory" property in memory nodesLeif Lindholm
A few platforms lack a 'device_type = "memory"' for their memory nodes, relying on an old ppc quirk in order to discover its memory. Add the missing data so that all parsing code can find memory nodes correctly. Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: <stable@vger.kernel.org> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-05-16mips: Kill pointless destroy_irq()Thomas Gleixner
Copy and paste leftovers with no functionality at all. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/20140507154334.008113902@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-05-14MIPS: mm: Fix broken microMIPS kernel regression.Steven J. Hill
Commit f4ae17aa0f2122b52f642985b46210a1f2eceb0a [MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXT] broke microMIPS kernel builds. This patch refactors that code similar to what was done for the 'clear_page' and 'copy_page' functions. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6744/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-14MIPS: Add new AUDIT_ARCH token for the N32 ABI on MIPS64Markos Chandras
A MIPS64 kernel may support ELF files for all 3 MIPS ABIs (O32, N32, N64). Furthermore, the AUDIT_ARCH_MIPS{,EL}64 token does not provide enough information about the ABI for the 64-bit process. As a result of which, userland needs to use complex seccomp filters to decide whether a syscall belongs to the o32 or n32 or n64 ABI. Therefore, a new arch token for MIPS64/n32 is added so it can be used by seccomp to explicitely set syscall filters for this ABI. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Eric Paris <eparis@redhat.com> Acked-by: Paul Moore <pmoore@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: linux-mips@linux-mips.org Link: http://sourceforge.net/p/libseccomp/mailman/message/32239040/ Patchwork: https://patchwork.linux-mips.org/patch/6818/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13Merge branch 'dt-bus-name' into for-nextRob Herring
2014-05-13MIPS: Wire up renameat2 syscall.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: inst.h: Rename BITFIELD_FIELD to __BITFIELD_FIELD.Ralf Baechle
<uapi/asm/inst.h> is exported to userland so the macro name BITFIELD_FIELD pollutes the namespace. Prefix the name with __ fixes this. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: Remove file missed when removing rm9k support a while ago.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS/loongson2_cpufreq: Fix CPU clock rate settingAaro Koskinen
Loongson2 has been using (incorrectly) kHz for cpu_clk rate. This has been unnoticed, as loongson2_cpufreq was the only place where the rate was set/get. After commit 652ed95d5fa6074b3c4ea245deb0691f1acb6656 (cpufreq: introduce cpufreq_generic_get() routine) things however broke, and now loops_per_jiffy adjustments are incorrect (1000 times too long). The patch fixes this by changing cpu_clk rate to Hz. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: cpufreq@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Patchwork: https://patchwork.linux-mips.org/patch/6678/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: Loongson: No need to select GENERIC_HARDIRQS_NO__DO_IRQPaul Bolle
Commit 0e476d91244e ("MIPS: Loongson: Add Loongson-3 Kconfig options") added "select GENERIC_HARDIRQS_NO__DO_IRQ". But the Kconfig symbol GENERIC_HARDIRQS_NO__DO_IRQ was already removed in v2.6.38, so that select is a nop. Drop it. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6677/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: csum_partial.S CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki
This change reverts most of commit 60724ca59eda766a30be57aec6b49bc3e2bead91 [MIPS: IP checksums: Remove unncessary .set pseudos] that introduced warnings with the CPU_DADDI_WORKAROUNDS option set: arch/mips/lib/csum_partial.S: Assembler messages: arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" [...] arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" [and so on, and so on...] The warnings are benign and good code is produced regardless because no macros that'd use the assembler's temporary register are involved, however the `.set noat' directives removed by the commit referred are crucial to guarantee this is still going to be the case after any changes in the future. Therefore they need to be brought back to place which this change does. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6686/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: __strncpy_from_user_asm CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki
This corrects assembler warnings and broken code generated in __strncpy_from_user_asm: arch/mips/lib/strncpy_user.S: Assembler messages: arch/mips/lib/strncpy_user.S:52: Warning: Macro instruction expanded into multiple instructions in a branch delay slot with the CPU_DADDI_WORKAROUNDS option set. The function schedules delay slots manually where there is really no need to as GAS is happy to do it all itself, so undo it all and remove `.set noreorder'. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6685/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: __delay CPU_DADDI_WORKAROUNDS bug fixMaciej W. Rozycki
With CPU_DADDI_WORKAROUNDS enabled __delay assembles with a macro in a branch delay slot: {standard input}: Assembler messages: {standard input}:18: Warning: Macro instruction expanded into multiple instructions in a branch delay slot and broken code results: 0000000000000000 <__delay>: 0: 1480ffff bnez a0,0 <__delay> 4: 24010001 li at,1 8: 0081202f dsubu a0,a0,at c: 03e00008 jr ra 10: 00000000 nop 14: 00000000 nop Consequently the function loops indefinitely, showing up prominently as a hang in the delay loop calibration at bootstrap. This change corrects the problem by forcing the immediate 1 into a register while keeping code produced identical where CPU_DADDI_WORKAROUNDS is disabled. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6669/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: DEC/SNI: O32 wrapper stack switching fixesMaciej W. Rozycki
Commit 231a35d37293ab88d325a9cb94e5474c156282c0 [[MIPS] RM: Collected changes] broke DECstation support by introducing an incompatible copy of arch/mips/dec/prom/call_o32.S in arch/mips/fw/lib/, built unconditionally. The copy happens to land earlier of the two among the modules used in the link and is therefore chosen for the DECstation rather than the intended original. As a result random kernel data is corrupted because a pointer to the "%s" formatted output template is used as a temporary stack pointer rather than being passed down to prom_printf. This also explains why prom_printf still works, up to a point -- the next argument is the actual string to output so it works just fine as the output template until enough kernel data has been corrupted to cause a crash. This change adjusts the modified wrapper in arch/mips/fw/lib/call_o32.S to let callers request no stack switching by passing a null temporary stack pointer in $a1, reworks the DECstation callers to work with the updated interface and removes the old copy from arch/mips/dec/prom/call_o32.S. A few minor readability adjustments are included as well, most importantly O32_SZREG is now used throughout where applicable rather than hardcoded multiplies of 4 and $fp is used to access the argument save area as a more usual register to operate the stack with rather than $s0. Finally an update is made to the temporary stack space used by the SNI platform to guarantee 8-byte alignment as per o32 requirements. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13MIPS: DEC: Bus error handler <asm/cpu-type.h> fixesMaciej W. Rozycki
Commit 69f24d1784b631b81a54eb57c49bf46536dd2382 [MIPS: Optimize current_cpu_type() for better code.] missed an update for two DECstation bus error support files that now do not build, this is a fix. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6667/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-13Revert "MIPS: MT: proc: Add support for printing VPE and TC ids"Ralf Baechle
Reverts commit 795038a6910937fa167d47f6f6183db0eb8fb706 because d6d3c9afaab47418ab2d7f874fb8aeac1f067104 provides the same functionality in a more generic way. Both patches applied however means that the VPE and TC IDs get printed twice currently.
2014-05-02MIPS: CPC: provide locking functionsPaul Burton
This patch provides functions to lock & unlock access to the "core-other" register region of the CPC. Without performing appropriate locking it is possible for code using this region to be preempted or to race with code on another VPE within the same core, with one changing the core which the "core-other" region is acting upon at an inopportune time for the other. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: CPC: provide functions to retrieve register addressesPaul Burton
This patch introduces addr_ functions in addition to the existing read_ & write_ functions. The new functions simply return the address of the appropriate CPC register rather than performing a memory access. This will be used in a subsequent patch. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: introduce cpu_coherent_maskPaul Burton
Add a mask of CPUs which are currently known to be operating coherently. This is setup initially to be all present CPUs, but in a subsequent patch CPUs in a MIPS Coherent Processing System will be cleared in this mask as they enter non-coherent idle states. This will be used in order to determine when a CPU within a CPS system may need to be powered back up, but may also be used in future to optimise away wakeups for cache operations or TLB invalidations. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: support for generic clockevents broadcastPaul Burton
This patch adds support for generic clockevents broadcast using the a dummy clockevent device and the tick_broadcast function introduced by commit 12ad10004645 "clockevents: Add generic timer broadcast function". Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: allow R4K clockevent device to function regardless of GICPaul Burton
Having the GIC clockevent driver compiled should not prevent the R4K timer clockevent driver from functioning. One will be selected as the CPU local timer based upon their priorities and the other may simply be unused or in the case of the GIC timer may be used as the tick broadcast device. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: mark R4K clockevent device with CLOCK_EVT_FEAT_PERCPUPaul Burton
The CLOCK_EVT_FEAT_PERCPU flag indicates that a clockevent device is only configurable by the CPU for which it is registered, and thus cannot be used as the tick broadcast device. That property is true of the R4K timer, which is inaccessible from other cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: mark R4K clockevent device with CLOCK_EVT_FEAT_C3STOPPaul Burton
When a core enters a clock off or power down state its CP0 counter will be stopped along with it. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: allow GIC clockevent device config from other CPUsPaul Burton
This patch allows the GIC clockevent device for a CPU to be configured by another CPU. This makes GIC clockevent devices suitable for use as the tick broadcast device, where formerly the GIC timer local to the configuring CPU would have been configured incorrectly. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOPPaul Burton
Although the GIC counter will continue when a core is in a low power state and it will still trigger interrupts, the core will be incapable of servicing those interrupts rendering them useless. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: PM: Implement PM helper macrosJames Hogan
Implement assembler helper macros in asm/pm.h for platform code to use for saving context across low power states - for example suspend to RAM or powered down cpuidle states. Macros are provided for saving and restoring the main CPU context used by C code and doing important configuration which must be done very early during resume. Notably EVA needs segmentation control registers to be restored before the stack or dynamically allocated memory is accessed, so that state is saved in global data. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: tlb-r4k: Add CPU PM callback to reconfigure TLBJames Hogan
Add a CPU power management callback for the r4k TLB which reconfigures it after the CPU leaves a powered down state. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: c-r4k: Add CPU PM callback for coherencyJames Hogan
Implement a CPU power management callback for the r4k cache, to set up coherency again after leaving a powered down state. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-02MIPS: traps: Add CPU PM callback for trap configurationJames Hogan
Implement a CPU power management callback for restoring trap related CPU configuration after CPU power up from a low power state. The following state is restored: - Status register - HWREna register - Exception vector configuration registers - Context/XContext register Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-04-30of/fdt: consolidate built-in dtb section variablesRob Herring
Unify the various architectures __dtb_start and __dtb_end definitions moving them into of_fdt.h. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> Acked-by: James Hogan <james.hogan@imgtec.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jonas Bonn <jonas@southpole.se> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: linux-metag@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux@lists.openrisc.net Cc: linux-xtensa@linux-xtensa.org Tested-by: Grant Likely <grant.likely@linaro.org> Tested-by: Stephen Chivers <schivers@csc.com>
2014-04-30mips: convert fdt pointers to opaque pointersRob Herring
The architecture code does not need to access the internals of the FDT blob directly, so make the pointers to it void * and use char arrays for section variables. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Tested-by: Grant Likely <grant.likely@linaro.org>
2014-04-30mips: ralink: convert to use unflatten_and_copy_device_treeRob Herring
The ralink FDT code can be simplified by using unflatten_and_copy_device_tree function. This removes all accesses to FDT header data by the arch code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Tested-by: Grant Likely <grant.likely@linaro.org>
2014-04-30mips: xlp: copy built-in DTB out of init sectionRob Herring
The existing code is buggy because built-in DTBs are in init memory. It is also broken because the reserved bootmem was then freed after unflattening, but the unflattened tree points to data in the flat tree. Fix this by using the unflatten_and_copy_device_tree function. This removes all accesses to FDT header data by the arch code. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Tested-by: Grant Likely <grant.likely@linaro.org>
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