| Age | Commit message (Collapse) | Author |
|---|
|
Create general kernel debugger cache flushing for MN10300 and get rid of the
old stuff that gdbstub was using.
Signed-off-by: David Howells <dhowells@redhat.com>
|
|
The icache invalidate functions should disable the icache on AM33 and wait for
it to quiesce before attempting to invalidate it, and should then wait for it
to quiesce again before reenabling it, but on AM34 they should invalidate
directly. The same goes for the dcache invalidation, but this isn't used much.
Whilst we're at it, this can be wrapped in assembler macros to remove duplicate
code.
The AM33 manual states that:
An operation that invalidates the cache, switches the writing mode, or
changes the way mode must be performed after disabling the cache,
checking the busy bit, and confirming that the cache is not in
operation.
for the dcache [sec 2.8.3.2.1]. This is not stated so for the icache [sec
2.8.3.1.1] but the example code there suggests that it is.
Whilst the AM34 manual states that the cache must be disabled for both the
icache [sec 1.8.3.2.1] and the dcache [sec 1.8.3.2.1], the Panasonic hardware
engineers say the manual is wrong and that disabling the caches for
invalidation is wrong.
Furthermore, they say that disabling the caches on the AM34 whilst running an
SMP kernel can lead to incoherency between the various CPU caches and should
thus be avoided.
Signed-off-by: David Howells <dhowells@redhat.com>
|
|
Differentiate local cache flushing from global cache flushing so that they can
be done differently on SMP systems.
Rename the cache functions from:
mn10300_[id]cache_*()
to:
mn10300_[id]_localcache_*()
and on a UP system, assign the global labels to the local labels.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
|
|
The current cache flush and invalidate routines operate by controlling the
cache tag registers. Rename the files and add config items to select them.
This makes it easier to support the use of other cache flush methods instead,
such as the use of AM34's area purge registers, if available.
Signed-off-by: David Howells <dhowells@redhat.com>
|
