| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-05-16 | riscv: Add the support for c.ebreak check in is_valid_bugaddr() | Vincent Chen |
| 2019-05-16 | riscv: support trap-based WARN() | Vincent Chen |
| 2017-11-30 | RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros | Olof Johansson |
| 2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt |
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index : linux-arm.git | |
| Russell King's ARM Linux kernel tree | Russell King |
| summaryrefslogtreecommitdiff |