index
:
linux-arm.git
aarch64/hotplug-vcpu/head
aarch64/hotplug-vcpu/v6.5
aarch64/hotplug-vcpu/v6.6
aarch64/hotplug-vcpu/v6.6-rc1
aarch64/hotplug-vcpu/v6.6-rc5
aarch64/hotplug-vcpu/v6.6-rc6
aarch64/hotplug-vcpu/v6.6-rc7
aarch64/hotplug-vcpu/v6.7
aarch64/hotplug-vcpu/v6.7-rc1
aarch64/hotplug-vcpu/v6.7-rc2
aarch64/hotplug-vcpu/v6.7-rc3
aarch64/hotplug-vcpu/v6.7-rc4
aarch64/hotplug-vcpu/v6.7-rc5
aarch64/hotplug-vcpu/v6.8-rc2
aarch64/ktext/head
aarch64/ktext/v6.5
aarch64/ktext/v6.6-rc5
aarch64/ktext/v6.7
adfs
cex7
clearfog
clearfog-4.10
clearfog-4.11
clearfog-4.12
clearfog-4.13
clearfog-4.9
clkdev
csi-v6
devel-stable
drm-armada-devel
drm-armada-devel-4.15
drm-armada-fixes
drm-armada-fixes-4.15
drm-dwhdmi-devel
drm-etnaviv-devel
drm-tda9950-fixes
drm-tda998x-devel
drm-tda998x-fixes
fec-testing
fiq
fixes
fixes-sa1111
for-arm-soc
for-next
hb2
ktext
ktext-current
master
mcbin
mvneta
mvpp2
net-merged
net-next
net-queue
nmi
phy
rtc
sa1100
spectre
to-build
uaccess
vcpu-rmk
wl18xx
zii
Russell King's ARM Linux kernel tree
Russell King
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
kernel
/
smpboot.c
Age
Commit message (
Expand
)
Author
2021-01-14
riscv: Add numa support for riscv64 platform
Atish Patra
2020-08-20
RISC-V: Remove CLINT related code from timer and arch
Anup Patel
2020-08-20
RISC-V: Add mechanism to provide custom IPI operations
Anup Patel
2020-08-04
RISC-V: Fix build warning for smpboot.c
Atish Patra
2020-07-30
RISC-V: Setup exception vector early
Atish Patra
2020-07-30
riscv: Fixup lockdep_assert_held with wrong param cpu_running
Zong Li
2020-06-29
RISC-V: Use a local variable instead of smp_processor_id()
Greentime Hu
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
2020-03-31
RISC-V: Add cpu_ops and modify default booting method
Atish Patra
2019-11-17
riscv: provide native clint access for M-mode
Christoph Hellwig
2019-10-28
riscv: for C functions called only from assembly, mark with __visible
Paul Walmsley
2019-10-28
riscv: add missing header file includes
Paul Walmsley
2019-10-28
riscv: add prototypes for assembly language functions from head.S
Paul Walmsley
2019-07-22
RISC-V: Parse cpu topology during boot.
Atish Patra
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
2019-05-16
RISC-V: Support nr_cpus command line option.
Atish Patra
2019-04-30
RISC-V: Implement nosmp commandline option.
Atish Patra
2019-03-04
RISC-V: Compare cpuid with NR_CPUS before mapping.
Atish Patra
2019-03-04
RISC-V: Do not wait indefinitely in __cpu_up
Atish Patra
2019-02-11
riscv: use for_each_of_cpu_node iterator
Johan Hovold
2019-01-23
RISC-V: fix bad use of of_node_put
Andreas Schwab
2018-12-21
RISC-V: Fix of_node_* refcount
Atish Patra
2018-10-22
RISC-V: Use Linux logical CPU number instead of hartid
Atish Patra
2018-10-22
RISC-V: Use WRITE_ONCE instead of direct access
Atish Patra
2018-10-22
RISC-V: Use mmgrab()
Palmer Dabbelt
2018-10-22
RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu
Palmer Dabbelt
2018-10-22
RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid
Palmer Dabbelt
2018-10-22
RISC-V: Disable preemption before enabling interrupts
Atish Patra
2018-10-22
RISC-V: Comment on the TLB flush in smp_callin()
Palmer Dabbelt
2018-08-13
clocksource: new RISC-V SBI timer driver
Palmer Dabbelt
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt