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path: root/arch/x86/kernel/cpu/mcheck
AgeCommit message (Expand)Author
2017-11-13Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2017-11-07x86/MCE/AMD: Fix mce_severity_amd_smca() signatureYazen Ghannam
2017-11-07x86/MCE/AMD: Always give panic severity for UC errors in kernel contextYazen Ghannam
2017-11-05Merge branch 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2017-11-01x86/mcelog: Get rid of RCU remnantsBorislav Petkov
2017-10-05x86/mce: Convert timers to use timer_setup()Kees Cook
2017-10-05x86/mce: Hide mca_cfgBorislav Petkov
2017-09-04Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2017-09-04Merge branch 'x86-mm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2017-09-04Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2017-08-29x86/mce: Remove duplicated tracing interrupt codeThomas Gleixner
2017-08-26Merge branch 'linus' into x86/mm to pick up fixes and to fix conflictsIngo Molnar
2017-08-18x86: Constify attribute_group structuresArvind Yadav
2017-08-17x86/mm, mm/hwpoison: Clear PRESENT bit for kernel 1:1 mappings of poison pagesTony Luck
2017-07-25x86/mce/AMD: Allow any CPU to initialize the smca_banks arrayYazen Ghannam
2017-06-26x86/mce: Always save severity in machine_check_poll()Yazen Ghannam
2017-06-20x86/MCE, xen/mcelog: Make /dev/mcelog registration messages more preciseJuergen Gross
2017-06-14x86/mce: Update bootlog description to reflect behavior on AMDYazen Ghannam
2017-06-14x86/mce: Don't disable MCA banks when offlining a CPU on AMDYazen Ghannam
2017-06-14x86/mce/mce-inject: Preset the MCE injection structBorislav Petkov
2017-06-14x86/mce: Clean up include filesBorislav Petkov
2017-06-14x86/mce: Get rid of register_mce_write_callback()Borislav Petkov
2017-06-14x86/mce: Merge mce_amd_inj into mce-injectBorislav Petkov
2017-06-14x86/mce/AMD: Use saved threshold block info in interrupt handlerYazen Ghannam
2017-06-14x86/mce/AMD: Use msr_stat when clearing MCA_STATUSYazen Ghannam
2017-05-21x86/mce/AMD: Carve out SMCA bank configurationYazen Ghannam
2017-05-21x86/mce/AMD: Redo error logging from APIC LVT interrupt handlersYazen Ghannam
2017-05-21x86/mce: Convert threshold_bank.cpus from atomic_t to refcount_tElena Reshetova
2017-05-21x86/MCE: Export memory_error()Borislav Petkov
2017-05-01Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2017-04-19x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel onlyBorislav Petkov
2017-04-18x86/mce: Make the MCE notifier a blocking oneVishal Verma
2017-04-18x86/mce: Update notifier priority checkBorislav Petkov
2017-04-14x86/mce: Enable PPIN for Knights Landing/MillPiotr Luc
2017-04-03Merge branch 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2017-03-31x86/mce/AMD: Give a name to MCA bank 3 when accessed with legacy MSRsYazen Ghannam
2017-03-28x86/mce: Do not register notifiers with invalid prioBorislav Petkov
2017-03-28x86/mce: Factor out and deprecate the /dev/mcelog driverTony Luck
2017-03-28RAS: Add a Corrected Errors CollectorBorislav Petkov
2017-03-28x86/mce: Rename mce_log to mce_log_bufferBorislav Petkov
2017-03-28x86/mce: Rename mce_log()'s argumentBorislav Petkov
2017-03-28Merge branch 'ras/urgent' into ras/core, to pick up fixIngo Molnar
2017-03-28x86/mce: Don't print MCEs when mcelog is activeAndi Kleen
2017-03-18x86/mce: Init some CPU features earlyYazen Ghannam
2017-03-13x86/mce: Handle broadcasted MCE gracefully with kexecXunlei Pang
2017-02-28Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2017-02-20Merge branch 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds
2017-02-20Merge branches 'x86/cache', 'x86/debug' and 'x86/irq' into x86/urgentIngo Molnar
2017-01-31x86/mce: Make timer handling more robustThomas Gleixner
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