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Pull xtensa updates from Chris Zankel:
- fix remaining issues with noMMU cores
- fix build for cores w/o cache or zero overhead loop options
- fix boot of secondary cores in SMP configuration
- add support for DMA to high memory pages
- add dma_to_phys and phys_to_dma functions.
* tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux:
xtensa: implement dma_to_phys and phys_to_dma
xtensa: support DMA to high memory
Revert "xtensa: cache inquiry and unaligned cache handling functions"
xtensa: drop unused sections and remapped reset handlers
xtensa: fix secondary core boot in SMP
xtensa: add FORCE_MAX_ZONEORDER to Kconfig
xtensa: nommu: provide defconfig for de212 on kc705
xtensa: nommu: xtfpga: add kc705 DTS
xtensa: add de212 core variant
xtensa: nommu: select HAVE_FUTEX_CMPXCHG
xtensa: nommu: fix default memory start address
xtensa: nommu: provide correct KIO addresses
xtensa: nommu: fix USER_RING definition
xtensa: xtfpga: fix integer overflow in TASK_SIZE
xtensa: fix build for configs without cache options
xtensa: fixes for configs without loop option
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs
are not really dependent on a platform being enabled or any other kernel
config, so for testing coverage it is convenient to build all of the dtbs.
This builds all dts files in the tree, not just targets listed.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: linux-xtensa@linux-xtensa.org
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This includes OpenCores I2C host controller, TI CDCE706 clock generator,
xtfpga I2S master controller, xtfpga SPI master controller, TI TLV320AIC23
audio codec and a simple audio card.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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This config allows running SMP-enabled bitstream on LX200 board.
NFS or FLASH rootfs, minimal debug, up to 4 cores.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Enable all memory available on KC705 (1G - 128M) by default. Update memory
node in DTS and also limit usable memory in bootargs in case memmap is
passed from the bootloader.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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With this change the board needs to set up single clock object, users of
this clock will get correct frequency automatically.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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The recommended compatible string format, according to the ePAPR v1.1 standard,
is "manufacturer,model". Change the xtensa cpu compatible strings to
"cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way.
The pic compatible string will be dealt with in a separate patch.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Extract xtensa built-in interrupt controller implementation from
xtensa/kernel/irq.c and move it to other irqchips, providing way to
instantiate it from the device tree.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
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The current rules have the .dtb files build in a different directory
from the .dts files. This patch changes xtensa to use the generic dtb
rule which builds .dtb files in the same directory as the source .dts.
This requires moving parts of arch/xtensa/boot/Makefile into newly
created arch/xtensa/boot/dts/Makefile, and updating arch/xtensa/Makefile
to call the new Makefile.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
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Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60
and for ML605.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
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