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2014-08-26MIPS: EVA: Add new EVA headerMarkos Chandras
Generic code may need to perform certain operations when EVA is enabled, for example, configure the segmentation registers during boot. In order to avoid using more CONFIG_EVA ifdefs in the arch code, such functions will be added in this header instead. Initially this header contains a macro which will be used by generic code later on during VPEs configuration on secondary cores. All it does is to call the platform specific EVA init code in case EVA is enabled. Reviewed-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/7422/ Signed-off-by: James Hogan <james.hogan@imgtec.com>
2014-08-26MIPS: scall64-o32: Fix indirect syscall detectionMarkos Chandras
Commit 4c21b8fd8f14 (MIPS: seccomp: Handle indirect system calls (o32)) added indirect syscall detection for O32 processes running on MIPS64 but it did not work as expected. The reason is the the scall64-o32 implementation differs compared to scall32-o32. In the former, the v0 (syscall number) register contains the absolute syscall number (4000 + X) whereas in the latter it contains the relative syscall number (X). Fix the code to avoid doing an extra addition, and load the v0 register directly to the first argument for syscall_trace_enter. Moreover, set the .reorder assembler option in order to have better control on this part of the assembly code. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/7481/ Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: James Hogan <james.hogan@imgtec.com>
2014-08-26MIPS: syscall: Fix AUDIT value for O32 processes on MIPS64Markos Chandras
On MIPS64, O32 processes set both TIF_32BIT_ADDR and TIF_32BIT_REGS so the previous condition treated O32 applications as N32 when evaluating seccomp filters. Fix the condition to check both TIF_32BIT_{REGS, ADDR} for the N32 AUDIT flag. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Patchwork: http://patchwork.linux-mips.org/patch/7480/ Cc: <stable@vger.kernel.org> # v3.15+ Signed-off-by: James Hogan <james.hogan@imgtec.com>
2014-08-26MIPS: Loongson: Fix COP2 usage for preemptible kernelHuacai Chen
In preemptible kernel, only TIF_USEDFPU flag is reliable to distinguish whether _init_fpu()/_restore_fp() is needed. Because the value of the CP0_Status.CU1 isn't changed during preemption. V2: Fix coding style. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: NL: Fix nlm_xlp_defconfig build errorGuenter Roeck
The nlm_xlp_defconfig build fails with ./arch/mips/include/asm/mach-netlogic/topology.h:15:0: error: "topology_core_id" redefined [-Werror] In file included from include/linux/smp.h:59:0, [ ...] from arch/mips/mm/dma-default.c:12: ./arch/mips/include/asm/smp.h:41:0: note: this is the location of the previous definition and similar errors. This is caused by commit bda4584cd943d7 ("MIPS: Support CPU topology files in sysfs") which adds the defines to arch/mips/include/asm/smp.h. Remove the defines from arch/mips/include/asm/mach-netlogic/topology.h as no longer necessary. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Cc: Huacai Chen <chenhc@lemote.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7513/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: Remove race window in page fault handlingLars Persson
Multicore MIPSes without I/D hardware coherency suffered from a race condition in the page fault handler. The page table entry was published before any pending lazy D-cache flush was committed, hence it allowed execution of stale page cache data by other VPEs in the system. To make the cache handling safe we need to perform flushing already in the set_pte_at function. MIPSes without coherent I-caches can get a small increase in flushes due to the unavailability of the execute flag in set_pte_at. [ralf@linux-mips.org: outlining set_pte_at() saves a good k in a test build, so I moved its definition from pgtable.h to cache.c.] Signed-off-by: Lars Persson <larper@axis.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7511/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: Malta: Improve system memory detection for '{e, }memsize' >= 2GMarkos Chandras
Using kstrtol to parse the "{e,}memsize" variables was wrong because this parses signed long numbers. In case of '{e,}memsize' >= 2G, the top bit is set, resulting to -ERANGE errors and possibly random system memory boundaries. We fix this by replacing "kstrtol" with "kstrtoul". We also improve the code to check the kstrtoul return value and print a warning if an error was returned. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: <stable@vger.kernel.org> # v3.15+ Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7543/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: Alchemy: Fix db1200 PSC clock enablementManuel Lauss
Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch restores functionality to both Audio and I2C/SPI. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7544/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: BCM47XX: Fix reboot problem on BCM4705/BCM4785Hauke Mehrtens
This adds some code based on code from the Broadcom GPL tar to fix the reboot problems on BCM4705/BCM4785. I tried rebooting my device for ~10 times and have never seen a problem. This reverts the changes in the previous commit and adds the real fix as suggested by Rafał. Setting bit 22 in Reg 22, sel 4 puts the BIU (Bus Interface Unit) into async mode. The previous commit was 316cad5c1d4daee998cd1f83ccdb437f6f20d45c [MIPS: BCM47XX: make reboot more relaiable] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: jogo@openwrt.org Cc: zajec5@gmail.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7545/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: Remove duplicated include from numa.cWei Yongjun
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Cc: Huacai Chen <chenhc@lemote.com> Cc: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7537/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: Add common plat_irq_dispatch declarationSergey Ryazanov
Add common declaration to get rid of following sparse warning: "symbol 'plat_irq_dispatch' was not declared. Should it be static?" Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7539/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: MSP71xx: remove unused plat_irq_dispatch() argumentSergey Ryazanov
Remove unused argument to make the plat_irq_dispatch() function declaration similar to the realization of other platforms. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7538/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: GIC: Remove useless parens from GICBIS().Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-26MIPS: perf: Mark pmu interupt IRQF_NO_THREADYang Wei
In RT kernel, I ran into the following calltrace, so PMU interrupts cannot be threaded in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0 INFO: lockdep is turned off. Call Trace: [<ffffffff8088595c>] dump_stack+0x1c/0x50 [<ffffffff801a958c>] __might_sleep+0x13c/0x148 [<ffffffff80891c54>] rt_spin_lock+0x3c/0xb0 [<ffffffff801ad29c>] __wake_up+0x3c/0x80 [<ffffffff80243ba4>] perf_event_wakeup+0x8c/0xf8 [<ffffffff80243c50>] perf_pending_event+0x40/0x78 [<ffffffff8023d88c>] irq_work_run+0x74/0xc0 [<ffffffff80152640>] mipsxx_pmu_handle_shared_irq+0x110/0x228 [<ffffffff8015276c>] mipsxx_pmu_handle_irq+0x14/0x30 [<ffffffff801ffda4>] handle_irq_event_percpu+0xbc/0x470 [<ffffffff80204478>] handle_percpu_irq+0x98/0xc8 [<ffffffff801ff284>] generic_handle_irq+0x4c/0x68 [<ffffffff8089748c>] do_IRQ+0x2c/0x48 [<ffffffff80105864>] plat_irq_dispatch+0x64/0xd0 [ralf@linux-mips.org: I don't see why based on this register dump the handler should be marked IRQF_NO_THREAD - but the handler is manipulating per-CPU resources so we don't want it to be rescheduled to another CPU.] Signed-off-by: Yang Wei <Wei.Yang@windriver.com> Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@redhat.com Cc: acme@kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-25ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idledTony Lindgren
Looks like MUSB cable removal can cause wake-up interrupts to stop working for device tree based booting at least for UART3 even as nothing is dynamically remuxed. This can be fixed by calling reconfigure_io_chain() for device tree based booting in hwmod code. Note that we already do that for legacy booting if the legacy mux is configured. My guess is that this is related to UART3 and MUSB ULPI hsusb0_data0 and hsusb0_data1 support for Carkit mode that somehow affect the configured IO chain for UART3 and require rearming the wake-up interrupts. In general, for device tree based booting, pinctrl-single calls the rearm hook that in turn calls reconfigure_io_chain so calling reconfigure_io_chain should not be needed from the hwmod code for other events. So let's limit the hwmod rearming of iochain only to HWMOD_FORCE_MSTANDBY where MUSB is currently the only user of it. If we see other devices needing similar changes we can add more checks for it. Cc: Paul Walmsley <paul@pwsan.com> Cc: stable@vger.kernel.org # v3.16 Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: dts: Enable UART wake-up events for beagleboardTony Lindgren
For device tree based booting, we need to use wake-up interrupts like we already do for some omaps. This fixes a PM regression on beagleboard compared to legacy booting. Tested-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: dts: Remove twl6030 clk32g "regulator"Mark Brown
The kernel has never supported clk32g as a regulator since it is a clock and not a regulator. Fortunately nothing actually references this node so we can just remove it. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: OMAP2+: omap_device: remove warning that clk alias already existsMarkus Pargmann
When an alias for a clock already exists the warning is printed. For every module with a main_clk defined, a clk alias for fck is added. There are some components that have the same main_clk defined, so this is a really normal situation. For example the am33xx edma device has 4 components using the same main clock. So there are three warnings in the boot log for this already existing clock alias: platform 49000000.edma: alias fck already exists platform 49000000.edma: alias fck already exists platform 49000000.edma: alias fck already exists As this is only interesting for developers, this patch changes the message to a debug message. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: OMAP: fix %d confusingly prefixed with 0x in format stringHans Wennborg
Fix %d confusingly prefixed with 0x in format string. Signed-off-by: Hans Wennborg <hans@hanshq.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: dts: DRA7: fix interrupt-cells for GPIONishanth Menon
GPIO modules are also interrupt sources. However, they require both the GPIO number and IRQ type to function properly. By declaring that GPIO uses interrupt-cells=<1>, we essentially do not allow users of the nodes to use the interrupt property appropritely. With this change, the following now works: interrupt-parent = <&gpio6>; interrupts = <5 IRQ_TYPE_LEVEL_LOW>; Fixes: 6e58b8f1daaf ('ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board') Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: dts: omap3430-sdp: Revert to using software ECC for NANDRoger Quadros
For v3.14 and prior, 1-bit Hamming code ECC via software was used for NAND on this board. Commit c06c52701695 in v3.15 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.14 and prior to be unusable in v3.15 and later. So revert back to using software ECC scheme. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25ARM: OMAP2+: GPMC: Support Software ECC scheme via DTRoger Quadros
For v3.14 and prior, 1-bit Hamming code ECC via software was the default choice for some boards e.g. 3430sdp. Commit ac65caf514ec in v3.15 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.14 and prior to be unusable in v3.15 and later. So don't mark "sw" scheme as deperecated and support it. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25mtd: nand: omap: Revert to using software ECC by defaultRoger Quadros
For v3.12 and prior, 1-bit Hamming code ECC via software was the default choice. Commit c66d039197e4 in v3.13 changed the behaviour to use 1-bit Hamming code via Hardware using a different ECC layout i.e. (ROM code layout) than what is used by software ECC. This ECC layout change causes NAND filesystems created in v3.12 and prior to be unusable in v3.13 and later. So revert back to using software ECC by default if an ECC scheme is not explicitely specified. This defect can be observed on the following boards during legacy boot -omap3beagle -omap3touchbook -overo -am3517crane -devkit8000 -ldp -3430sdp Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-08-25Merge tag 'renesas-sh-drivers-for-v3.17' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas Pull SH driver fix from Simon Horman: "Confine SH_INTC to platforms that need it" * tag 'renesas-sh-drivers-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: sh: intc: Confine SH_INTC to platforms that need it
2014-08-25Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS fixes from Ralf Baechle: "Pretty much all across the field so with this we should be in reasonable shape for the upcoming -rc2" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: OCTEON: make get_system_type() thread-safe MIPS: CPS: Initialize EVA before bringing up VPEs from secondary cores MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init' MIPS: EVA: Add new EVA header MIPS: scall64-o32: Fix indirect syscall detection MIPS: syscall: Fix AUDIT value for O32 processes on MIPS64 MIPS: Loongson: Fix COP2 usage for preemptible kernel MIPS: NL: Fix nlm_xlp_defconfig build error MIPS: Remove race window in page fault handling MIPS: Malta: Improve system memory detection for '{e, }memsize' >= 2G MIPS: Alchemy: Fix db1200 PSC clock enablement MIPS: BCM47XX: Fix reboot problem on BCM4705/BCM4785 MIPS: Remove duplicated include from numa.c MIPS: Add common plat_irq_dispatch declaration MIPS: MSP71xx: remove unused plat_irq_dispatch() argument MIPS: GIC: Remove useless parens from GICBIS(). MIPS: perf: Mark pmu interupt IRQF_NO_THREAD
2014-08-25x86: Fix non-PC platform kernel crash on boot due to NULL dereferenceAndy Shevchenko
Upstream commit: 95d76acc7518d5 ("x86, irq: Count legacy IRQs by legacy_pic->nr_legacy_irqs instead of NR_IRQS_LEGACY") removed reserved interrupts for the platforms that do not have a legacy IOAPIC. Which breaks the boot on Intel MID platforms such as Medfield: BUG: unable to handle kernel NULL pointer dereference at 0000003a IP: [<c107079a>] setup_irq+0xf/0x4d [ 0.000000] *pdpt = 0000000000000000 *pde = 9bbf32453167e510 The culprit is an uncoditional setting of IRQ2 which is used as cascade IRQ on legacy platforms. It seems we have to check if we have enough legacy IRQs reserved before we can call setup_irq(). The fix adds such check in native_init_IRQ() and in setup_default_timer_irq(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: David Cohen <david.a.cohen@linux.intel.com> Link: http://lkml.kernel.org/r/1405931920-12871-1-git-send-email-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-08-25MIPS: kdump: Set correct value to kexec_indirection_page variableYang Wei
Since there is not indirection page in crash type, so the vaule of the head field of kimage structure is not equal to the address of indirection page but IND_DONE. so we have to set kexec_indirection_page variable to the address of the head field of image structure. [ralf@linux-mips.org: Don't add pointless empty line, fix trailing whitespace damage.] Signed-off-by: Yang Wei <Wei.Yang@windriver.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-08-25Merge tag 'kvm-s390-20140825' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-master Here are two fixes for s390 KVM code that prevent: 1. a malicious user to trigger a kernel BUG 2. a malicious user to change the storage key of read-only pages
2014-08-25KVM: s390/mm: try a cow on read only pages for key opsChristian Borntraeger
The PFMF instruction handler blindly wrote the storage key even if the page was mapped R/O in the host. Lets try a COW before continuing and bail out in case of errors. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Dominik Dingel <dingel@linux.vnet.ibm.com> Cc: stable@vger.kernel.org
2014-08-25KVM: s390: Fix user triggerable bug in dead codeChristian Borntraeger
In the early days, we had some special handling for the KVM_EXIT_S390_SIEIC exit, but this was gone in 2009 with commit d7b0b5eb3000 (KVM: s390: Make psw available on all exits, not just a subset). Now this switch statement is just a sanity check for userspace not messing with the kvm_run structure. Unfortunately, this allows userspace to trigger a kernel BUG. Let's just remove this switch statement. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: stable@vger.kernel.org
2014-08-25ARM: dts: hummingboard/cubox-i: change SPDIF output to be more descriptiveRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-08-25ARM: dts: hummingboard/cubox-i: add USB OC pinctrl configurationRussell King
Hummingboard has no over current hardware, so disable the over current detection for both ports. Cubox-i has over current hardware, so appropriately configure this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-08-24Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Ingo Molnar: "A couple of EFI fixes, plus misc fixes all around the map" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: efi/arm64: Store Runtime Services revision firmware: Do not use WARN_ON(!spin_is_locked()) x86_32, entry: Clean up sysenter_badsys declaration x86/doc: Fix the 'tlb_single_page_flush_ceiling' sysconfig path x86/mm: Fix sparse 'tlb_single_page_flush_ceiling' warning and make the variable read-mostly x86/mm: Fix RCU splat from new TLB tracepoints
2014-08-24Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A collection of fixes from this week, it's been pretty quiet and nothing really stands out as particularly noteworthy here -- mostly minor fixes across the field: - ODROID booting was fixed due to PMIC interrupts missing in DT - a collection of i.MX fixes - minor Tegra fix for regulators - Rockchip fix and addition of SoC-specific mailing list to make it easier to find posted patches" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: bus: arm-ccn: Fix warning message ARM: shmobile: koelsch: Remove non-existent i2c6 pinmux ARM: tegra: apalis/colibri t30: fix on-module 5v0 supplies MAINTAINERS: add new Rockchip SoC list ARM: dts: rockchip: readd missing mmc0 pinctrl settings ARM: dts: ODROID i2c improvements ARM: dts: Enable PMIC interrupts on ODROID ARM: dts: imx6sx: fix the pad setting for uart CTS_B ARM: dts: i.MX53: fix apparent bug in VPU clks ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting ARM: dts: imx6: edmqmx6: change enet reset pin ARM: dts: vf610-twr: Fix pinctrl_esdhc1 pin definitions. ARM: imx: remove unnecessary ARCH_HAS_OPP select ARM: imx: fix TLB missing of IOMUXC base address during suspend ARM: imx6: fix SMP compilation again ARM: dt: sun6i: Add #address-cells and #size-cells to i2c controller nodes
2014-08-24ARM: shmobile: koelsch: Remove non-existent i2c6 pinmuxGeert Uytterhoeven
On r8a7791, i2c6 (aka iic3) doesn't need pinmux, but the koelsch dts refers to non-existent pinmux configuration data: pinmux core: sh-pfc does not support function i2c6 sh-pfc e6060000.pfc: invalid function i2c6 in map table Remove it to fix this. Fixes: commit 1d41f36a68c0f4e9b01d563ce33bab5201858b54 ("ARM: shmobile: koelsch dts: Add VDD MPU regulator for DVFS") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-08-24ARM: tegra: apalis/colibri t30: fix on-module 5v0 suppliesMarcel Ziswiler
Working on Gigabit/PCIe support in U-Boot for Apalis T30 I realised that the current device tree source includes for our modules only happen to work due to referencing the on-carrier 5v0 supply from USB which is not at all available on-module. The modules actually contain TPS60150 charge pumps to generate the PMIC required 5 volts from the one and only 3.3 volt module supply. This patch fixes this. (Note: When back-porting this to v3.16 stable releases, simply drop the change to tegra30-apalis.dtsi; that file was added in v3.17) Cc: <stable@vger.kernel.org> #v3.16+ Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-08-24Merge tag 'v3.17-rockchip-fixes1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into fixes Merge "ARM: rockchip: fix for 3.17" from Heiko Stubner: Pinctrl that got accidentially dropped when reorganizing the dts files and addition of the new Rockchip list to MAINTAINERS. * tag 'v3.17-rockchip-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: MAINTAINERS: add new Rockchip SoC list ARM: dts: rockchip: readd missing mmc0 pinctrl settings Signed-off-by: Olof Johansson <olof@lixom.net>
2014-08-23ARM: dts: rockchip: readd missing mmc0 pinctrl settingsHeiko Stuebner
During the restructuring of the Rockchip Cortex-A9 dtsi files it seems like the pinctrl settings vanished at some point from the mmc0 support. This of course renders them unusable, so readd the necessary pinctrl properties. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-08-22Merge tag 'sunxi-dt-for-3.17-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes Merge "Allwinner DT changes, take 2" from Maxime Ripard: Only a single patch in here that fixes a DTC warning. * tag 'sunxi-dt-for-3.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: dt: sun6i: Add #address-cells and #size-cells to i2c controller nodes Signed-off-by: Olof Johansson <olof@lixom.net>
2014-08-22Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "This small set of fixes addresses a few issues introduced during the merge window, including: - fix typo in I-cache detection that was causing us to treat all I-caches as aliasing - hook up memfd_create and getrandom syscalls for native and compat - revert a temporary hack for defconfig builds in -next (the audit tree changes didn't make it in this merge window) - a couple of UEFI fixes for TEXT_OFFSET fuzzing and /memreserve/ - a simple sparsemem fix for 48-bit physical addressing - small defconfig updates to get autotesters working with X-gene" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: Revert "arm64: Do not invoke audit_syscall_* functions if !CONFIG_AUDIT_SYSCALL" arm64: mm: update max pa bits to 48 arm64: ignore DT memreserve entries when booting in UEFI mode arm64: configs: Enable X-Gene SATA and ethernet in defconfig arm64: align randomized TEXT_OFFSET on 4 kB boundary asm-generic: add memfd_create system call to unistd.h arm64: compat: wire up memfd_create and getrandom syscalls for aarch32 arm64: fix typo in I-cache policy detection
2014-08-22Merge tag 'efi-urgent' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi into x86/urgent Pull EFI fixes from Matt Fleming: * WARN_ON(!spin_is_locked()) always triggers on non-SMP machines. Swap it for the more canonical lockdep_assert_held() which always does the right thing - Guenter Roeck * Assign the correct value to efi.runtime_version on arm64 so that all the runtime services can be invoked - Semen Protsenko Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-08-22efi/arm64: Store Runtime Services revisionSemen Protsenko
"efi" global data structure contains "runtime_version" field which must be assigned in order to use it later in Runtime Services virtual calls (virt_efi_* functions). Before this patch "runtime_version" was unassigned (0), so each Runtime Service virtual call that checks revision would fail. Signed-off-by: Semen Protsenko <semen.protsenko@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: <stable@vger.kernel.org> Signed-off-by: Matt Fleming <matt.fleming@intel.com>
2014-08-22sh: intc: Confine SH_INTC to platforms that need itGeert Uytterhoeven
Currently the sh-intc driver is compiled on all SuperH and non-multiplatform SH-Mobile platforms, while it's only used on a limited number of platforms: - SuperH: SH2(A), SH3(A), SH4(A)(L) (all but SH5) - ARM: sh7372, sh73a0 Drop the "default y" on SH_INTC, make all CPU platforms that use it select it, and protect all sub-options by "if SH_INTC" to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22ARM: shmobile: r8a7791: add missing 0x0100 for SDCKCRKuninori Morimoto
4bfb358b1d6cdeff8c6a13677f01ed78e9696b98 (ARM: shmobile: Add r8a7791 legacy SDHI clocks) added r8a7791 SDHI clock support. But, it is missing "0x0100: x 1/8" division ratio. This patch fixes hidden bug. It is based on R-Car H2 v0.7, R-Car M2 v0.9. Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22ARM: shmobile: r8a7790: add missing 0x0100 for SDCKCRKuninori Morimoto
9f13ee6f83c52065112d3e396e42e3780911ef53 (ARM: shmobile: r8a7790: add div4 clocks) added r8a7790 DIV4 clock support. But, it is missing "0x0100: x 1/8" division ratio. This patch fixes hidden bug. It is based on R-Car H2 v0.7, R-Car M2 v0.9. Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-21Merge tag 'please-pull-memfd_create' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux Pull ia64 update from Tony Luck: "Add memfd_create syscall to ia64" * tag 'please-pull-memfd_create' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: [IA64] Wire up memfd_create() system call
2014-08-21Merge tag 'microblaze-3.17-rc2' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds
Pull microblaze update from Michal Simek: "Wire-up seccomp/getrandom/memfd_create syscalls" * tag 'microblaze-3.17-rc2' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Wire-up memfd_create syscall microblaze: Wire-up getrandom syscall microblaze: Wire-up seccomp syscall
2014-08-21ARM: dts: set 'ti,set-rate-parent' for dpll4_m5x2 clockStefan Herbrechtsmeier
Set 'ti,set-rate-parent' property for the dpll4_m5x2_ck clock, which is used for the ISP functional clock. This fixes the OMAP3 ISP driver's clock rate configuration on OMAP34xx, which needs the rate to be propagated properly to the divider node (dpll4_m5_ck). Signed-off-by: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: <linux-media@vger.kernel.org> Cc: <linux-omap@vger.kernel.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-08-21microblaze: Wire-up memfd_create syscallMichal Simek
Add new memfd_create syscall. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-08-21microblaze: Wire-up getrandom syscallMichal Simek
Add new getrandom syscall. Signed-off-by: Michal Simek <michal.simek@xilinx.com>