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AgeCommit message (Expand)Author
2017-12-23x86/mm: Use/Fix PCID to optimize user/kernel switchesPeter Zijlstra
2017-12-23x86/mm: Abstract switching CR3Dave Hansen
2017-12-23x86/mm: Allow flushing for future ASID switchesDave Hansen
2017-12-23x86/pti: Map the vsyscall page if neededAndy Lutomirski
2017-12-23x86/pti: Put the LDT in its own PGD if PTI is onAndy Lutomirski
2017-12-23x86/mm/64: Make a full PGD-entry size hole in the memory mapAndy Lutomirski
2017-12-23x86/events/intel/ds: Map debug buffers in cpu_entry_areaHugh Dickins
2017-12-23x86/cpu_entry_area: Add debugstore entries to cpu_entry_areaThomas Gleixner
2017-12-23x86/mm/pti: Map ESPFIX into user spaceAndy Lutomirski
2017-12-23x86/mm/pti: Share entry text PMDThomas Gleixner
2017-12-23x86/entry: Align entry text section to PMD boundaryThomas Gleixner
2017-12-23x86/mm/pti: Share cpu_entry_area with user space page tablesAndy Lutomirski
2017-12-23x86/mm/pti: Force entry through trampoline when PTI activeThomas Gleixner
2017-12-23x86/mm/pti: Add functions to clone kernel PMDsAndy Lutomirski
2017-12-23x86/mm/pti: Populate user PGDDave Hansen
2017-12-23x86/mm/pti: Allocate a separate user PGDDave Hansen
2017-12-23x86/mm/pti: Allow NX poison to be set in p4d/pgdDave Hansen
2017-12-23x86/mm/pti: Add mapping helper functionsDave Hansen
2017-12-23x86/pti: Add the pti= cmdline option and documentationBorislav Petkov
2017-12-23x86/mm/pti: Add infrastructure for page table isolationThomas Gleixner
2017-12-23x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switchingDave Hansen
2017-12-23x86/mm/pti: Disable global pages if PAGE_TABLE_ISOLATION=yDave Hansen
2017-12-23x86/cpufeatures: Add X86_BUG_CPU_INSECUREThomas Gleixner
2017-12-23x86/cpu_entry_area: Prevent wraparound in setup_cpu_entry_area_ptes() on 32bitThomas Gleixner
2017-12-22init: Invoke init_espfix_bsp() from mm_init()Thomas Gleixner
2017-12-22x86/cpu_entry_area: Move it out of the fixmapThomas Gleixner
2017-12-22x86/cpu_entry_area: Move it to a separate unitThomas Gleixner
2017-12-22x86/mm: Create asm/invpcid.hPeter Zijlstra
2017-12-22x86/mm: Put MMU to hardware ASID translation in one placeDave Hansen
2017-12-22x86/mm: Remove hard-coded ASID limit checksDave Hansen
2017-12-22x86/mm: Move the CR3 construction functions to tlbflush.hDave Hansen
2017-12-22x86/mm: Add comments to clarify which TLB-flush functions are supposed to flu...Peter Zijlstra
2017-12-22x86/mm: Remove superfluous barriersPeter Zijlstra
2017-12-22x86/mm: Use __flush_tlb_one() for kernel memoryPeter Zijlstra
2017-12-22x86/microcode: Dont abuse the TLB-flush interfacePeter Zijlstra
2017-12-22x86/uv: Use the right TLB-flush APIPeter Zijlstra
2017-12-22x86/entry: Rename SYSENTER_stack to CPU_ENTRY_AREA_entry_stackDave Hansen
2017-12-22x86/ldt: Prevent LDT inheritance on execThomas Gleixner
2017-12-22x86/ldt: Rework lockingPeter Zijlstra
2017-12-22arch, mm: Allow arch_dup_mmap() to failThomas Gleixner
2017-12-22x86/vsyscall/64: Warn and fail vsyscall emulation in NATIVE modeAndy Lutomirski
2017-12-22x86/vsyscall/64: Explicitly set _PAGE_USER in the pagetable hierarchyAndy Lutomirski
2017-12-22x86/mm/dump_pagetables: Make the address hints correct and readableThomas Gleixner
2017-12-22x86/mm/dump_pagetables: Check PAGE_PRESENT for realThomas Gleixner
2017-12-22x86/Kconfig: Limit NR_CPUS on 32-bit to a sane amountThomas Gleixner
2017-12-17x86/cpufeatures: Make CPU bugs stickyThomas Gleixner
2017-12-17x86/paravirt: Provide a way to check for hypervisorsThomas Gleixner
2017-12-17x86/paravirt: Dont patch flush_tlb_singleThomas Gleixner
2017-12-17x86/entry/64: Make cpu_entry_area.tss read-onlyAndy Lutomirski
2017-12-17x86/entry: Clean up the SYSENTER_stack codeAndy Lutomirski