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2023-08-14powerpc/radix: Move some functions into #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLEChristophe Leroy
With skiboot_defconfig, Clang reports: CC arch/powerpc/mm/book3s64/radix_tlb.o arch/powerpc/mm/book3s64/radix_tlb.c:419:20: error: unused function '_tlbie_pid_lpid' [-Werror,-Wunused-function] static inline void _tlbie_pid_lpid(unsigned long pid, unsigned long lpid, ^ arch/powerpc/mm/book3s64/radix_tlb.c:663:20: error: unused function '_tlbie_va_range_lpid' [-Werror,-Wunused-function] static inline void _tlbie_va_range_lpid(unsigned long start, unsigned long end, ^ This is because those functions are only called from functions enclosed in a #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE Move below functions inside that #ifdef * __tlbie_pid_lpid(unsigned long pid, * __tlbie_va_lpid(unsigned long va, unsigned long pid, * fixup_tlbie_pid_lpid(unsigned long pid, unsigned long lpid) * _tlbie_pid_lpid(unsigned long pid, unsigned long lpid, * fixup_tlbie_va_range_lpid(unsigned long va, * __tlbie_va_range_lpid(unsigned long start, unsigned long end, * _tlbie_va_range_lpid(unsigned long start, unsigned long end, Fixes: f0c6fbbb9050 ("KVM: PPC: Book3S HV: Add support for H_RPT_INVALIDATE") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202307260802.Mjr99P5O-lkp@intel.com/ Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/3d72efd39f986ee939d068af69fdce28bd600766.1691568093.git.christophe.leroy@csgroup.eu
2023-08-14powerpc: xmon: remove unused variablesArnd Bergmann
Randconfig testing with W=1 showed up these warnings that I'd like to enable by default: arch/powerpc/xmon/xmon.c: In function 'dump_tlb_book3e': arch/powerpc/xmon/xmon.c:3833:42: error: variable 'lrat' set but not used [-Werror=unused-but-set-variable] 3833 | int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0; | ^~~~ arch/powerpc/xmon/xmon.c:3831:23: error: variable 'lpidmask' set but not used [-Werror=unused-but-set-variable] 3831 | u32 mmucfg, pidmask, lpidmask; | ^~~~~~~~ arch/powerpc/xmon/xmon.c:3831:14: error: variable 'pidmask' set but not used [-Werror=unused-but-set-variable] 3831 | u32 mmucfg, pidmask, lpidmask; | ^~~~~~~ Just remove these as they have been unused since the code was added in 2010. Fixes: 03247157f7391 ("powerpc/book3e: Add TLB dump in xmon for Book3E") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230809131024.2039647-2-arnd@kernel.org
2023-08-14powerpc: mark more local variables as volatileArnd Bergmann
A while ago I created a2305e3de8193 ("powerpc: mark local variables around longjmp as volatile") in order to allow building powerpc with -Wextra enabled on gcc-11. I tried this again with gcc-13 and found two more of the same issues, presumably based on slightly different optimization paths being taken here: arch/powerpc/xmon/xmon.c:3306:27: error: variable 'mm' might be clobbered by 'longjmp' or 'vfork' [-Werror=clobbered] arch/powerpc/kexec/crash.c:353:22: error: variable 'i' might be clobbered by 'longjmp' or 'vfork' [-Werror=clobbered] I checked a bunch of randconfigs and found only these two, so just address them the same way as the others. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20230809131024.2039647-1-arnd@kernel.org
2023-08-14powerpc/pmac32: enable serial options by default in defconfigYuan Tan
Serial is a critical feature for logging and debuging, and the other architectures enable serial by default. Let's enable CONFIG_SERIAL_PMACZILOG and CONFIG_SERIAL_PMACZILOG_CONSOLE by default. Signed-off-by: Yuan Tan <tanyuan@tinylab.org> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/bb7b5f9958b3e3a20f6573ff7ce7c5dc566e7e32.1690982937.git.tanyuan@tinylab.org
2023-08-14Merge branch 'topic/cpu-smt' into nextMichael Ellerman
Merge SMT changes we are sharing with the tip tree.
2023-08-14Merge branch 'devel-stable' into for-nextRussell King (Oracle)
2023-08-14ARM: 9318/1: locomo: move kernel-doc to prevent warningsRandy Dunlap
Move the kernel-doc comments for locomo_probe() to immediately before that function instead of before __locomo_probe() to prevent kernel-doc warnings. Adjust the documented function parameters and make the return values compatible with ReST by adding bullets to them. Add more possible return values to the list. Prevents these warnings: arch/arm/common/locomo.c:368: warning: Function parameter or member 'me' not described in '__locomo_probe' arch/arm/common/locomo.c:368: warning: Function parameter or member 'mem' not described in '__locomo_probe' arch/arm/common/locomo.c:368: warning: Function parameter or member 'irq' not described in '__locomo_probe' arch/arm/common/locomo.c:368: warning: expecting prototype for locomo_probe(). Prototype was for __locomo_probe() instead Link: lore.kernel.org/r/202308050851.zAvHe6y7-lkp@intel.com Fixes: 5eb6e280432d ("ARM: 9289/1: Allow pre-ARMv5 builds with ld.lld 16.0.0 and newer") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Nathan Chancellor <nathan@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: patches@armlinux.org.uk Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-08-14ARM: 9317/1: kexec: Make smp stop calls asynchronousMårten Lindahl
If a panic is triggered by a hrtimer interrupt all online cpus will be notified and set offline. But as highlighted by commit 19dbdcb8039c ("smp: Warn on function calls from softirq context") this call should not be made synchronous with disabled interrupts: softdog: Initiating panic Kernel panic - not syncing: Software Watchdog Timer expired WARNING: CPU: 1 PID: 0 at kernel/smp.c:753 smp_call_function_many_cond unwind_backtrace: show_stack dump_stack_lvl __warn warn_slowpath_fmt smp_call_function_many_cond smp_call_function crash_smp_send_stop.part.0 machine_crash_shutdown __crash_kexec panic softdog_fire __hrtimer_run_queues hrtimer_interrupt Make the smp call for machine_crash_nonpanic_core() asynchronous. Signed-off-by: Mårten Lindahl <marten.lindahl@axis.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-08-14ARM: 9316/1: hw_breakpoint: fix single-stepping when using bpf_overflow_handlerTomislav Novak
Arm platforms use is_default_overflow_handler() to determine if the hw_breakpoint code should single-step over the breakpoint trigger or let the custom handler deal with it. Since bpf_overflow_handler() currently isn't recognized as a default handler, attaching a BPF program to a PERF_TYPE_BREAKPOINT event causes it to keep firing (the instruction triggering the data abort exception is never skipped). For example: # bpftrace -e 'watchpoint:0x10000:4:w { print("hit") }' -c ./test Attaching 1 probe... hit hit [...] ^C (./test performs a single 4-byte store to 0x10000) This patch replaces the check with uses_default_overflow_handler(), which accounts for the bpf_overflow_handler() case by also testing if one of the perf_event_output functions gets invoked indirectly, via orig_default_handler. Link: https://lore.kernel.org/linux-arm-kernel/20220923203644.2731604-1-tnovak@fb.com/ Signed-off-by: Tomislav Novak <tnovak@fb.com> Tested-by: Samuel Gosselin <sgosselin@google.com> # arm64 Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2023-08-14arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGANiravkumar L Rabara
Add the initial device tree files for Intel Agilex5 SoCFPGA platform. Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-14ARM: dts: am335x-bone-common: Add vcc-supply for on-board eepromShengyu Qu
The on-board eeprom on beaglebone series has a power supply from VDD_3V3A, add that to dts to reduce dummy regulator warning. Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Message-ID: <TY3P286MB2611CDC84604B11570B4A8D2980FA@TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-08-14ARM: dts: am335x-bone-common: Add GPIO PHY reset on revision C3 boardShengyu Qu
This patch adds ethernet PHY reset GPIO config for Beaglebone Black series boards with revision C3. This fixes a random phy startup failure bug discussed at [1]. The GPIO pin used for reset is not used on older revisions, so it is ok to apply to all board revisions. The reset timing was discussed and tested at [2]. [1] https://forum.digikey.com/t/ethernet-device-is-not-detecting-on-ubuntu-20-04-lts-on-bbg/19948 [2] https://forum.beagleboard.org/t/recognizing-a-beaglebone-black-rev-c3-board/31249/ Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Message-ID: <TY3P286MB26113797A3B2EC7E0348BBB2980FA@TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM> Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-08-14x86/retpoline,kprobes: Skip optprobe check for indirect jumps with ↵Petr Pavlu
retpolines and IBT The kprobes optimization check can_optimize() calls insn_is_indirect_jump() to detect indirect jump instructions in a target function. If any is found, creating an optprobe is disallowed in the function because the jump could be from a jump table and could potentially land in the middle of the target optprobe. With retpolines, insn_is_indirect_jump() additionally looks for calls to indirect thunks which the compiler potentially used to replace original jumps. This extra check is however unnecessary because jump tables are disabled when the kernel is built with retpolines. The same is currently the case with IBT. Based on this observation, remove the logic to look for calls to indirect thunks and skip the check for indirect jumps altogether if the kernel is built with retpolines or IBT. Remove subsequently the symbols __indirect_thunk_start and __indirect_thunk_end which are no longer needed. Dropping this logic indirectly fixes a problem where the range [__indirect_thunk_start, __indirect_thunk_end] wrongly included also the return thunk. It caused that machines which used the return thunk as a mitigation and didn't have it patched by any alternative ended up not being able to use optprobes in any regular function. Fixes: 0b53c374b9ef ("x86/retpoline: Use -mfunction-return") Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Suggested-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Signed-off-by: Petr Pavlu <petr.pavlu@suse.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org> Link: https://lore.kernel.org/r/20230711091952.27944-3-petr.pavlu@suse.com
2023-08-14x86/retpoline,kprobes: Fix position of thunk sections with CONFIG_LTO_CLANGPetr Pavlu
The linker script arch/x86/kernel/vmlinux.lds.S matches the thunk sections ".text.__x86.*" from arch/x86/lib/retpoline.S as follows: .text { [...] TEXT_TEXT [...] __indirect_thunk_start = .; *(.text.__x86.*) __indirect_thunk_end = .; [...] } Macro TEXT_TEXT references TEXT_MAIN which normally expands to only ".text". However, with CONFIG_LTO_CLANG, TEXT_MAIN becomes ".text .text.[0-9a-zA-Z_]*" which wrongly matches also the thunk sections. The output layout is then different than expected. For instance, the currently defined range [__indirect_thunk_start, __indirect_thunk_end] becomes empty. Prevent the problem by using ".." as the first separator, for example, ".text..__x86.indirect_thunk". This pattern is utilized by other explicit section names which start with one of the standard prefixes, such as ".text" or ".data", and that need to be individually selected in the linker script. [ nathan: Fix conflicts with SRSO and fold in fix issue brought up by Andrew Cooper in post-review: https://lore.kernel.org/20230803230323.1478869-1-andrew.cooper3@citrix.com ] Fixes: dc5723b02e52 ("kbuild: add support for Clang LTO") Signed-off-by: Petr Pavlu <petr.pavlu@suse.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230711091952.27944-2-petr.pavlu@suse.com
2023-08-14x86/srso: Disable the mitigation on unaffected configurationsBorislav Petkov (AMD)
Skip the srso cmd line parsing which is not needed on Zen1/2 with SMT disabled and with the proper microcode applied (latter should be the case anyway) as those are not affected. Fixes: 5a15d8348881 ("x86/srso: Tie SBPB bit setting to microcode patch detection") Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230813104517.3346-1-bp@alien8.de
2023-08-14x86/CPU/AMD: Fix the DIV(0) initial fix attemptBorislav Petkov (AMD)
Initially, it was thought that doing an innocuous division in the #DE handler would take care to prevent any leaking of old data from the divider but by the time the fault is raised, the speculation has already advanced too far and such data could already have been used by younger operations. Therefore, do the innocuous division on every exit to userspace so that userspace doesn't see any potentially old data from integer divisions in kernel space. Do the same before VMRUN too, to protect host data from leaking into the guest too. Fixes: 77245f1c3c64 ("x86/CPU/AMD: Do not leak quotient data after a division by 0") Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: <stable@kernel.org> Link: https://lore.kernel.org/r/20230811213824.10025-1-bp@alien8.de
2023-08-14x86/retpoline: Don't clobber RFLAGS during srso_safe_ret()Sean Christopherson
Use LEA instead of ADD when adjusting %rsp in srso_safe_ret{,_alias}() so as to avoid clobbering flags. Drop one of the INT3 instructions to account for the LEA consuming one more byte than the ADD. KVM's emulator makes indirect calls into a jump table of sorts, where the destination of each call is a small blob of code that performs fast emulation by executing the target instruction with fixed operands. E.g. to emulate ADC, fastop() invokes adcb_al_dl(): adcb_al_dl: <+0>: adc %dl,%al <+2>: jmp <__x86_return_thunk> A major motivation for doing fast emulation is to leverage the CPU to handle consumption and manipulation of arithmetic flags, i.e. RFLAGS is both an input and output to the target of the call. fastop() collects the RFLAGS result by pushing RFLAGS onto the stack and popping them back into a variable (held in %rdi in this case): asm("push %[flags]; popf; " CALL_NOSPEC " ; pushf; pop %[flags]\n" <+71>: mov 0xc0(%r8),%rdx <+78>: mov 0x100(%r8),%rcx <+85>: push %rdi <+86>: popf <+87>: call *%rsi <+89>: nop <+90>: nop <+91>: nop <+92>: pushf <+93>: pop %rdi and then propagating the arithmetic flags into the vCPU's emulator state: ctxt->eflags = (ctxt->eflags & ~EFLAGS_MASK) | (flags & EFLAGS_MASK); <+64>: and $0xfffffffffffff72a,%r9 <+94>: and $0x8d5,%edi <+109>: or %rdi,%r9 <+122>: mov %r9,0x10(%r8) The failures can be most easily reproduced by running the "emulator" test in KVM-Unit-Tests. If you're feeling a bit of deja vu, see commit b63f20a778c8 ("x86/retpoline: Don't clobber RFLAGS during CALL_NOSPEC on i386"). In addition, this breaks booting of clang-compiled guest on a gcc-compiled host where the host contains the %rsp-modifying SRSO mitigations. [ bp: Massage commit message, extend, remove addresses. ] Fixes: fb3bd914b3ec ("x86/srso: Add a Speculative RAS Overflow mitigation") Closes: https://lore.kernel.org/all/de474347-122d-54cd-eabf-9dcc95ab9eae@amd.com Reported-by: Srikanth Aithal <sraithal@amd.com> Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Nathan Chancellor <nathan@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/20230810013334.GA5354@dev-arch.thelio-3990X/ Link: https://lore.kernel.org/r/20230811155255.250835-1-seanjc@google.com
2023-08-14parisc: Fix CONFIG_TLB_PTLOCK to work with lightweight spinlock checksHelge Deller
For the TLB_PTLOCK checks we used an optimization to store the spc register into the spinlock to unlock it. This optimization works as long as the lightweight spinlock checks (CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK) aren't enabled, because they really check if the lock word is zero or __ARCH_SPIN_LOCK_UNLOCKED_VAL and abort with a kernel crash ("Spinlock was trashed") otherwise. Drop that optimization to make it possible to activate both checks at the same time. Noticed-by: Sam James <sam@gentoo.org> Signed-off-by: Helge Deller <deller@gmx.de> Tested-by: Sam James <sam@gentoo.org> Cc: stable@vger.kernel.org # v6.4+ Fixes: 15e64ef6520e ("parisc: Add lightweight spinlock checks")
2023-08-13arm64: dts: qcom: msm8916-samsung-e5: Add touchscreenLin, Meng-Bo
Similar to A5, E5 uses a Melfas MMS345L touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230812071448.4710-1-linmengbo0689@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sc7180: Split up TF-A related PSCI configurationNikita Travkin
When initially submitted, the sc7180 support only targeted CROS devices that make use of alternative TF-A firmware and not the official Qualcomm firmware. The PSCI implementations in those firmwares differ however so devices that use qcom firmware, like WoA laptops such as aspire1 need different setup. This commit adjusts the SoC dtsi to the OSI mode PSCI setup, common to the Qualcomm firmware and introduces new sc7180-firmware-tfa.dtsi that overrides the PSCI setup for the PC mode and uses TF-A specific psci-suspend-param. This dtsi is added to all boards that appear to use TF-A. Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20230808-sc7180-tfa-fw-v1-1-666d5d8467e5@trvn.ru Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sc8280xp-x13s: Add camera activity LEDKonrad Dybcio
Disappointigly, the camera activity LED is implemented in software. Hook it up as a gpio-led and (until we have camera *and* a "camera on" LED trigger) configure it as a panic indicator. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805-topic-x13s_cam_led-v1-1-443d752158c4@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pinsKonrad Dybcio
Pins 83-86 and 158-160 are NC, so there's no point in keeping them reserved. Take care of that. Fixes: 32c231385ed4 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230803-topic-x13s_pin-v1-1-fae792274e89@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8998: Add DPU1 nodesAngeloGioacchino Del Regno
Add the required nodes to support the display hardware on msm8998. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> [konrad: update the commit msg and AGdR's email, rebase] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805-topic-8998_dpu-v1-1-9d402dc1ecc0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8996: Fix dsi1 interruptsDavid Wronek
Fix IRQ flags mismatch which was keeping dsi1 from probing by changing interrupts = <4> to interrupts = <5>. Fixes: 2752bb7d9b58 ("arm64: dts: qcom: msm8996: add second DSI interface") Signed-off-by: David Wronek <davidwronek@gmail.com> Acked-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230805130936.359860-2-davidwronek@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sdx75-idp: Add regulator nodesRohit Agarwal
Add all the regulators along with labels found on SDX75 IDP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-10-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sdx75: Add rpmhpd nodeRohit Agarwal
Add rpmhpd node and opps for this node to the SDX75 dts. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-9-git-send-email-quic_rohiagar@quicinc.com [bjorn: include qcom-rpmpd.h as well] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13ARM: dts: qcom: sdx65-mtp: Update the pmic used in sdx65Rohit Agarwal
Update the pmic used in sdx65 platform to pm7250b. Fixes: 26380f298b2b (ARM: dts: qcom: sdx65-mtp: Add pmk8350b and pm8150b pmic) Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-7-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75Rohit Agarwal
SDX75-idp features pmk8550, pmx75 and pm7550ba pmic, so include them. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-8-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: Add pmx75 PMIC dtsiRohit Agarwal
Add dtsi for pmx75 PMIC found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-6-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: Add pm7550ba PMIC dtsiRohit Agarwal
Add dtsi for pm7550ba PMIC found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1691415534-31820-5-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: Add pinctrl gpio support for pm7250bRohit Agarwal
Add pinctrl gpio dts node for pm7250b. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-4-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sdx75: Add spmi nodeRohit Agarwal
Add SPMI node to SDX75 dtsi. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/1691415534-31820-3-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMUKonrad Dybcio
The MMSS SMMU has its own power domain. Attach it so that we can drop the "keep it always-on" hack. Fixes: 05ce21b54423 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu") Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-2-ba1b1fd9ee75@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8998: Drop bus clock reference from MMSS SMMUKonrad Dybcio
The MMSS SMMU has been abusingly consuming the exposed RPM interconnect clock. Drop it. Fixes: 05ce21b54423 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu") Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-1-ba1b1fd9ee75@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sm8450: Add RPMh statsKonrad Dybcio
SM8450 also exposes RPMh stats, hook them up for low power state monitoring. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-8450_stats-v1-1-f26ae3fdf2cf@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCCKonrad Dybcio
MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output. We've already been using the correct one in the non-div case, start doing so for the other one as well. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-8-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCCKonrad Dybcio
GPUCC has its own GPLL0 leg, switch to it to allow shutting it down when it's unused. Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-7-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: ipq5332: enable GPIO based LEDs and ButtonsSridharan S N
Add support for wlan-2g LED on GPIO 36 and wps buttons on GPIO 35. Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230616083238.20690-2-quic_sridsn@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: sm8450: Add PRNGKonrad Dybcio
Add the Qualcomm Pseudo-Random Number Generator. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-8450_prng-v1-3-01becceeb1ee@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc: Enable camss for non-mezzanine casesBryan O'Donoghue
When we have no camera mezzanine attached it is still possible to run the test-pattern generator of the CSID block. As an example: media-ctl --reset yavta --no-query -w '0x009f0903 1' /dev/v4l-subdev2 yavta --list /dev/v4l-subdev2 media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:UYVY8_1X16/1920x1080 field:none]' media-ctl -l '"msm_csid0":1->"msm_ispif0":0[1]' media-ctl -d /dev/media0 -V '"msm_ispif0":0[fmt:UYVY8_1X16/1920x1080 field:none]' media-ctl -l '"msm_ispif0":1->"msm_vfe0_rdi0":0[1]' media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:UYVY8_1X16/1920x1080]' media-ctl -d /dev/media0 -p yavta -B capture-mplane --capture=5 -n 5 -I -f UYVY -s 1920x1080 --file=TPG-UYVU-1920x1080-000-#.bin /dev/video0 Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-8-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc-d3-camera-mezzanine: Move default ov5640 to a ↵Bryan O'Donoghue
standalone dts At the moment we define a single ov5640 sensor in the apq8016-sbc and disable that sensor. The sensor mezzanine for this is a D3 Engineering Dual ov5640 mezzanine card. Move the definition from the apq8016-sbc where it shouldn't be to a standalone dts. Enables the sensor by default, as we are adding a standalone mezzanine structure. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-7-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc: Rename ov5640 enable-gpios to powerdown-gpiosBryan O'Donoghue
There are two control lines controlled by GPIO going into ov5640 - Reset - Powerdown The driver and yaml expect "reset-gpios" and "powerdown-gpios" there has never been an "enable-gpios". Fixes: 39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-6-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc: Set ov5640 assigned-clockBryan O'Donoghue
The driver for the ov5640 doesn't do a set-rate, instead it expects the clock to already be set at an appropriate rate. Similarly the yaml for ov5640 doesn't understand clock-frequency. Convert from clock-rate to assigned-clock and assigned-clock-rate to remediate. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-5-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc: Fix ov5640 data-lanes declarationBryan O'Donoghue
The yaml constraint for data-lanes is [1, 2] not [0, 2]. The driver itself doesn't do anything with the data-lanes declaration save count the number of specified data-lanes and calculate the link rate so, this change doesn't have any functional side-effects. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-4-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: apq8016-sbc: Fix ov5640 regulator supply namesBryan O'Donoghue
The ov5640 driver expects DOVDD, AVDD and DVDD as regulator supply names. The ov5640 has depended on these names since the driver was committed upstream in 2017. Similarly apq8016-sbc.dtsi has had completely different regulator names since its own initial commit in 2020. Perhaps the regulators were left on in previous 410c bootloaders. In any case today on 6.5 we won't switch on the ov5640 without correctly naming the regulators. Fixes: 39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes") Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13arm64: dts: qcom: msm8916: Define CAMSS ports in core dtsiBryan O'Donoghue
Each CSIPHY in CAMMS maps to a port here in the dtsi, since the number of CSIPHYs is fixed per SoC define the 8916 ports for both available PHYs. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811234738.2859417-2-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13ARC: -Wmissing-prototype warning fixesVineet Gupta
Anrd reported [1] new compiler warnings due to -Wmissing-protype. These are for non static functions mostly used in asm code hence not exported already. Fix this by adding the prototypes. [1] https://lore.kernel.org/lkml/20230810141947.1236730-1-arnd@kernel.org Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vineet Gupta <vgupta@kernel.org>
2023-08-13Merge 6.5-rc6 into char-misc-nextGreg Kroah-Hartman
We need the char/misc fixes in here as well to build on top of. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-08-13x86/microcode/intel: Remove pointless mutexThomas Gleixner
There is no concurrency. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230812195728.069849788@linutronix.de
2023-08-13x86/microcode/intel: Remove debug codeThomas Gleixner
This is really of dubious value. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230812195728.010895747@linutronix.de
generated by cgit (git 2.34.1) at 2025-09-24 12:58:47 +0000