| Age | Commit message (Collapse) | Author |
|---|
|
Here we supply the information required to setup regulators successfully
on Snowball and other db8500 variants which use the ab8500 regulators.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This patch adds a fixed regulator for use by the SMSC911x Ethernet
chip driver into the db8500 Device Tree. It also references other
regulators required by the same device.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This patch adds the correct compatible string for use during Device Tree
population. Without it the DB8500 PRCMU regulators would be processed
when DT is enabled.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Here we inform Device Tree of which regulators are provided by the db8500-
prcmu. This way we can reference some of their consumers directly from the
Device Tree e.g. SMSC911x Ethernet chip.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
ST-Ericsson uses User Interface Boards to extend functionality of
some of their development boards. However, these aren't compatible
with all the supported boards found in Mainline (Snowball for
instance). This patch ensures that the UIBs are only probed on
boards which can actually support them. This in turn saves lots of
unnecessary error messages normally found in Snowball's boot log.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The final piece of the ab8500 puzzle. Here we prevent any of the ab8500-*
drivers from being registered from platform code when Device Tree is
enabled, as we expect DT do probe each of these individually. We also
provide the relevant compatible strings, so that DT knows which nodes
it needs to pay attention to during population.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
This patch applies the correct format requested by the irq
domain. For chained IRQs which use GPIO lines as IRQs, we
stipulate that a two cell request is required. The first cell
contains the requested IRQ and the second can contain flags
pertaining to edge detection and level sensitive values. The
zeroth cell specifies the GPIO controller by use of a phandle.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
The patch to disable SMSC911x registration was applied twice in the upstream
kernel by mistake. Git interpreted this as 'take the same entry from a
similar struct' which was close by. This was the wrong thing to do. This patch
rectifies this error and re-enables SMSC911x registration when Device Tree is
not enabled.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Apply db8500 related PRCMU Device Tree settings and clean up some formatting
errors. We also remove one of the PRCMU assigned IRQs, as it is currently not
used.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Now the DB8500 has Device Tree support it will be probed when the DT
is parsed, rendering the requirement for platform registration void.
This patch removes DB8500 PRCMU platform registration.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Now the SCMC911x is correctly enabled in Device Tree, there is no need
to continue registering it from platform code. In fact, if we continue
doing so, the system will throw an error on boot.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
During Device Tree enablement it is necessary to remove
<hw_component>_add_<device> calls one at at time, as and when particular
devices are DT enabled. This patch provides a temporary solution. Once
the new *of_init_devices function has been fully unpopulated it will be
removed again.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
During Device Tree enablement it is necessary to remove snowball_<device>*
platform_data segments one at at time, as and when particular devices are
DT enabled. This patch provides a temporary solution. Once this new struct
is empty it will be removed again.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Pull two small kvm fixes from Avi Kivity:
"A build fix for non-kvm archs and a transparent hugepage refcount
bugfix on hosts with 4M pages."
* git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: Export asm-generic/kvm_para.h
KVM: MMU: fix huge page adapted on non-PAE host
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull mce cleanup from Tony Luck:
"One more mce cleanup before the 3.5 merge window closes"
* tag 'please-pull-mce' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
x86/mce: Cleanup timer mess
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 patches from Heiko Carstens:
"A couple of s390 patches for the 3.5 merge window. Just a collection
of bug fixes and cleanups."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/uaccess: fix access_ok compile warnings
s390/cmpxchg: select HAVE_CMPXCHG_LOCAL option
s390/cmpxchg: fix sign extension bugs
s390/cmpxchg: fix 1 and 2 byte memory accesses
s390/cmpxchg: fix compile warnings specific to s390
s390/cmpxchg: add missing memory barrier to cmpxchg64
s390/cpu: remove cpu "capabilities" sysfs attribute
s390/kernel: Fix smp_call_ipl_cpu() for offline CPUs
s390/kernel: Introduce memcpy_absolute() function
s390/headers: replace __s390x__ with CONFIG_64BIT where possible
s390/headers: remove #ifdef __KERNEL__ from not exported headers
s390/irq: split irq stats for cpu-measurement alert facilities
s390/kexec: Move early_pgm_check_handler() to text section
s390/kdump: Use real mode for PSW restart and kexec
s390/kdump: Account /sys/kernel/kexec_crash_size changes in OS info
s390/kernel: Remove OS info init function call and diag 308 for kdump
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6
Pull misc parisc updates from James Bottomley:
"This is a couple of updates to complete our fixes and one to fix a
compile failure caused during the merge window. Additionally, we now
switch to the generic strncopy_from_user."
* tag 'parisc-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
[PARISC] update parisc to use generic strncpy_from_user()
[PARISC] Fix parisc compile failure after smp: Add task_struct argument to __cpu_up()
[PARISC] fix TLB fault path on PA2.0 narrow systems
[PARISC] fix boot failure on 32-bit systems caused by branch stubs placed before .text
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull additional x86 fixes from Peter Anvin.
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86, amd, xen: Avoid NULL pointer paravirt references
x86, mtrr: Fix a type overflow in range_to_mtrr func
x86, realmode: Unbreak the ia64 build of drivers/acpi/sleep.c
x86/mm/pat: Improve scaling of pat_pagerange_is_ram()
x86: hpet: Fix copy-and-paste mistake in earlier change
x86/mce: Fix 32-bit build
x86/bitops: Move BIT_64() for a wider use
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late-merged development and first fixes for arm-soc from Olof Johansson:
"This branch contains a few development patches for Samsung and
Versatile Express that were submitted to arm-soc near the beginning of
the merge window. We picked them up with the agreement that they
would need to sit in linux-next for a while, and now they have.
There are also two fixes:
- One long-standing build breakage on ixp4xx due to missing gpiolib
dependencies.
- The other is for some gpio device tree changes needed on lpc32xx."
* tag 'devel-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: LPC32xx: Adjust dts files to gpio dt binding
ixp4xx: fix compilation by adding gpiolib support
ARM: vexpress: Remove twice included header files
ARM: vexpress: Device Tree updates
ARM: EXYNOS: Support suspend and resume for EXYNOS5250
ARM: EXYNOS: Add Clock register list for save and restore
ARM: EXYNOS: Add PMU table for EXYNOS5250
ARM: EXYNOS: Rename of function for pm.c
ARM: EXYNOS: Remove GIC save & restore function
ARM: dts: Add node for interrupt combiner controller on EXYNOS5250
ARM: S3C24XX: add support for second irq set of S3C2416
ARM: S3C64XX: use timekeeping wrapper on cpuidle
ARM: S3C64XX: declare the states with the new api on cpuidle
ARM: S3C64XX: Hook up carrier class modules on Cragganmore
ARM: S3C64XX: Initial hookup for Bells module on Cragganmore
|
|
Pull Sparc updates from David S. Miller:
1) Remove the idiotic situation wherein Leon was a special case in all
of the TLB/cache handling code.
The worst side effect of this bogosity is that you couldn't build a
kernel with Leon support enabled (to get better build coverage), and
test boot it on a non-LEON cpu.
Leon is, in all core respects, programatically identical to the
32-bit SRMMU. Except that they put the TLB registers in a different
alternate address space location.
Through code patching (for fast paths) and run time checks, this
issue is now a thing of the past.
From Sam Ravnborg.
2) There was a mis-merge of arch/sparc/Kconfig for one of the
clockevents changes that went in, causing 32-bit sparc to start
failing to build.
I merged in your tree to get those clockevents changes (and added a
note to the merge commit) then added Stephen Rothwell's fix for the
merge error.
3) Software quad floating point emulation was not working properly on
more recent Niagara chips, because the way the situation is reported
by the cpu has changed.
Nobody noticed because gcc emits calls to software emulation
routines in glibc.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: (25 commits)
sparc: fix sparc64 build due to leon.h inclusion
sparc32: remove unused variable in head_32.S
sparc32,leon: fix leon bootup
sparc32: Export leon_dma_ops to modules.
sparc32: support leon + sun in dma_make_coherent()
sparc32,leon: always support leon in ioport
sparc32,leon: always include leon_pmc in build
sparc32: refactor cpu_idle()
sparc32: srmmu_probe now knows about leon too
sparc32: drop LEON hack for ASI_M_MMUREGS
sparc32: introduce run-time patching of srmmu access functions
sparc32: introduce support for run-time patching for all shared assembler code
sparc32,leon: fix section mismatch warning
sparc32,leon: always include leon_smp + leon_mm in build
sparc32,leon: always include leon_kernel in build
sparc32,leon: clean up leon.h
sparc32: handle leon in cpu.c
sparc32: handle leon in irq_32.c
sparc32: add support for run-time patching of leon/sun single instructions
sparc32: introduce sparc32_start_kernel called from head_32.S
...
|
|
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
|
|
get_unmapped_area() returns -E... on failure, not 0. Moreover, the
wrapper around it is completely pointless.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
they contain open-coded sys_mremap()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
* fixes:
ixp4xx: fix compilation by adding gpiolib support
* fixes2:
ARM: LPC32xx: Adjust dts files to gpio dt binding
|
|
The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO
banks via DT subnodes but always all at once, and changes the gpio referencing
to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this
binding that was just accepted to the gpio subsystem.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Stub out MSR methods that aren't actually needed. This fixes a crash
as Xen Dom0 on AMD Trinity systems. A bigger patch should be added to
remove the paravirt machinery completely for the methods which
apparently have no users!
Reported-by: Andre Przywara <andre.przywara@amd.com>
Link: http://lkml.kernel.org/r/20120530222356.GA28417@andromeda.dapyr.net
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: <stable@vger.kernel.org>
|
|
* late/board:
ARM: S3C64XX: Hook up carrier class modules on Cragganmore
ARM: S3C64XX: Initial hookup for Bells module on Cragganmore
|
|
* late/soc:
ARM: vexpress: Remove twice included header files
ARM: vexpress: Device Tree updates
ARM: EXYNOS: Support suspend and resume for EXYNOS5250
ARM: EXYNOS: Add Clock register list for save and restore
ARM: EXYNOS: Add PMU table for EXYNOS5250
ARM: EXYNOS: Rename of function for pm.c
ARM: EXYNOS: Remove GIC save & restore function
ARM: dts: Add node for interrupt combiner controller on EXYNOS5250
ARM: S3C24XX: add support for second irq set of S3C2416
|
|
* late/cleanup:
ARM: S3C64XX: use timekeeping wrapper on cpuidle
ARM: S3C64XX: declare the states with the new api on cpuidle
|
|
Use unsigned long for dealing with jiffies not int. Rename the
callback to something sensible. Use __this_cpu_read/write for
accessing per cpu data.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Borislav Petkov <borislav.petkov@amd.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
|
|
When boot on sun G5+ with 4T mem, see an overflow in mtrr cleanup as below.
*BAD*gran_size: 2G chunk_size: 2G num_reg: 10 lose cover RAM:
-18014398505283592M
This is because 1<<31 sign extended. Use an unsigned long constant to
fix it. Useful for mem larger than or equal to 4T.
-v2: Use 64bit constant instead of explicit type conversion as suggested
by Yinghai. Description updated too.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@oracle.com>
Link: http://lkml.kernel.org/r/4FC5A77F.6060505@oracle.com
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
x86/trampoline contains an urgent commit which is necessarily on a
newer baseline.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
Revert usage of acpi_wakeup_address and move definition
to x86 architecture code in order to make compilation work
in ia64.
[jsakkine: tested compilation in ia64/x86-64 and added
proper commit message]
Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Originally-by: H. Peter Anvin <hpa@kernel.org>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@intel.com>
Link: http://lkml.kernel.org/r/1338370421-27735-1-git-send-email-jarkko.sakkinen@intel.com
Cc: Tony Luck <tony.luck@intel.com>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
Merge in these fixlets.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
|
Function pat_pagerange_is_ram() scales poorly to large address
ranges, because it probes the resource tree for each page.
On a 2.6 GHz Opteron, this function consumes 34 ms for a 1 GB range.
It is called twice during untrack_pfn_vma(), slowing process
cleanup and handicapping the OOM killer.
This replacement consumes less than 1ms, under the same conditions.
Signed-off-by: John Dykstra <jdykstra@cray.com> on behalf of Cray Inc.
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1337980366.1979.6.camel@redwood
[ Small stylistic cleanups and renames ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
|
|
On s390 access_ok is a macro which discards all parameters and always
returns 1. This can result in compile warnings which warn about unused
variables like this:
fs/read_write.c: In function 'rw_copy_check_uvector':
fs/read_write.c:684:16: warning: unused variable 'buf' [-Wunused-variable]
Fix this by adding a __range_ok() function which consumes all parameters
but still always returns 1.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
Now that hopefully all cmpxchg/xchg bugs have been fixed select
HAVE_CMPXCHG_LOCAL option which uncovered a couple of bugs on s390.
The only call site which is affected seems to be within mm/vmstat.c.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
For 1 and 2 byte operands for xchg and cmpxchg the old and new values
get or'ed into the larger 4 byte old value before the compare and swap
instruction gets executed. This is done without using the proper byte
mask before or'ing the values.
If the caller passed in negative old or new values these got sign
extended by the caller. Which in turn means that either the old value
never matches, or, even worse, unrelated bytes would be changed in memory.
Luckily there don't seem to be any callers around yet, since that would
have resulted in the specification exception fixed in an earlies patch.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
When accessing a 1 or 2 byte memory operand we cannot use the
passed address since the compare and swap instruction only works
for 4 byte aligned memory operands.
Hence we calculate an aligned address so that compare and swap works
correctly. However we don't pass the calculated address to the inline
assembly. This results in incorrect memory accesses and in a
specification exception if used on non 4 byte aligned memory operands.
Since this didn't happen until now, there don't seem to be
too many users of cmpxchg on unaligned addresses.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
The cmpxchg macros and functions are a bit different than on other
architectures. In particular the macros do not store the return
value of a __cmpxchg function call in a variable before returning the
value.
This causes compile warnings that only occur on s390 like this one:
net/ipv4/af_inet.c: In function 'build_ehash_secret':
net/ipv4/af_inet.c:241:2: warning: value computed is not used [-Wunused-value]
To get rid of these warnings use the same construct that we already use
for the xchg macro, which was introduced for the same reason.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
All cmpxchg functions imply a memory barrier.
cmpxch64 did not have one for 31 bit code, so add it.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
It has been a big mistage to add the capabilities attribute to the
cpus in sysfs:
First the attribute only contains the cpu capability of primary cpus,
which however is not necessarily (or better: unlikely) the type of
cpu the kernel runs on, which is typically an IFL.
In addition all information that is necessary is available in
/proc/sysinfo already. So this attribute partially duplicated
informations.
So programs should look into the sysinfo file to retrieve all
informations they are interested in.
Since with this kernel release also the powersavings cpu attributes
are removed this seems to be a good opportunity to remove another
broken interface.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
If the IPL CPU is offline, currently the pcpu_delegate() function
used by smp_call_ipl_cpu() does not work because pcpu_delegate()
modifies the lowcore of the target CPU. In case of an offline
IPL CPU currently the prefix register is zero but pcpu->lowcore
still points to the old prefix page. Therefore the lowcore changes
done by pcpu_delegate() have no effect.
With this fix pcpu_delegate() now uses memcpy_absolute() and therefore
also prepares the absolute zero lowcore if the target CPU has prefix
register zero.
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
This patch introduces the new function memcpy_absolute() that allows to
copy memory using absolute addressing. This means that the prefix swap
does not apply when this function is used.
With this patch also all s390 kernel code that accesses absolute zero
now uses the new memcpy_absolute() function. The old and less generic
copy_to_absolute_zero() function is removed.
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 trampoline rework from H. Peter Anvin:
"This code reworks all the "trampoline"/"realmode" code (various bits
that need to live in the first megabyte of memory, most but not all of
which runs in real mode at some point) in the kernel into a single
object. The main reason for doing this is that it eliminates the last
place in the kernel where we needed pages to be mapped RWX. This code
separates all that code into proper R/RW/RX pages."
Fix up conflicts in arch/x86/kernel/Makefile (mca removed next to reboot
code), and arch/x86/kernel/reboot.c (reboot code moved around in one
branch, modified in this one), and arch/x86/tools/relocs.c (mostly same
code came in earlier due to working around the ld bugs just before the
3.4 release).
Also remove stale x86-relocs entry from scripts/.gitignore as per Peter
Anvin.
* commit '61f5446169046c217a5479517edac3a890c3bee7': (36 commits)
x86, realmode: Move end signature into header.S
x86, relocs: When printing an error, say relative or absolute
x86, relocs: More relocations which may end up as absolute
x86, relocs: Workaround for binutils 2.22.52.0.1 section bug
xen-acpi-processor: Add missing #include <xen/xen.h>
acpi, bgrd: Add missing <linux/io.h> to drivers/acpi/bgrt.c
x86, realmode: Change EFER to a single u64 field
x86, realmode: Move kernel/realmode.c to realmode/init.c
x86, realmode: Move not-common bits out of trampoline_common.S
x86, realmode: Mask out EFER.LMA when saving trampoline EFER
x86, realmode: Fix no cache bits test in reboot_32.S
x86, realmode: Make sure all generated files are listed in targets
x86, realmode: build fix: remove duplicate build
x86, realmode: read cr4 and EFER from kernel for 64-bit trampoline
x86, realmode: fixes compilation issue in tboot.c
x86, realmode: move relocs from scripts/ to arch/x86/tools
x86, realmode: header for trampoline code
x86, realmode: flattened rm hierachy
x86, realmode: don't copy real_mode_header
x86, realmode: fix 64-bit wakeup sequence
...
|
|
Pull MIPS updates from Ralf Baechle:
"The whole series has been sitting in -next for quite a while with no
complaints. The last change to the series was before the weekend the
removal of an SPI patch which Grant - even though previously acked by
himself - appeared to raise objections. So I removed it until the
situation is clarified. Other than that all the patches have the acks
from their respective maintainers, all MIPS and x86 defconfigs are
building fine and I'm not aware of any problems introduced by this
series.
Among the key features for this patch series is a sizable patchset for
Lantiq which among other things introduces support for Lantiq's
flagship product, the FALCON SOC. It also means that the opensource
developers behind this patchset have overtaken Lantiq's competing
inhouse development team that was working behind closed doors.
Less noteworthy the ath79 patchset which adds support for a few more
chip variants, cleanups and fixes. Finally the usual dose of tweaking
of generic code."
Fix up trivial conflicts in arch/mips/lantiq/xway/gpio_{ebu,stp}.c where
printk spelling fixes clashed with file move and eventual removal of the
printk.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (81 commits)
MIPS: lantiq: remove orphaned code
MIPS: Remove all -Wall and almost all -Werror usage from arch/mips.
MIPS: lantiq: implement support for FALCON soc
MTD: MIPS: lantiq: verify that the NOR interface is available on falcon soc
MTD: MIPS: lantiq: implement OF support
watchdog: MIPS: lantiq: implement OF support and minor fixes
SERIAL: MIPS: lantiq: implement OF support
GPIO: MIPS: lantiq: convert gpio-stp-xway to OF
GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio
GPIO: MIPS: lantiq: move gpio-stp and gpio-ebu to the subsystem folder
MIPS: pci: convert lantiq driver to OF
MIPS: lantiq: convert dma to platform driver
MIPS: lantiq: implement support for clkdev api
MIPS: lantiq: drop ltq_gpio_request() and gpio_to_irq()
OF: MIPS: lantiq: implement irq_domain support
OF: MIPS: lantiq: implement OF support
MIPS: lantiq: drop mips_machine support
OF: PCI: const usage needed by MIPS
MIPS: Cavium: Remove smp_reserve_lock.
MIPS: Move cache setup to setup_arch().
...
|
