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2021-06-16ata: ahci: Ensure initialised fields are not overwritten in AHCI_SHT()Lee Jones
Fixes the following W=1 kernel build warning(s): In file included from drivers/ata/ahci_platform.c:21: drivers/ata/ahci.h:388:16: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_platform.c:40:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:388:16: note: (near initialization for ‘ahci_platform_sht.can_queue’) drivers/ata/ahci_platform.c:40:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_platform.c:40:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: note: (near initialization for ‘ahci_platform_sht.sdev_attrs’) drivers/ata/ahci_platform.c:40:2: note: in expansion of macro ‘AHCI_SHT’ In file included from drivers/ata/ahci_mtk.c:18: drivers/ata/ahci.h:388:16: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_mtk.c:41:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:388:16: note: (near initialization for ‘ahci_platform_sht.can_queue’) drivers/ata/ahci_mtk.c:41:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_mtk.c:41:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: note: (near initialization for ‘ahci_platform_sht.sdev_attrs’) drivers/ata/ahci_mtk.c:41:2: note: in expansion of macro ‘AHCI_SHT’ In file included from drivers/ata/ahci_dm816.c:16: drivers/ata/ahci.h:388:16: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_dm816.c:138:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:388:16: note: (near initialization for ‘ahci_dm816_platform_sht.can_queue’) drivers/ata/ahci_dm816.c:138:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: warning: initialized field overwritten [-Woverride-init] drivers/ata/ahci_dm816.c:138:2: note: in expansion of macro ‘AHCI_SHT’ drivers/ata/ahci.h:392:17: note: (near initialization for ‘ahci_dm816_platform_sht.sdev_attrs’) drivers/ata/ahci_dm816.c:138:2: note: in expansion of macro ‘AHCI_SHT’ NB: Snipped 150 lines of this for brevity! Cc: Jens Axboe <axboe@kernel.dk> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Tejun Heo <tj@kernel.org> Cc: ALWAYS copy <linux-ide@vger.kernel.org> Cc: linux-ide@vger.kernel.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20210528090502.1799866-3-lee.jones@linaro.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-03-31ata: ahci: Disable SXS for Hisilicon Kunpeng920Xingui Yang
On Hisilicon Kunpeng920, ESP is set to 1 by default for all ports of SATA controller. In some scenarios, some ports are not external SATA ports, and it cause disks connected to these ports to be identified as removable disks. So disable the SXS capability on the software side to prevent users from mistakenly considering non-removable disks as removable disks and performing related operations. Signed-off-by: Xingui Yang <yangxingui@huawei.com> Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Link: https://lore.kernel.org/r/1615544676-61926-1-git-send-email-luojiaxing@huawei.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-10-09ata: ahci: mvebu: Make SATA PHY optional for Armada 3720Pali Rohár
Older ATF does not provide SMC call for SATA phy power on functionality and therefore initialization of ahci_mvebu is failing when older version of ATF is using. In this case phy_power_on() function returns -EOPNOTSUPP. This patch adds a new hflag AHCI_HFLAG_IGN_NOTSUPP_POWER_ON which cause that ahci_platform_enable_phys() would ignore -EOPNOTSUPP errors from phy_power_on() call. It fixes initialization of ahci_mvebu on Espressobin boards where is older Marvell's Arm Trusted Firmware without SMC call for SATA phy power. This is regression introduced in commit 8e18c8e58da64 ("arm64: dts: marvell: armada-3720-espressobin: declare SATA PHY property") where SATA phy was defined and therefore ahci_platform_enable_phys() on Espressobin started failing. Fixes: 8e18c8e58da64 ("arm64: dts: marvell: armada-3720-espressobin: declare SATA PHY property") Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> Cc: <stable@vger.kernel.org> # 5.1+: ea17a0f153af: phy: marvell: comphy: Convert internal SMCC firmware return codes to errno Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-04-07ata: ahci: Add sysfs attribute to show remapped NVMe device countKai-Heng Feng
Add a new sysfs attribute to show how many NVMe devices are remapped. Userspace like distro installer can use this info to ask user to change the BIOS setting. Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-08-30libata/ahci: Drop PCS quirk for Denverton and beyondDan Williams
The Linux ahci driver has historically implemented a configuration fixup for platforms / platform-firmware that fails to enable the ports prior to OS hand-off at boot. The fixup was originally implemented way back before ahci moved from drivers/scsi/ to drivers/ata/, and was updated in 2007 via commit 49f290903935 "ahci: update PCS programming". The quirk sets a port-enable bitmap in the PCS register at offset 0x92. This quirk could be applied generically up until the arrival of the Denverton (DNV) platform. The DNV AHCI controller architecture supports more than 6 ports and along with that the PCS register location and format were updated to allow for more possible ports in the bitmap. DNV AHCI expands the register to 32-bits and moves it to offset 0x94. As it stands there are no known problem reports with existing Linux trying to set bits at offset 0x92 which indicates that the quirk is not applicable. Likely it is not applicable on a wider range of platforms, but it is difficult to discern which platforms if any still depend on the quirk. Rather than try to fix the PCS quirk to consider the DNV register layout instead require explicit opt-in. The assumption is that the OS driver need not touch this register, and platforms can be added with a new boad_ahci_pcs7 board-id when / if problematic platforms are found in the future. The logic in ahci_intel_pcs_quirk() looks for all Intel AHCI instances with "legacy" board-ids and otherwise skips the quirk if the board was matched by class-code. Reported-by: Stephen Douthit <stephend@silicom-usa.com> Cc: Christoph Hellwig <hch@infradead.org> Reviewed-by: Stephen Douthit <stephend@silicom-usa.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 18Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program see the file copying if not write to the free software foundation 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 52 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154042.342335923@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-11ata: libahci_platform: comply to PHY frameworkMiquel Raynal
Current implementation of the libahci does not take into account the new PHY framework. Correct the situation by adding a call to phy_set_mode() before phy_power_on(). PHYs should also be handled at suspend/resume time. For this, call ahci_platform_enable/disable_phys() at suspend/resume_host() time. These calls are guarded by a HFLAG (AHCI_HFLAG_SUSPEND_PHYS) that the user of the libahci driver must set manually in hpriv->flags at probe time. This is to avoid breaking users that have not been tested with this change. Reviewed-by: Hans de Goede <hdegoede@redhat.com> Suggested-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-03ata: ahci_platform: add support for PHY controller regulatorCorentin Labbe
The SoC R40 AHCI controller need a PHY regulator to work. But since the PHY is embedded in the controller, we cannot do a DT node for it, since phy-supply works only in node with a PHY compatible. So this patch adds a way to add an optional phy-supply regulator on AHCI controller node. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-09-03ata: ahci_platform: add support for AHCI controller regulatorCorentin Labbe
The SoC R40 AHCI controller need a regulator to work. So this patch add a way to add an optional regulator on AHCI controller. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2018-08-22ata: libahci_platform: add reset control supportKunihiko Hayashi
Add support to get and control a list of resets for the device as optional and shared. These resets must be kept de-asserted until the device is enabled. This is specified as shared because some SoCs like UniPhier series have common reset controls with all ahci controller instances. However, according to Thierry's view, https://www.spinics.net/lists/linux-ide/msg55357.html some hardware-specific drivers already use their own resets, and the common reset make a path to occur double controls of resets. The ahci_platform_get_resources() can get and control the reset only when the second argument includes AHCI_PLATFORM_GET_RESETS bit. Suggested-by: Hans de Goede <hdegoede@redhat.com> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-06-05Merge branch 'for-4.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: - libata has always been limiting the maximum queue depth to 31, with one entry set aside mostly for historical reasons. This didn't use to make much difference but Jens found out that modern hard drives can actually perform measurably better with the extra one queue depth. Jens updated libata core so that it can make use of full 32 queue depth - Damien updated command retry logic in error handling so that it doesn't unnecessarily retry when upper layer (SCSI) is gonna handle them - A couple misc changes * 'for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: sata_fsl: use the right type for tag bitshift ahci: enable full queue depth of 32 libata: don't clamp queue depth to ATA_MAX_QUEUE - 1 libata: add extra internal command sata_nv: set host can_queue count appropriately libata: remove assumption that ATA_MAX_QUEUE - 1 is the max libata: use ata_tag_internal() consistently libata: bump ->qc_active to a 64-bit type libata: convert core and drivers to ->hw_tag usage libata: introduce notion of separate hardware tags libata: Fix command retry decision libata: Honor RQF_QUIET flag libata: Make ata_dev_set_mode() less verbose libata: Fix ata_err_string() libata: Fix comment typo in ata_eh_analyze_tf() sata_nv: don't use block layer bounce buffer ata: hpt37x: Convert to use match_string() helper
2018-05-11ahci: enable full queue depth of 32Jens Axboe
This changes the AHCI queue depth from 31 to 32, as libata now fully supports it. Now regular IO requests can utilize the full tag space of SATA, not just 31. For IOPS constrained workloads, this can result in a ~3% bump in performance. Signed-off-by: Jens Axboe <axboe@kernel.dk> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-04-26libahci: Allow drivers to override stop_engineEvan Wang
Marvell armada37xx, armada7k and armada8k share the same AHCI sata controller IP, and currently there is an issue (Errata Ref#226)that the SATA can not be detected via SATA Port-MultiPlayer(PMP). After debugging, the reason is found that the value of Port-x FIS-based Switching Control (PxFBS@0x40) became wrong. According to design, the bits[11:8, 0] of register PxFBS are cleared when Port Command and Status (0x18) bit[0] changes its value from 1 to 0, i.e. falling edge of Port Command and Status bit[0] sends PULSE that resets PxFBS bits[11:8; 0]. So it needs save the port PxFBS register before PxCMD ST write and restore the port PxFBS register afterwards in ahci_stop_engine(). This commit allows drivers to override ahci_stop_engine behavior for use by the Marvell AHCI driver(and potentially other drivers in the future). Signed-off-by: Evan Wang <xswang@marvell.com> Cc: Ofer Heifetz <oferh@marvell.com> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-04-09Revert "ata: ahci-platform: add reset control support"Kunihiko Hayashi
This reverts commit f0f56716fc3e5d547fd7811eb218a30ed0695605. According to Thierry's view, https://www.spinics.net/lists/linux-ide/msg55357.html some hardware-specific drivers already use their own resets, and the common reset might make a path to occur double controls of resets. For now, revert the commit that adds reset control support to ahci-platform, and hold until the solution is confirmed not be affect all hardware-specific drivers. Fixes: f0f56716fc3e ("ata: ahci-platform: add reset control support") Reported-by: Thierry Reding <thierry.reding@gmail.com> Suggested-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2018-03-26ata: ahci-platform: add reset control supportKunihiko Hayashi
Add support to get and control a list of resets for the device as optional and shared. These resets must be kept de-asserted until the device is enabled. This is specified as shared because some SoCs like UniPhier series have common reset controls with all ahci controller instances. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-12-11ahci: Allow setting a default LPM policy for mobile chipsetsHans de Goede
On many laptops setting a different LPM policy then unknown / max_performance can lead to power-savings of 1.0 - 1.5 Watts (when idle). Modern ultrabooks idle around 6W (at 50% screen brightness), 1.0 - 1.5W is a significant chunk of this. There are some performance / latency costs to enabling LPM by default, so it is desirable to make it possible to set a different LPM policy for mobile / laptop variants of chipsets / "South Bridges" vs their desktop / server counterparts. Also enabling LPM by default is not entirely without risk of regressions. At least min_power is known to cause issues with some disks, including some reports of data corruption. This commits adds a new ahci.mobile_lpm_policy kernel cmdline option, which defaults to a new SATA_MOBILE_LPM_POLICY Kconfig option so that Linux distributions can choose to set a LPM policy for mobile chipsets by default. The reason to have both a kernel cmdline option and a Kconfig default value for it, is to allow easy overriding of the default to allow trouble-shooting without needing to rebuild the kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-10-19ahci: Convert timers to use timer_setup()Kees Cook
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Adds a pointer back to link structure. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org Link: https://lkml.kernel.org/r/20171016215658.GA101965@beast
2017-06-22libata: Add the AHCI_HFLAG_NO_WRITE_TO_RO flagDoug Berger
While most hardware will simply ignore a write to a read-only register, some hardware will signal an abort if this occurs. This commit introduces the flag AHCI_HFLAG_NO_WRITE_TO_RO to prevent the AHCI library from attempting to write to the HOST_CAP, HOST_CAP2, and HOST_PORTS_IMPL registers which may be read-only. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-06-22libata: Add the AHCI_HFLAG_YES_ALPM flagDoug Berger
Some hardware is capable of supporting Aggresive Link Power Management even though it is not indicated by the Host Capability register. This commit adds the AHCI_HFLAG_YES_ALPM flag to the AHCI library to allow indication of this quirk when the Host Capability register is Read Only and therefore cannot be changed. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-05-16ata: update references for libata documentationMauro Carvalho Chehab
The libata documentation is now using ReST. Update references to it to point to the new place. Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com> Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2017-01-31sata: ahci: export ahci_do_hardreset() locallyBartosz Golaszewski
We need a way to retrieve the information about the online state of the link in the ahci-da850 driver. Create a new function: ahci_do_hardreset() which is called from ahci_hardreset() for backwards compatibility, but has an additional argument: 'online' - which can be used to check if the link is online after this function returns. The new routine will be used in the ahci-da850 driver to avoid code duplication when implementing a workaround for tha da850 SATA controller quirk/instability. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2016-09-06ahci: use pci_alloc_irq_vectorsChristoph Hellwig
Use the new pci_alloc_irq_vectors API to allocate MSI-X and MSI vectors. The big advantage over the old code is that we can use the same API for MSI and MSI-X, and that we don't need to store the MSI-X vector mapping in driver-private data structures. This first conversion keeps the probe order as-is: MSI-X multi vector, MSI multi vector, MSI single vector, MSI-X single vector and last a single least legacy interrupt line. There is one small change of behavior: we now check the "MSI Revert to Single Message" flag for MSI-X in addition to MSI. Because the API to find the Linux IRQ number for a MSI/MSI-X vector is PCI specific, but libahaci is bus-agnostic I had to a get_irq_vector function pointer to struct ahci_host_priv. The alternative would be to move the multi-vector case of ahci_host_activate to ahci.c and just call ata_host_activate directly from the others users of ahci_host_activate. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-19ahci: Cache host controller versionMika Westerberg
This allows sysfs nodes to read the cached value directly instead of powering up possibly runtime suspended controller. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-02-11ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.Suman Tripathi
The flexibility to override the irq handles in the LLD's are already present, so controllers implementing a edge trigger latch can implement their own interrupt handler inside the driver. This patch removes the AHCI_HFLAG_EDGE_IRQ support from libahci and moves edge irq handling to ahci_xgene. tj: Minor update to description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kenrel.org>
2016-02-11libahci: Implement the capability to override the generic ahci interrupt ↵Suman Tripathi
handler. This patch implements the capability to override the generic AHCI interrupt handler so that specific ahci drivers can implement their own custom interrupt handler routines. It also exports ahci_handle_port_intr so that custom irq_handler implementations can use it. tj: s/ahci_irq_handler/irq_handler/ and updated description. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2016-01-25drivers: ata: wake port before DMA stop for ALPMDanesh Petigara
The AHCI driver code stops and starts port DMA engines at will without considering the power state of the particular port. The AHCI specification isn't very clear on how to handle this scenario, leaving implementation open to interpretation. Broadcom's STB SATA host controller is unable to handle port DMA controller restarts when the port in question is in low power mode. When a port enters partial or slumber mode, its PHY is powered down. When a controller restart is requested, the controller's internal state machine expects the PHY to be brought back up by software which never happens in this case, resulting in failures. To avoid this situation, logic is added to manually wake up the port just before its DMA engine is stopped, if the port happens to be in a low power state. HBA initiated power management ensures that the port eventually returns to its configured low power state, when the link is idle (as per the conditions listed in the spec). A new host flag is also added to ensure this logic is only exercised for hosts with the above limitation. tj: Formatting changes. Signed-off-by: Danesh Petigara <dpetigara@broadcom.com> Reviewed-by: Markus Mayer <mmayer@broadcom.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-12-07ahci: compile out msi/msix infrastructureDan Williams
Quoting Arnd: The AHCI driver is used for some on-chip devices that do not use PCI for probing, and it can be built even when CONFIG_PCI is disabled, but that now results in a build failure: ata/libahci.c: In function 'ahci_host_activate_multi_irqs': ata/libahci.c:2475:4: error: invalid use of undefined type 'struct msix_entry' ata/libahci.c:2475:21: error: dereferencing pointer to incomplete type 'struct msix_entry' Add ifdef CONFIG_PCI_MSI infrastructure to compile out the multi-msi and multi-msix code. Reported-by: Arnd Bergmann <arnd@arndb.de> Tested--by: Arnd Bergmann <arnd@arndb.de> [arnd: fix up pci enabled case] Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Fixes: d684a90d38e2 ("ahci: per-port msix support") Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16ahci: kill 'intr_status'Dan Williams
This field in achi_port_priv was only used to support threaded interrupts. Now that we are hardirq only it can be deleted. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16ahci: per-port msix supportDan Williams
Some AHCI controllers support per-port MSI-X vectors. At the same time the Linux AHCI driver needs to support one-off architectures that implement a single MSI-X vector for all ports. The heuristic for enabling AHCI ports becomes, in order of preference: 1/ per-port multi-MSI-X 2/ per-port multi-MSI 3/ single MSI 4/ single MSI-X 5/ legacy INTX This all depends on AHCI implementations with potentially broken MSI-X requesting less vectors than the number of ports. If this assumption is violated we will need to start explicitly white-listing AHCI-MSIX implementations. Reported-by: Ricardo Neri <ricardo.neri@intel.com> [ricardo: fix struct msix_entry handling] Reported-by: kernel test robot <ying.huang@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-09-30ata: ahci: find eSATA ports and flag them as removableManuel Lauss
If the AHCI ports' HPCP or ESP bits are set, the port should be considered external (e.g. eSATA) and is marked as removable. Userspace tools like udisks then treat it like an usb drive. With this patch applied, when I plug a drive into the esata port, KDE pops up a window asking what to do with the drives(s), just like it does for any random USB stick. Removability is indicated to the upper layers by way of the SCSI RMB bit, as I haven't found another way to signal userspace to treat a sata disk like any usb stick. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-06-03ahci: Store irq number in struct ahci_host_privRobert Richter
Currently, ahci supports only msi and intx. To also support msix the handling of the irq number need to be changed. The irq number for msix devices is taken from msi_list instead of pci_dev. Thus, the irq number of a device needs to be stored in struct ahci_host_priv now. This allows the host controller to be activated in a generic way. This change is only intended for ahci drivers. For that reason the irq number is stored in struct ahci_host_priv used only by ahci drivers. Thus, the ABI changes only for ahci_host_activate(), but existing ata drivers (about 50) are unaffected and keep unchanged. All users of ahci_host_activate() have been updated. While touching drivers/ata/libahci.c, doing a small code cleanup in ahci_port_start(). Signed-off-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-05-10libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.Suman Tripathi
This patch adds the support to handle HOST_IRQ_STAT as edge trigger latch. Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2015-01-28ata: ahci_platform: fix owner module reference mismatch for scsi hostAkinobu Mita
The owner module reference of the ahci platform's scsi_host is initialized to libahci_platform's one, because these drivers use a scsi_host_template defined in libahci_platform. So these drivers can be unloaded even if the scsi device is being accessed. This fixes it by pushing the scsi_host_template from libahci_platform to all leaf drivers. The scsi_host_template is passed through a new argument of ahci_platform_init_host(). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Christoph Hellwig <hch@lst.de> Cc: "James E.J. Bottomley" <JBottomley@parallels.com> Cc: linux-ide@vger.kernel.org Cc: linux-scsi@vger.kernel.org
2015-01-19ata: libahci: Allow using multiple regulatorsGregory CLEMENT
The current implementation of the libahci allows using multiple PHYs but not multiple regulators. This patch adds the support of multiple regulators. Until now it was mandatory to have a PHY under a subnode, now a port subnode can contain either a regulator or a PHY (or both). In order to be able to asociate a port with a regulator the port are now a platform device in the device tree case. There was only one driver which used directly the regulator field of the ahci_host_priv structure. To preserve the bisectability the change in the ahci_imx driver was done in the same patch. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-10-06AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI modeAlexander Gordeev
As described in AHCI v1.0 specification chapter 10.6.2.2 "Multiple MSI Based Messages" generation of interrupts is not controlled through the HOST_IRQ_STAT register. Considering MMIO access is expensive remove unnecessary reading and writing of HOST_IRQ_STAT register. Further, serializing access to the host data is no longer needed and the interrupt service routine can avoid competing on the host lock. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Suggested-by: "Jiang, Dave" <dave.jiang@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: "Jiang, Dave" <dave.jiang@intel.com> Cc: linux-ide@vger.kernel.org
2014-10-06AHCI: Move host activation code into ahci_host_activate()Alexander Gordeev
Currently host activation done by calling either function ahci_host_activate() or ata_host_activate(). Consolidate the code by only calling ahci_host_activate() for all AHCI devices. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
2014-10-06AHCI: Pass SCSI host template as arg to ahci_host_activate()Alexander Gordeev
This update is a prerequisite for consolidation of AHCI host activation code within ahci_host_activate() function. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
2014-09-28AHCI: Cleanup checking of multiple MSIs/SLM modesAlexander Gordeev
Sharing Last Message (SLM) mode is currently checked in two functions: ahci_host_activate() and ahci_init_interrupts(). This update consolidates SLM mode check with activation of multiple MSIs mode. Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: linux-ide@vger.kernel.org
2014-09-23ahci-platform: Bump max number of clocks to 5Kumar Gala
Qualcomm IPQ806x SoCs with SATA controllers need 5 clocks to be enabled. Signed-off-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-07-30ata: libahci: allow to use multiple PHYsAntoine Ténart
The current implementation of the libahci does not allow to use multiple PHYs. This patch adds the support of multiple PHYs by the libahci while keeping the old bindings valid for device tree compatibility. This introduce a new way of defining SATA ports in the device tree, with one port per sub-node. This as the advantage of allowing a per port configuration. Because some ports may be accessible but disabled in the device tree, the port_map mask is computed automatically when using this. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-07-30ata: libahci_platform: move port_map parameters into the AHCI structureAntoine Ténart
This patch moves force_port_map and mask_port_map into the ahci_host_priv structure. This allows to modify them into the AHCI framework. This is needed by the new dt bindings representing ports as the port_map mask is computed automatically. Parameters modifying force_port_map, mask_port_map and flags have been removed from the ahci_platform_init_host() function, and inputs in the ahci_host_priv structure are now directly filed. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-07-30Merge branch 'for-3.16-fixes' of ↵Tejun Heo
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata into for-3.17 The scheduled ahci platform patches depend on change in for-3.16-fixes. Pull it into for-3.17. Signed-off-by: Tejun Heo <tj@kernel.org>
2014-07-18ata: ahci_platform: Increase AHCI_MAX_CLKS to 4Mikko Perttunen
The Tegra124 SATA controller requires 4 clocks. Increase this constant to be able to use them all. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-07-08libahci: export ahci_qc_issue() and ahci_start_fix_rx()Suman Tripathi
The subsequent patch will make use of them. Signed-off-by: Loc Ho <lho@apm.com> Signed-off-by: Suman Tripathi <stripathi@apm.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-06-09Merge branch 'for-3.16' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "Nothing too interesting - another ahci platform driver variant, additional controller support, minor fixes and cleanups" * 'for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ahci: Add Device ID for HighPoint RocketRaid 642L ata: ep93xx: use dmaengine_prep_slave_sg api instead of internal callback ahci: add PCI ID for Marvell 88SE91A0 SATA Controller sata_fsl: remove check for CONFIG_MPC8315_DS ahci: add support for Hisilicon sata libahci_platform: add host_flags parameter in ahci_platform_init_host() ata: ahci: append new hflag AHCI_HFLAG_NO_FBS ata: use CONFIG_PM_SLEEP instead of CONFIG_PM where applicable in host drivers ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces Documentation: dt-bindings: reformat and order list of ahci-platform compatibles libata-sff: remove dead code ata: SATL compliance for Inquiry Product Revision pata_octeon_cf: use devm_kzalloc() to allocate cf_port
2014-05-14ata: ahci: append new hflag AHCI_HFLAG_NO_FBSKefeng Wang
Append AHCI_HFLAG_NO_FBS to force turning off FBS flag. Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-04-24ahci: disable DEVSLP for Intel ValleyviewJacob Pan
On Intel Valleyview SoC, SATA device sleep is not reliable. When DEVSLP is attempted on certain SSDs, port_devslp write would fail and result in malfunction of AHCI controller. AHCI controller may be not shown in PCI enumeration after reset. Complete power source removal may be required to recover from this failure. So we blacklist this device and override host device reported capabilities such that device LPM will only attempt slumber but not DEVSLP. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-04-17ahci: Ensure "MSI Revert to Single Message" mode is not enforcedAlexander Gordeev
The AHCI specification allows hardware to choose to revert to single MSI mode when fewer messages are allocated than requested. Yet, at least ICH10 chipset reverts to single MSI mode even when enough messages are allocated in some cases (see below). This update forces the driver to not rely on initialization of multiple MSIs mode alone and always check if "MSI Revert to Single Message" (MRSM) mode was enforced by the controller and fallback to the single MSI mode in case it did. That prevents a situation when the driver configured multiple per-port IRQ handlers, but the controller sends all port's interrupts to a single IRQ, which could easily screw up the interrupt handling and lead to delays and possibly crashes. The fix was tested on a 6-port controller that successfully reverted to the single MSI mode: 00:1f.2 SATA controller: Intel Corporation 82801JI (ICH10 Family) SATA AHCI Controller (prog-if 01 [AHCI 1.0]) Subsystem: Super Micro Computer Inc Device 10a7 Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 101 I/O ports at f110 [size=8] I/O ports at f100 [size=4] I/O ports at f0f0 [size=8] I/O ports at f0e0 [size=4] I/O ports at f020 [size=32] Memory at fbf00000 (32-bit, non-prefetchable) [size=2K] Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit- Capabilities: [70] Power Management version 3 Capabilities: [a8] SATA HBA v1.0 Capabilities: [b0] PCI Advanced Features Kernel driver in use: ahci With 6 ports just 8 MSI vectors should be enough, but the adapter enforces the MRSM mode when less than 16 vectors are written to the Multiple Messages Enable PCI register. I instigated MRSM mode by forcing @nvec to 8 in ahci_init_interrupts(). Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Cc: linux-ide@vger.kernel.org Cc: stable@vger.kernel.org Signed-off-by: Tejun Heo <tj@kernel.org>
2014-02-22ata: ahci_platform: runtime resume the device before useRoger Quadros
On OMAP platforms the device needs to be runtime resumed before it can be accessed. The OMAP HWMOD framework takes care of enabling the module and its resources based on the device's runtime PM state. In this patch we runtime resume during .probe() and runtime suspend after .remove(). We also update the runtime PM state during .resume(). CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-02-22ata: ahci_platform: Manage SATA PHYRoger Quadros
Some platforms have a PHY hooked up to the SATA controller. The PHY needs to be initialized and powered up for SATA to work. We do that using the PHY framework. tj: Minor comment formatting updates. CC: Balaji T K <balajitk@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo<tj@kernel.org>