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path: root/drivers/clk/imx/clk-scu.h
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2021-06-14clk: imx8qm: add clock valid resource checkingDong Aisheng
Add imx8qm clock valid resource checking mechanism Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-06-14clk: imx8qxp: add clock valid checking mechnismDong Aisheng
clk-imx8qxp is a common SCU clock driver used by both QM and QXP platforms. The clock numbers vary a bit between those two platforms. This patch introduces a mechanism to only register the valid clocks for one platform by checking the clk resource id table. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-06-14clk: imx: scu: add gpr clocks supportDong Aisheng
SCU clock protocol supports a few clocks based on GPR controller registers including mux/divider/gate. Add a generic clock register API to support them all. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-06-14clk: imx: scu: remove legacy scu clock binding supportDong Aisheng
Legacy scu clock binding are not maintained anymore, it has a very limited clocks supported during initial upstreaming and obviously unusable by products. So it's meaningless to keep it in kernel which worse the code readability. Remove it to keep code much cleaner. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2020-10-26clk: imx: lpcg: add suspend/resume supportDong Aisheng
LPCG clock state may be lost when it's power domain is completely off during system suspend/resume and we need save and restore the state properly. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-26clk: imx: lpcg: allow lpcg clk to take device pointerDong Aisheng
Used to support runtime pm. Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-26clk: imx: imx8qxp-lpcg: add parsing clocks from device treeDong Aisheng
One LPCG controller supports up to 8 clock outputs while each of them is fixed to 4 bits. It supports only gating function with fixed bits. So we can use the clk-indices to fetch the corresponding clock idx from device tree. With this way, we can write a generic LPCG clock drivers. This patch add that support to parse clocks from device tree. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-26clk: imx: scu: allow scu clk to take device pointerDong Aisheng
Used to support runtime pm. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-26clk: imx: scu: add two cells binding supportDong Aisheng
This patch implements the new two cells binding for SCU clocks. The usage is as follows: clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER> Due to each SCU clock is associated with a power domain, without power on the domain, the SCU clock can't work. So we create platform devices for each domain clock respectively and manually attach the required domain before register the clock devices, then we can register clocks in the clock platform driver accordingly. Note because we do not have power domain info in device tree and the SCU resource ID is the same for power domain and clock, so we use resource ID to find power domains. Later, we will also use this clock platform driver to support suspend/resume and runtime pm. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-02-21clk: imx: scu: add set parent supportAisheng Dong
Add clk scu set parents support. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Remove le32_to_cpu() on get_parent op] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-14clk: imx: add lpcg clock supportAisheng Dong
The Low-Power Clock Gate (LPCG) modules contain a local programming model to control the clock gates for the peripherals. An LPCG module is used to locally gate the clocks for the associated peripheral. And they're bedind the SCU clock. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-12-13clk: imx: add scu clock common partAisheng Dong
Add SCU clock common part which will be used by client clock drivers. SCU clocks are totally different from the legacy clocks (No much legacy things can be reused), it's using a firmware interface now based on SCU protocol. So a new configuration option CONFIG_MXC_CLK_SCU is added. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Mark ccm_ipc_handle static] Signed-off-by: Stephen Boyd <sboyd@kernel.org>