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path: root/drivers/clk/ingenic
AgeCommit message (Expand)Author
2018-01-18clk: Add Ingenic jz4770 CGU driverPaul Cercueil
2018-01-18clk: ingenic: Add code to enable/disable PLLsPaul Cercueil
2018-01-18clk: ingenic: support PLLs with no bypass bitPaul Cercueil
2018-01-18clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil
2018-01-18clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil
2017-11-03Update MIPS email addressesPaul Burton
2016-05-12clk: ingenic: Allow divider value to be dividedHarvey Hunt
2015-07-20clk: ingenic: Include clk.hStephen Boyd
2015-06-21clk: ingenic: add JZ4780 CGU supportPaul Burton
2015-06-21MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton
2015-06-21MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton
2015-06-21MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton
2015-06-21MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton
2015-06-21clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton
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