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path: root/drivers/clk/meson
AgeCommit message (Expand)Author
2022-06-15clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled()Uwe Kleine-König
2022-03-11clk: cleanup commentsTom Rix
2021-11-30clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBBMartin Blumenstingl
2021-09-23clk: meson: meson8b: Make the video clock trees mutableMartin Blumenstingl
2021-09-23clk: meson: meson8b: Initialize the HDMI PLL registersMartin Blumenstingl
2021-09-23clk: meson: meson8b: Add the HDMI PLL M/N parametersMartin Blumenstingl
2021-09-23clk: meson: meson8b: Add the vid_pll_lvds_en gate clockMartin Blumenstingl
2021-09-23clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_selMartin Blumenstingl
2021-09-23clk: meson: meson8b: Export the video clocksMartin Blumenstingl
2021-06-30clk: meson: regmap: switch to determine_rate for the dividersMartin Blumenstingl
2021-06-09clk: meson: g12a: Add missing NNA source clocks for g12bNick Xie
2021-05-24clk: meson: axg-audio: improve deferral handlingJerome Brunet
2021-05-20clk: meson: g12a: fix gp0 and hifi rangesJerome Brunet
2021-05-19clk: meson: pll: switch to determine_rate for the PLL opsMartin Blumenstingl
2021-02-09clk: meson: axg: Remove MIPI enable clock gateRemi Pommarel
2021-01-04clk: meson: meson8b: remove compatibility code for old .dtbsMartin Blumenstingl
2021-01-04clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()Martin Blumenstingl
2021-01-04clk: meson: clk-pll: make "ret" a signed integerMartin Blumenstingl
2021-01-04clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLLMartin Blumenstingl
2020-12-21Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2020-11-26clk: meson: g12a: add MIPI DSI Host Pixel ClockNeil Armstrong
2020-11-23clk: meson: enable building as modulesKevin Hilman
2020-11-23clk: meson: Kconfig: fix dependency for G12AKevin Hilman
2020-11-23clk: meson: axg: add MIPI DSI Host clockNeil Armstrong
2020-11-23clk: meson: axg: add Video ClocksNeil Armstrong
2020-11-14clk: meson: g12: use devm variant to register notifiersJerome Brunet
2020-11-14clk: meson: g12: drop use of __clk_lookup()Jerome Brunet
2020-10-28clk: define to_clk_regmap() as inline functionArnd Bergmann
2020-10-20Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ...Stephen Boyd
2020-10-13clk: meson: use semicolons rather than commas to separate statementsJulia Lawall
2020-09-10clk: meson: make shipped controller configurableJerome Brunet
2020-08-29clk: meson: g12a: mark fclk_div2 as criticalStefan Agner
2020-08-17clk: meson: axg-audio: fix g12a tdmout sclk inverterJerome Brunet
2020-08-17clk: meson: axg-audio: separate axg and g12a regmap tablesJerome Brunet
2020-08-17clk: meson: add sclk-ws driverJerome Brunet
2020-07-21Merge branch 'clk-amlogic' into clk-nextStephen Boyd
2020-07-10Replace HTTP links with HTTPS ones: Common CLK frameworkAlexander A. Klimov
2020-07-09clk: meson: meson8b: add the vclk2_en gate clockMartin Blumenstingl
2020-07-09clk: meson: meson8b: add the vclk_en gate clockMartin Blumenstingl
2020-06-24clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2Martin Blumenstingl
2020-06-19clk: meson: g12a: Add support for NNA CLK source clocksDmitry Shmidt
2020-05-02clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registersMartin Blumenstingl
2020-04-29clk: meson: meson8b: Make the CCF use the glitch-free VPU muxMartin Blumenstingl
2020-04-29clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bitsMartin Blumenstingl
2020-04-29clk: meson: meson8b: Fix the polarity of the RESET_N linesMartin Blumenstingl
2020-04-29clk: meson: meson8b: Fix the first parent of vid_pll_in_selMartin Blumenstingl
2020-04-16clk: meson: g12a: Prepare the GPU clock tree to change at runtimeMartin Blumenstingl
2020-04-16clk: meson: gxbb: Prepare the GPU clock tree to change at runtimeMartin Blumenstingl
2020-04-14clk: meson: meson8b: make the hdmi_sys clock tree mutableMartin Blumenstingl
2020-04-14clk: meson8b: export the HDMI system clockMartin Blumenstingl