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path: root/drivers/clk/renesas/r8a77995-cpg-mssr.c
AgeCommit message (Expand)Author
2020-06-22clk: renesas: rcar-gen3: Mark RWDT clocks as criticalUlrich Hecht
2020-02-10clk: renesas: rcar-gen3: Add CCREE clocksGeert Uytterhoeven
2019-06-18clk: renesas: r8a77995: Add CMM clocksJacopo Mondi
2019-04-02clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara
2018-12-04clk: renesas: r8a77995: Simplify PLL3 multiplier/dividerGeert Uytterhoeven
2018-12-04clk: renesas: r8a77995: Add missing CPEX clockGeert Uytterhoeven
2018-12-04clk: renesas: r8a77995: Remove non-existent SSP clocksGeert Uytterhoeven
2018-12-04clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocksGeert Uytterhoeven
2018-12-04clk: renesas: r8a77995: Correct parent clock of DUGeert Uytterhoeven
2018-10-18Merge branch 'clk-renesas' into clk-nextStephen Boyd
2018-08-30clk: renesas: use SPDX identifier for Renesas driversWolfram Sang
2018-08-27clk: renesas: r8a77995: Correct RCLK handlingGeert Uytterhoeven
2017-10-16clk: renesas: r8a77995: Correct parent clock of INTC-APGeert Uytterhoeven
2017-08-16clk: renesas: cpg-mssr: Add R8A77995 supportGeert Uytterhoeven