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path: root/drivers/clk/renesas/r9a06g032-clocks.c
AgeCommit message (Expand)Author
2021-05-11clk: renesas: r9a06g032: Switch to .determine_rate()Geert Uytterhoeven
2021-03-30clk: renesas: Zero init clk_init_dataGeert Uytterhoeven
2021-03-24clk: renesas: Couple of spelling fixesBhaskar Chowdhury
2020-12-07clk: renesas: r9a06g032: Drop __packed for portabilityGeert Uytterhoeven
2020-04-14clk: renesas: r9a06g032: Fix some typo in commentsChristophe JAILLET
2019-08-23clk: renesas: r9a06g032: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-06-04clk: renesas: r9a06g032: Add clock domain supportGareth Williams
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-04-02clk: renesas: r9a06g032: Add missing PCI USB clockGareth Williams
2018-12-10clk: renesas: Remove usage of CLK_IS_BASICStephen Boyd
2018-09-11clk: renesas: r9a06g032: Fix UART34567 clock ratePhil Edworthy
2018-06-25clk: renesas: Renesas R9A06G032 clock driverMichel Pollet