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path: root/drivers/clk/renesas
AgeCommit message (Expand)Author
2022-10-26clk: renesas: r8a779a0: Fix SD0H clock nameWolfram Sang
2022-10-26clk: renesas: r8a779g0: Add RPC-IF clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add SDHI clocksGeert Uytterhoeven
2022-10-26clk: renesas: r8a779f0: Add SASYNCPER internal clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779f0: Fix SD0H clock nameGeert Uytterhoeven
2022-10-26clk: renesas: r9a07g043: Drop WDT2 clock and reset entryLad Prabhakar
2022-10-26clk: renesas: r9a07g044: Drop WDT2 clock and reset entryLad Prabhakar
2022-10-26clk: renesas: r8a779g0: Add TPU clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add PWM clockGeert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Add SCIF clocksGeert Uytterhoeven
2022-10-26Merge tag 'renesas-clk-fixes-for-v6.1-tag1'Geert Uytterhoeven
2022-10-26clk: renesas: r8a779g0: Fix HSCIF parent clocksGeert Uytterhoeven
2022-10-18clk: renesas: r8a779g0: Add SASYNCPER clocksGeert Uytterhoeven
2022-10-17clk: renesas: r9a07g044: Add MTU3a clock and reset entryBiju Das
2022-10-17clk: renesas: r8a779g0: Add INTC-EX clockGeert Uytterhoeven
2022-10-17clk: renesas: r8a779g0: Add MSIOF clocksGeert Uytterhoeven
2022-10-17clk: renesas: r8a779g0: Add SYS-DMAC clocksGeert Uytterhoeven
2022-10-17clk: renesas: r8a779f0: Add Ethernet Switch clocksYoshihiro Shimoda
2022-10-17clk: renesas: rzg2l: Fix typo in function nameLad Prabhakar
2022-10-17clk: renesas: rzg2l: Support sd clk mux round operationBiju Das
2022-09-18clk: renesas: r8a779g0: Add EtherAVB clocksGeert Uytterhoeven
2022-09-18clk: renesas: r8a779g0: Add PFC/GPIO clocksGeert Uytterhoeven
2022-09-18clk: renesas: r8a779g0: Add I2C clocksGeert Uytterhoeven
2022-09-18clk: renesas: r8a779g0: Add watchdog clockGeert Uytterhoeven
2022-08-29clk: renesas: r8a779f0: Add MSIOF clocksWolfram Sang
2022-08-29clk: renesas: r9a09g011: Add IIC clock and reset entriesPhil Edworthy
2022-08-22clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_infoBiju Das
2022-08-22clk: renesas: r8a779f0: Add TMU and parent SASYNC clocksWolfram Sang
2022-08-15clk: renesas: r8a779f0: Add CMT clocksWolfram Sang
2022-08-15clk: renesas: r8a779f0: Add SDH0 clockWolfram Sang
2022-07-05clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_configAndi Kleen
2022-07-05clk: renesas: r9a07g043: Add support for RZ/Five SoCLad Prabhakar
2022-06-17clk: renesas: r8a779f0: Add HSCIF clocksWolfram Sang
2022-06-17clk: renesas: r8a779f0: Add PCIe clocksYoshihiro Shimoda
2022-06-17clk: renesas: r8a779f0: Add Z0 and Z1 clock supportGeert Uytterhoeven
2022-06-13clk: renesas: rza1: Remove struct rz_cpgGeert Uytterhoeven
2022-06-13clk: renesas: r8a7779: Remove struct r8a7779_cpgGeert Uytterhoeven
2022-06-13clk: renesas: r8a7778: Remove struct r8a7778_cpgGeert Uytterhoeven
2022-06-13clk: renesas: sh73a0: Remove sh73a0_cpg.regGeert Uytterhoeven
2022-06-13clk: renesas: r8a7740: Remove r8a7740_cpg.regGeert Uytterhoeven
2022-06-13clk: renesas: r8a73a4: Remove r8a73a4_cpg.regGeert Uytterhoeven
2022-06-13clk: renesas: r8a779f0: Add SDHI0 clockWolfram Sang
2022-06-13clk: renesas: r8a779f0: Add thermal clockWolfram Sang
2022-06-07clk: renesas: rzg2l: Fix reset status functionBiju Das
2022-06-06clk: renesas: r9a06g032: Fix UART clkgrp bitselRalph Siemsen
2022-06-06clk: renesas: r9a06g032: Drop some unused fieldsRalph Siemsen
2022-06-06clk: renesas: r9a09g011: Add WDT clock and reset entriesPhil Edworthy
2022-06-06clk: renesas: r9a09g011: Add PFC clock and reset entriesPhil Edworthy
2022-06-06clk: renesas: r9a07g044: Add POEG clock and reset entriesBiju Das
2022-06-06clk: renesas: r9a07g044: Add GPT clock and reset entryBiju Das