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path: root/drivers/clk/rockchip/clk-rk3288.c
AgeCommit message (Expand)Author
2021-03-21clk: rockchip: support more core div settingElaine Zhang
2020-07-05clk: rockchip: use separate compatibles for rk3288w-cruHeiko Stuebner
2020-06-17clk: rockchip: Handle clock tree for rk3288w variantMylène Josserand
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds
2019-06-15clk: rockchip: convert pclk_wdt boilerplat to new SGRF_GATE macroHeiko Stuebner
2019-06-06clk: rockchip: Remove 48 MHz PLL rate from rk3288Douglas Anderson
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-04-23clk: rockchip: undo several noc and special clocks as critical on rk3288Douglas Anderson
2019-04-12clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288Douglas Anderson
2019-04-12clk: rockchip: Limit use of USB PHY clock to USB on rk3288Matthias Kaehlcke
2019-04-12clk: rockchip: Fix video codec clocks on rk3288Douglas Anderson
2019-04-11clk: rockchip: Make rkpwm a critical clock on rk3288Douglas Anderson
2018-08-31clk: rockchip: improve rk3288 pll rates for better hdmi outputUrja Rannikko
2017-06-02clk: rockchip: mark noc and some special clk as critical on rk3288Elaine Zhang
2017-01-23clk: rockchip: rk3288: make all niu clocks criticalJacob Chen
2017-01-22clk: rockchip: use rk3288 vip_out clock idsJacob Chen
2017-01-13clk: rockchip: use rk3288 isp_in clock idsJacob Chen
2017-01-02clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288Heiko Stuebner
2016-03-27clk: rockchip: release io resource when failing to init clkShawn Lin
2016-03-27clk: rockchip: Add support for multiple clock providersXing Zheng
2016-03-27clk: rockchip: allow varying mux parameters for cpuclk pll-sourcesXing Zheng
2016-02-04clk: rockchip: convert manually created factor clocks to the new typeHeiko Stuebner
2016-01-25clk: rockchip: fix usbphy-related clocksHeiko Stuebner
2016-01-02Merge branch 'clk-rockchip' into clk-nextMichael Turquette
2016-01-02clk: rockchip: fix section mismatches with new child-clocksHeiko Stübner
2015-12-23Merge branch 'clk-rockchip' into clk-nextMichael Turquette
2015-12-23clk: rockchip: Allow the RK3288 SPDIF clocks to change their parentSjoerd Simons
2015-12-23clk: rockchip: include downstream muxes into fractional dividersHeiko Stuebner
2015-12-21clk: rockchip: only enter pll slow-mode directly before reboots on rk3288Heiko Stuebner
2015-12-12clk: rockchip: use rk3288-efuse clock idsZhengShunQian
2015-12-01clk: rockchip: switch PLLs to slow mode before reboot for rk3288Chris Zhong
2015-11-26clk: rockchip: add mipidsi clock on rk3288Chris Zhong
2015-11-23clk: rockchip: set the id for crypto clkZain Wang
2015-09-04Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/l...Linus Torvalds
2015-08-13clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocksHeiko Stuebner
2015-07-28clk: rockchip: Fix PLL bandwidthDouglas Anderson
2015-07-06clk: rockchip: define the inverters of rk3066/rk3188 and rk3288Heiko Stuebner
2015-07-06clk: rockchip: fix faulty vip parent name on rk3288Heiko Stuebner
2015-07-06clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_macHeiko Stuebner
2015-05-05clk: rockchip: Staticize file-scope declarationsKrzysztof Kozlowski
2015-04-12clk: don't use __initconst for non-const arraysUwe Kleine-König
2015-02-21Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds
2015-01-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
2015-01-27Merge tag 'v3.20-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette
2015-01-22clk: rockchip: add a dummy clock for the watchdog pclk on rk3288Heiko Stuebner
2015-01-22clk: rockchip: add PVTM clocks on rk3288huang lin
2015-01-22clk: rockchip: use the clock ID for usbphy480m_srcKever Yang
2014-12-31GMAC: modify CRU config for Rockchip RK3288 SoCs integrated GMACRoger Chen
2014-12-31clk: rockchip: rk3288: Make s2r reliable by switching PLLs to slow modeDoug Anderson